162 lines
3.7 KiB
C
162 lines
3.7 KiB
C
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/*-
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* Copyright (C) 2012-2013, Thomas Skibo.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* * The names of contributors may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL AUTHORS OR CONTRIBUTORS BE LIABLE FOR
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* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
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* DAMAGE.
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*
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*/
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/* Machine dependent code for Xilinx Zynq-7000 Soc.
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*
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* Reference: Zynq-7000 All Programmable SoC Technical Reference Manual.
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* (v1.4) November 16, 2012. Xilinx doc UG585.
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*/
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#include "opt_global.h"
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#define _ARM32_BUS_DMA_PRIVATE
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/bus.h>
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#include <vm/vm.h>
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#include <vm/pmap.h>
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#include <dev/fdt/fdt_common.h>
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#include <machine/bus.h>
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#include <machine/pmap.h>
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#include <machine/frame.h>
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#include <machine/machdep.h>
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#include <arm/xilinx/zy7_reg.h>
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void (*zynq7_cpu_reset)(void);
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vm_offset_t
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initarm_lastaddr(void)
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{
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return (ZYNQ7_PSIO_VBASE - ARM_NOCACHE_KVA_SIZE);
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}
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void
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initarm_gpio_init(void)
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{
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}
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void
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initarm_late_init(void)
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{
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}
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#define FDT_DEVMAP_SIZE 3
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static struct pmap_devmap fdt_devmap[FDT_DEVMAP_SIZE];
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/*
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* Construct pmap_devmap[] with DT-derived config data.
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*/
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int
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platform_devmap_init(void)
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{
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int i = 0;
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fdt_devmap[i].pd_va = ZYNQ7_PSIO_VBASE;
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fdt_devmap[i].pd_pa = ZYNQ7_PSIO_HWBASE;
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fdt_devmap[i].pd_size = ZYNQ7_PSIO_SIZE;
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fdt_devmap[i].pd_prot = VM_PROT_READ | VM_PROT_WRITE;
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fdt_devmap[i].pd_cache = PTE_DEVICE;
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i++;
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fdt_devmap[i].pd_va = ZYNQ7_PSCTL_VBASE;
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fdt_devmap[i].pd_pa = ZYNQ7_PSCTL_HWBASE;
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fdt_devmap[i].pd_size = ZYNQ7_PSCTL_SIZE;
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fdt_devmap[i].pd_prot = VM_PROT_READ | VM_PROT_WRITE;
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fdt_devmap[i].pd_cache = PTE_DEVICE;
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i++;
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/* end of table */
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fdt_devmap[i].pd_va = 0;
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fdt_devmap[i].pd_pa = 0;
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fdt_devmap[i].pd_size = 0;
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fdt_devmap[i].pd_prot = 0;
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fdt_devmap[i].pd_cache = 0;
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pmap_devmap_bootstrap_table = &fdt_devmap[0];
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return (0);
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}
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struct fdt_fixup_entry fdt_fixup_table[] = {
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{ NULL, NULL }
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};
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static int
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fdt_gic_decode_ic(phandle_t node, pcell_t *intr, int *interrupt, int *trig,
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int *pol)
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{
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if (!fdt_is_compatible(node, "arm,gic"))
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return (ENXIO);
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*interrupt = fdt32_to_cpu(intr[0]);
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*trig = INTR_TRIGGER_CONFORM;
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*pol = INTR_POLARITY_CONFORM;
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return (0);
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}
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fdt_pic_decode_t fdt_pic_table[] = {
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&fdt_gic_decode_ic,
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NULL
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};
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struct arm32_dma_range *
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bus_dma_get_range(void)
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{
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return (NULL);
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}
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int
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bus_dma_get_range_nb(void)
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{
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return (0);
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}
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void
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cpu_reset()
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{
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if (zynq7_cpu_reset != NULL)
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(*zynq7_cpu_reset)();
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printf("cpu_reset: no platform cpu_reset. hanging.\n");
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for (;;)
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;
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}
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