367 lines
10 KiB
C
367 lines
10 KiB
C
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/*-
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* Copyright (c) 2015,2016 Annapurna Labs Ltd. and affiliates
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* All rights reserved.
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*
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* Developed by Semihalf.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#ifndef __AL_ETH_H__
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#define __AL_ETH_H__
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#include "al_init_eth_lm.h"
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#include "al_hal_eth.h"
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#include "al_hal_udma_iofic.h"
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#include "al_hal_udma_debug.h"
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#include "al_serdes.h"
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enum board_t {
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ALPINE_INTEGRATED = 0,
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ALPINE_NIC = 1,
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ALPINE_FPGA_NIC = 2,
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};
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#define AL_ETH_MAX_HW_QUEUES 4
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#define AL_ETH_NUM_QUEUES 4
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#define AL_ETH_MAX_MSIX_VEC (1 + 2 * AL_ETH_MAX_HW_QUEUES)
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#define AL_ETH_DEFAULT_TX_SW_DESCS (512)
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#define AL_ETH_DEFAULT_TX_HW_DESCS (512)
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#define AL_ETH_DEFAULT_RX_DESCS (512)
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#if ((AL_ETH_DEFAULT_TX_SW_DESCS / 4) < (AL_ETH_PKT_MAX_BUFS + 2))
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#define AL_ETH_TX_WAKEUP_THRESH (AL_ETH_DEFAULT_TX_SW_DESCS / 4)
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#else
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#define AL_ETH_TX_WAKEUP_THRESH (AL_ETH_PKT_MAX_BUFS + 2)
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#endif
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#define NET_IP_ALIGN 2
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#define AL_ETH_DEFAULT_SMALL_PACKET_LEN (128 - NET_IP_ALIGN)
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#define AL_ETH_HEADER_COPY_SIZE (128 - NET_IP_ALIGN)
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#define AL_ETH_DEFAULT_MAX_RX_BUFF_ALLOC_SIZE 9216
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/*
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* Minimum the buffer size to 600 to avoid situation the mtu will be changed
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* from too little buffer to very big one and then the number of buffer per
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* packet could reach the maximum AL_ETH_PKT_MAX_BUFS
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*/
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#define AL_ETH_DEFAULT_MIN_RX_BUFF_ALLOC_SIZE 600
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#define AL_ETH_DEFAULT_FORCE_1000_BASEX FALSE
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#define AL_ETH_DEFAULT_LINK_POLL_INTERVAL 100
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#define AL_ETH_FIRST_LINK_POLL_INTERVAL 1
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#define AL_ETH_NAME_MAX_LEN 20
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#define AL_ETH_IRQNAME_SIZE 40
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#define AL_ETH_DEFAULT_MDIO_FREQ_KHZ 2500
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#define AL_ETH_MDIO_FREQ_1000_KHZ 1000
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struct al_eth_irq {
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driver_filter_t *handler;
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void *data;
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unsigned int vector;
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uint8_t requested;
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char name[AL_ETH_IRQNAME_SIZE];
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struct resource *res;
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void *cookie;
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};
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struct al_eth_tx_buffer {
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struct mbuf *m;
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struct al_eth_pkt hal_pkt;
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bus_dmamap_t dma_map;
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unsigned int tx_descs;
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};
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struct al_eth_rx_buffer {
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struct mbuf *m;
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unsigned int data_size;
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bus_dmamap_t dma_map;
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struct al_buf al_buf;
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};
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struct al_eth_ring {
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device_t dev;
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struct al_eth_adapter *adapter;
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/* Used to get rx packets from hal */
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struct al_eth_pkt hal_pkt;
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/* Udma queue handler */
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struct al_udma_q *dma_q;
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uint32_t ring_id;
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uint16_t next_to_use;
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uint16_t next_to_clean;
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/* The offset of the interrupt unmask register */
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uint32_t *unmask_reg_offset;
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/*
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* The value to write to the above register to
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* unmask the interrupt of this ring
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*/
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uint32_t unmask_val;
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struct al_eth_meta_data hal_meta;
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/* Contex of tx packet */
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struct al_eth_tx_buffer *tx_buffer_info;
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/* Contex of rx packet */
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struct al_eth_rx_buffer *rx_buffer_info;
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/* Number of tx/rx_buffer_info's entries */
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int sw_count;
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/* Number of hw descriptors */
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int hw_count;
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/* Size (in bytes) of hw descriptors */
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size_t descs_size;
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/* Size (in bytes) of hw completion descriptors, used for rx */
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size_t cdescs_size;
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struct ifnet *netdev;
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struct al_udma_q_params q_params;
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struct buf_ring *br;
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struct mtx br_mtx;
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struct task enqueue_task;
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struct taskqueue *enqueue_tq;
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volatile uint32_t enqueue_is_running;
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struct task cmpl_task;
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struct taskqueue *cmpl_tq;
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volatile uint32_t cmpl_is_running;
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uint32_t lro_enabled;
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struct lro_ctrl lro;
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bus_dma_tag_t dma_buf_tag;
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volatile uint32_t stall;
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};
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#define AL_ETH_TX_RING_IDX_NEXT(tx_ring, idx) (((idx) + 1) & (AL_ETH_DEFAULT_TX_SW_DESCS - 1))
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#define AL_ETH_RX_RING_IDX_NEXT(rx_ring, idx) (((idx) + 1) & (AL_ETH_DEFAULT_RX_DESCS - 1))
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#define AL_ETH_RX_RING_IDX_ADD(rx_ring, idx, n) (((idx) + (n)) & (AL_ETH_DEFAULT_RX_DESCS - 1))
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/* flow control configuration */
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#define AL_ETH_FLOW_CTRL_RX_FIFO_TH_HIGH 0x160
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#define AL_ETH_FLOW_CTRL_RX_FIFO_TH_LOW 0x90
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#define AL_ETH_FLOW_CTRL_QUANTA 0xffff
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#define AL_ETH_FLOW_CTRL_QUANTA_TH 0x8000
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#define AL_ETH_FLOW_CTRL_AUTONEG 1
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#define AL_ETH_FLOW_CTRL_RX_PAUSE 2
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#define AL_ETH_FLOW_CTRL_TX_PAUSE 4
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/* link configuration for 1G port */
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struct al_eth_link_config {
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int old_link;
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/* Describes what we actually have. */
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int active_duplex;
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int active_speed;
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/* current flow control status */
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uint8_t flow_ctrl_active;
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/* supported configuration (can be changed from ethtool) */
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uint8_t flow_ctrl_supported;
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/* the following are not relevant to RGMII */
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boolean_t force_1000_base_x;
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boolean_t autoneg;
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};
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/* SFP detection event */
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enum al_eth_sfp_detect_evt {
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/* No change (no connect, disconnect, or new SFP module */
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AL_ETH_SFP_DETECT_EVT_NO_CHANGE,
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/* SFP module connected */
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AL_ETH_SFP_DETECT_EVT_CONNECTED,
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/* SFP module disconnected */
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AL_ETH_SFP_DETECT_EVT_DISCONNECTED,
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/* SFP module replaced */
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AL_ETH_SFP_DETECT_EVT_CHANGED,
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};
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/* SFP detection status */
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struct al_eth_sfp_detect_stat {
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/* Status is valid (i.e. rest of fields are valid) */
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boolean_t valid;
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boolean_t connected;
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uint8_t sfp_10g;
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uint8_t sfp_1g;
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uint8_t sfp_cable_tech;
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boolean_t lt_en;
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boolean_t an_en;
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enum al_eth_mac_mode mac_mode;
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};
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struct al_eth_retimer_params {
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boolean_t exist;
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uint8_t bus_id;
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uint8_t i2c_addr;
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enum al_eth_retimer_channel channel;
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};
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struct msix_entry {
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int entry;
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int vector;
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};
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/* board specific private data structure */
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struct al_eth_adapter {
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enum board_t board_type;
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device_t miibus;
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struct mii_data *mii;
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uint16_t dev_id;
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uint8_t rev_id;
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device_t dev;
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struct ifnet *netdev;
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struct ifmedia media;
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struct resource *udma_res;
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struct resource *mac_res;
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struct resource *ec_res;
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int if_flags;
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struct callout wd_callout;
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struct mtx wd_mtx;
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struct callout stats_callout;
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struct mtx stats_mtx;
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/* this is for intx mode */
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void *irq_cookie;
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struct resource *irq_res;
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/*
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* Some features need tri-state capability,
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* thus the additional *_CAPABLE flags.
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*/
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uint32_t flags;
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#define AL_ETH_FLAG_MSIX_CAPABLE (uint32_t)(1 << 1)
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#define AL_ETH_FLAG_MSIX_ENABLED (uint32_t)(1 << 2)
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#define AL_ETH_FLAG_IN_NETPOLL (uint32_t)(1 << 3)
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#define AL_ETH_FLAG_MQ_CAPABLE (uint32_t)(1 << 4)
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#define AL_ETH_FLAG_SRIOV_CAPABLE (uint32_t)(1 << 5)
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#define AL_ETH_FLAG_SRIOV_ENABLED (uint32_t)(1 << 6)
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#define AL_ETH_FLAG_RESET_REQUESTED (uint32_t)(1 << 7)
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struct al_hal_eth_adapter hal_adapter;
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/*
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* Rx packets that shorter that this len will be copied to the mbuf
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*/
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unsigned int small_copy_len;
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/* Maximum size for rx buffer */
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unsigned int max_rx_buff_alloc_size;
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uint32_t rx_mbuf_sz;
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/* Tx fast path data */
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int num_tx_queues;
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/* Rx fast path data */
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int num_rx_queues;
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/* TX */
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struct al_eth_ring tx_ring[AL_ETH_NUM_QUEUES];
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/* RX */
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struct al_eth_ring rx_ring[AL_ETH_NUM_QUEUES];
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enum al_iofic_mode int_mode;
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#define AL_ETH_MGMT_IRQ_IDX 0
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#define AL_ETH_RXQ_IRQ_IDX(adapter, q) (1 + (q))
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#define AL_ETH_TXQ_IRQ_IDX(adapter, q) (1 + (adapter)->num_rx_queues + (q))
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struct al_eth_irq irq_tbl[AL_ETH_MAX_MSIX_VEC];
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struct msix_entry *msix_entries;
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int msix_vecs;
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int irq_vecs;
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unsigned int tx_usecs, rx_usecs; /* interrupt coalescing */
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unsigned int tx_ring_count;
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unsigned int tx_descs_count;
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unsigned int rx_ring_count;
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unsigned int rx_descs_count;
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/* RSS */
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uint32_t toeplitz_hash_key[AL_ETH_RX_HASH_KEY_NUM];
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#define AL_ETH_RX_RSS_TABLE_SIZE AL_ETH_RX_THASH_TABLE_SIZE
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uint8_t rss_ind_tbl[AL_ETH_RX_RSS_TABLE_SIZE];
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uint32_t msg_enable;
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struct al_eth_mac_stats mac_stats;
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enum al_eth_mac_mode mac_mode;
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boolean_t mac_mode_set; /* Relevant only when 'auto_speed' is set */
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uint8_t mac_addr[ETHER_ADDR_LEN];
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/* mdio and phy*/
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boolean_t phy_exist;
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struct mii_bus *mdio_bus;
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struct phy_device *phydev;
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uint8_t phy_addr;
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struct al_eth_link_config link_config;
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/* HAL layer data */
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int id_number;
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char name[AL_ETH_NAME_MAX_LEN];
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void *internal_pcie_base; /* use for ALPINE_NIC devices */
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void *udma_base;
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void *ec_base;
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void *mac_base;
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struct al_eth_flow_control_params flow_ctrl_params;
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struct al_eth_adapter_params eth_hal_params;
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struct task link_status_task;
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uint32_t link_poll_interval; /* task interval in mSec */
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boolean_t serdes_init;
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struct al_serdes_grp_obj serdes_obj;
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uint8_t serdes_grp;
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uint8_t serdes_lane;
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boolean_t an_en; /* run kr auto-negotiation */
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boolean_t lt_en; /* run kr link-training */
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boolean_t sfp_detection_needed; /* true if need to run sfp detection */
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boolean_t auto_speed; /* true if allowed to change SerDes speed configuration */
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uint8_t i2c_adapter_id; /* identifier for the i2c adapter to use to access SFP+ module */
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enum al_eth_ref_clk_freq ref_clk_freq; /* reference clock frequency */
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unsigned int mdio_freq; /* MDIO frequency [Khz] */
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boolean_t up;
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boolean_t last_link;
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boolean_t last_establish_failed;
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struct al_eth_lm_context lm_context;
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boolean_t use_lm;
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boolean_t dont_override_serdes; /* avoid overriding serdes parameters
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to preset static values */
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struct mtx serdes_config_lock;
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struct mtx if_rx_lock;
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uint32_t wol;
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struct al_eth_retimer_params retimer;
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bool phy_fixup_needed;
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enum al_eth_lm_max_speed max_speed;
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};
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#endif /* !(AL_ETH_H) */
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