2016-07-22 22:46:41 +00:00
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/*-
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* Copyright (c) 2015-2016 Chelsio Communications, Inc.
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* All rights reserved.
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* Written by: John Baldwin <jhb@FreeBSD.org>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/bus.h>
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#include <sys/kernel.h>
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#include <sys/module.h>
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#include <sys/systm.h>
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#include <dev/pci/pcivar.h>
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#ifdef PCI_IOV
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#include <sys/nv.h>
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#include <sys/iov_schema.h>
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#include <dev/pci/pci_iov.h>
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#endif
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2017-01-31 18:54:13 +00:00
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#include "common/common.h"
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2020-11-09 00:08:35 +00:00
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#include "common/t4_regs.h"
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2016-07-22 22:46:41 +00:00
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#include "t4_if.h"
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struct t4iov_softc {
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device_t sc_dev;
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device_t sc_main;
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bool sc_attached;
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2020-11-09 00:08:35 +00:00
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int pf;
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int regs_rid;
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struct resource *regs_res;
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bus_space_handle_t bh;
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bus_space_tag_t bt;
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2016-07-22 22:46:41 +00:00
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};
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struct {
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uint16_t device;
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char *desc;
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} t4iov_pciids[] = {
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{0x4000, "Chelsio T440-dbg"},
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{0x4001, "Chelsio T420-CR"},
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{0x4002, "Chelsio T422-CR"},
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{0x4003, "Chelsio T440-CR"},
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{0x4004, "Chelsio T420-BCH"},
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{0x4005, "Chelsio T440-BCH"},
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{0x4006, "Chelsio T440-CH"},
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{0x4007, "Chelsio T420-SO"},
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{0x4008, "Chelsio T420-CX"},
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{0x4009, "Chelsio T420-BT"},
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{0x400a, "Chelsio T404-BT"},
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{0x400e, "Chelsio T440-LP-CR"},
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}, t5iov_pciids[] = {
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{0x5000, "Chelsio T580-dbg"},
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{0x5001, "Chelsio T520-CR"}, /* 2 x 10G */
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{0x5002, "Chelsio T522-CR"}, /* 2 x 10G, 2 X 1G */
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{0x5003, "Chelsio T540-CR"}, /* 4 x 10G */
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{0x5007, "Chelsio T520-SO"}, /* 2 x 10G, nomem */
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{0x5009, "Chelsio T520-BT"}, /* 2 x 10GBaseT */
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{0x500a, "Chelsio T504-BT"}, /* 4 x 1G */
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{0x500d, "Chelsio T580-CR"}, /* 2 x 40G */
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{0x500e, "Chelsio T540-LP-CR"}, /* 4 x 10G */
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{0x5010, "Chelsio T580-LP-CR"}, /* 2 x 40G */
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{0x5011, "Chelsio T520-LL-CR"}, /* 2 x 10G */
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{0x5012, "Chelsio T560-CR"}, /* 1 x 40G, 2 x 10G */
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{0x5014, "Chelsio T580-LP-SO-CR"}, /* 2 x 40G, nomem */
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{0x5015, "Chelsio T502-BT"}, /* 2 x 1G */
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2019-11-15 18:48:14 +00:00
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{0x5018, "Chelsio T540-BT"}, /* 4 x 10GBaseT */
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{0x5019, "Chelsio T540-LP-BT"}, /* 4 x 10GBaseT */
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{0x501a, "Chelsio T540-SO-BT"}, /* 4 x 10GBaseT, nomem */
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{0x501b, "Chelsio T540-SO-CR"}, /* 4 x 10G, nomem */
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2016-09-16 00:08:37 +00:00
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}, t6iov_pciids[] = {
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2017-05-05 00:54:23 +00:00
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{0x6000, "Chelsio T6-DBG-25"}, /* 2 x 10/25G, debug */
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2016-09-16 00:08:37 +00:00
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{0x6001, "Chelsio T6225-CR"}, /* 2 x 10/25G */
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{0x6002, "Chelsio T6225-SO-CR"}, /* 2 x 10/25G, nomem */
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2017-05-05 00:54:23 +00:00
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{0x6003, "Chelsio T6425-CR"}, /* 4 x 10/25G */
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2017-05-05 16:52:25 +00:00
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{0x6004, "Chelsio T6425-SO-CR"}, /* 4 x 10/25G, nomem */
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2017-05-05 00:54:23 +00:00
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{0x6005, "Chelsio T6225-OCP-SO"}, /* 2 x 10/25G, nomem */
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{0x6006, "Chelsio T62100-OCP-SO"}, /* 2 x 40/50/100G, nomem */
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2016-09-16 00:08:37 +00:00
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{0x6007, "Chelsio T62100-LP-CR"}, /* 2 x 40/50/100G */
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{0x6008, "Chelsio T62100-SO-CR"}, /* 2 x 40/50/100G, nomem */
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2017-05-05 00:54:23 +00:00
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{0x6009, "Chelsio T6210-BT"}, /* 2 x 10GBASE-T */
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2016-09-16 00:08:37 +00:00
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{0x600d, "Chelsio T62100-CR"}, /* 2 x 40/50/100G */
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2017-05-05 00:54:23 +00:00
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{0x6010, "Chelsio T6-DBG-100"}, /* 2 x 40/50/100G, debug */
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{0x6011, "Chelsio T6225-LL-CR"}, /* 2 x 10/25G */
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{0x6014, "Chelsio T61100-OCP-SO"}, /* 1 x 40/50/100G, nomem */
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{0x6015, "Chelsio T6201-BT"}, /* 2 x 1000BASE-T */
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/* Custom */
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{0x6080, "Chelsio T6225 80"},
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{0x6081, "Chelsio T62100 81"},
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2019-11-15 18:48:14 +00:00
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{0x6082, "Chelsio T6225-CR 82"},
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{0x6083, "Chelsio T62100-CR 83"},
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{0x6084, "Chelsio T64100-CR 84"},
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{0x6085, "Chelsio T6240-SO 85"},
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{0x6086, "Chelsio T6225-SO-CR 86"},
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{0x6087, "Chelsio T6225-CR 87"},
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2016-07-22 22:46:41 +00:00
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};
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2020-11-09 00:08:35 +00:00
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static inline uint32_t
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t4iov_read_reg(struct t4iov_softc *sc, uint32_t reg)
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{
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return bus_space_read_4(sc->bt, sc->bh, reg);
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}
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2016-07-22 22:46:41 +00:00
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static int t4iov_attach_child(device_t dev);
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static int
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t4iov_probe(device_t dev)
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{
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2016-09-15 22:31:49 +00:00
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uint16_t d;
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2016-07-22 22:46:41 +00:00
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size_t i;
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2017-01-31 18:54:13 +00:00
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if (pci_get_vendor(dev) != PCI_VENDOR_ID_CHELSIO)
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return (ENXIO);
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2016-07-22 22:46:41 +00:00
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d = pci_get_device(dev);
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for (i = 0; i < nitems(t4iov_pciids); i++) {
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if (d == t4iov_pciids[i].device) {
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device_set_desc(dev, t4iov_pciids[i].desc);
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2016-08-03 17:11:08 +00:00
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device_quiet(dev);
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2016-07-22 22:46:41 +00:00
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return (BUS_PROBE_DEFAULT);
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}
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}
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return (ENXIO);
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}
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static int
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t5iov_probe(device_t dev)
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{
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2016-09-15 22:31:49 +00:00
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uint16_t d;
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2016-07-22 22:46:41 +00:00
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size_t i;
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2017-01-31 18:54:13 +00:00
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if (pci_get_vendor(dev) != PCI_VENDOR_ID_CHELSIO)
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return (ENXIO);
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2016-07-22 22:46:41 +00:00
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d = pci_get_device(dev);
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for (i = 0; i < nitems(t5iov_pciids); i++) {
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if (d == t5iov_pciids[i].device) {
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device_set_desc(dev, t5iov_pciids[i].desc);
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2016-08-03 17:11:08 +00:00
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device_quiet(dev);
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2016-07-22 22:46:41 +00:00
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return (BUS_PROBE_DEFAULT);
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}
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}
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return (ENXIO);
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}
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2016-09-16 00:08:37 +00:00
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static int
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t6iov_probe(device_t dev)
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{
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uint16_t d;
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size_t i;
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2017-01-31 18:54:13 +00:00
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if (pci_get_vendor(dev) != PCI_VENDOR_ID_CHELSIO)
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return (ENXIO);
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2016-09-16 00:08:37 +00:00
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d = pci_get_device(dev);
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for (i = 0; i < nitems(t6iov_pciids); i++) {
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if (d == t6iov_pciids[i].device) {
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device_set_desc(dev, t6iov_pciids[i].desc);
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device_quiet(dev);
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return (BUS_PROBE_DEFAULT);
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}
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}
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return (ENXIO);
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}
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2016-07-22 22:46:41 +00:00
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static int
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t4iov_attach(device_t dev)
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{
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struct t4iov_softc *sc;
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2020-11-09 00:08:35 +00:00
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uint32_t pl_rev, whoami;
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2016-07-22 22:46:41 +00:00
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sc = device_get_softc(dev);
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sc->sc_dev = dev;
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2020-11-09 00:08:35 +00:00
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sc->regs_rid = PCIR_BAR(0);
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sc->regs_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
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&sc->regs_rid, RF_ACTIVE);
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if (sc->regs_res == NULL) {
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device_printf(dev, "cannot map registers.\n");
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return (ENXIO);
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}
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sc->bt = rman_get_bustag(sc->regs_res);
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sc->bh = rman_get_bushandle(sc->regs_res);
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pl_rev = t4iov_read_reg(sc, A_PL_REV);
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whoami = t4iov_read_reg(sc, A_PL_WHOAMI);
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if (G_CHIPID(pl_rev) <= CHELSIO_T5)
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sc->pf = G_SOURCEPF(whoami);
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else
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sc->pf = G_T6_SOURCEPF(whoami);
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2016-07-22 22:46:41 +00:00
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sc->sc_main = pci_find_dbsf(pci_get_domain(dev), pci_get_bus(dev),
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pci_get_slot(dev), 4);
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2017-01-31 18:54:13 +00:00
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if (sc->sc_main == NULL)
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return (ENXIO);
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2016-07-22 22:46:41 +00:00
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if (T4_IS_MAIN_READY(sc->sc_main) == 0)
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return (t4iov_attach_child(dev));
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return (0);
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}
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static int
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t4iov_attach_child(device_t dev)
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{
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struct t4iov_softc *sc;
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#ifdef PCI_IOV
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nvlist_t *pf_schema, *vf_schema;
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#endif
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2016-08-03 17:11:08 +00:00
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device_t pdev;
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int error;
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2016-07-22 22:46:41 +00:00
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sc = device_get_softc(dev);
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MPASS(!sc->sc_attached);
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/*
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* PF0-3 are associated with a specific port on the NIC (PF0
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2016-08-03 17:11:08 +00:00
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* with port 0, etc.). Ask the PF4 driver for the device for
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* this function's associated port to determine if the port is
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* present.
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2016-07-22 22:46:41 +00:00
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*/
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2016-08-03 17:11:08 +00:00
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error = T4_READ_PORT_DEVICE(sc->sc_main, pci_get_function(dev), &pdev);
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2016-07-22 22:46:41 +00:00
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if (error)
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return (0);
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#ifdef PCI_IOV
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pf_schema = pci_iov_schema_alloc_node();
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vf_schema = pci_iov_schema_alloc_node();
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2020-11-09 00:08:35 +00:00
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pci_iov_schema_add_unicast_mac(vf_schema, "mac-addr", 0, NULL);
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2016-08-03 17:11:08 +00:00
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error = pci_iov_attach_name(dev, pf_schema, vf_schema, "%s",
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device_get_nameunit(pdev));
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2016-07-22 22:46:41 +00:00
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if (error) {
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device_printf(dev, "Failed to initialize SR-IOV: %d\n", error);
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return (0);
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}
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#endif
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sc->sc_attached = true;
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return (0);
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}
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static int
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t4iov_detach_child(device_t dev)
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{
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struct t4iov_softc *sc;
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#ifdef PCI_IOV
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int error;
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#endif
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sc = device_get_softc(dev);
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if (!sc->sc_attached)
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return (0);
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#ifdef PCI_IOV
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error = pci_iov_detach(dev);
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if (error != 0) {
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device_printf(dev, "Failed to disable SR-IOV\n");
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return (error);
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}
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#endif
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sc->sc_attached = false;
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return (0);
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}
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static int
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t4iov_detach(device_t dev)
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{
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struct t4iov_softc *sc;
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2016-08-29 22:47:14 +00:00
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int error;
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2016-07-22 22:46:41 +00:00
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sc = device_get_softc(dev);
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2016-08-29 22:47:14 +00:00
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if (sc->sc_attached) {
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error = t4iov_detach_child(dev);
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if (error)
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return (error);
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}
|
2020-11-09 00:08:35 +00:00
|
|
|
if (sc->regs_res) {
|
|
|
|
bus_release_resource(dev, SYS_RES_MEMORY, sc->regs_rid,
|
|
|
|
sc->regs_res);
|
|
|
|
}
|
2016-07-22 22:46:41 +00:00
|
|
|
return (0);
|
|
|
|
}
|
|
|
|
|
|
|
|
#ifdef PCI_IOV
|
|
|
|
static int
|
|
|
|
t4iov_iov_init(device_t dev, uint16_t num_vfs, const struct nvlist *config)
|
|
|
|
{
|
|
|
|
|
|
|
|
/* XXX: The Linux driver sets up a vf_monitor task on T4 adapters. */
|
|
|
|
return (0);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void
|
|
|
|
t4iov_iov_uninit(device_t dev)
|
|
|
|
{
|
|
|
|
}
|
|
|
|
|
|
|
|
static int
|
|
|
|
t4iov_add_vf(device_t dev, uint16_t vfnum, const struct nvlist *config)
|
|
|
|
{
|
2020-11-09 00:08:35 +00:00
|
|
|
const void *mac;
|
|
|
|
struct t4iov_softc *sc;
|
|
|
|
struct adapter *adap;
|
|
|
|
uint8_t ma[ETHER_ADDR_LEN];
|
|
|
|
size_t size;
|
|
|
|
int rc;
|
|
|
|
|
|
|
|
if (nvlist_exists_binary(config, "mac-addr")) {
|
|
|
|
mac = nvlist_get_binary(config, "mac-addr", &size);
|
|
|
|
bcopy(mac, ma, ETHER_ADDR_LEN);
|
|
|
|
|
|
|
|
sc = device_get_softc(dev);
|
|
|
|
MPASS(sc->sc_attached);
|
|
|
|
MPASS(sc->sc_main != NULL);
|
|
|
|
adap = device_get_softc(sc->sc_main);
|
|
|
|
if (begin_synchronized_op(adap, NULL, SLEEP_OK | INTR_OK,
|
|
|
|
"t4vfma") != 0)
|
|
|
|
return (ENXIO);
|
|
|
|
rc = -t4_set_vf_mac(adap, sc->pf, vfnum + 1, 1, ma);
|
|
|
|
end_synchronized_op(adap, 0);
|
|
|
|
if (rc != 0) {
|
|
|
|
device_printf(dev,
|
|
|
|
"Failed to set VF%d MAC address to "
|
|
|
|
"%02x:%02x:%02x:%02x:%02x:%02x, rc = %d\n", vfnum,
|
|
|
|
ma[0], ma[1], ma[2], ma[3], ma[4], ma[5], rc);
|
|
|
|
return (rc);
|
|
|
|
}
|
|
|
|
}
|
2016-07-22 22:46:41 +00:00
|
|
|
|
|
|
|
return (0);
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
|
|
|
static device_method_t t4iov_methods[] = {
|
|
|
|
DEVMETHOD(device_probe, t4iov_probe),
|
|
|
|
DEVMETHOD(device_attach, t4iov_attach),
|
|
|
|
DEVMETHOD(device_detach, t4iov_detach),
|
|
|
|
|
|
|
|
#ifdef PCI_IOV
|
|
|
|
DEVMETHOD(pci_iov_init, t4iov_iov_init),
|
|
|
|
DEVMETHOD(pci_iov_uninit, t4iov_iov_uninit),
|
|
|
|
DEVMETHOD(pci_iov_add_vf, t4iov_add_vf),
|
|
|
|
#endif
|
|
|
|
|
|
|
|
DEVMETHOD(t4_attach_child, t4iov_attach_child),
|
|
|
|
DEVMETHOD(t4_detach_child, t4iov_detach_child),
|
|
|
|
|
|
|
|
DEVMETHOD_END
|
|
|
|
};
|
|
|
|
|
|
|
|
static driver_t t4iov_driver = {
|
|
|
|
"t4iov",
|
|
|
|
t4iov_methods,
|
|
|
|
sizeof(struct t4iov_softc)
|
|
|
|
};
|
|
|
|
|
|
|
|
static device_method_t t5iov_methods[] = {
|
|
|
|
DEVMETHOD(device_probe, t5iov_probe),
|
|
|
|
DEVMETHOD(device_attach, t4iov_attach),
|
|
|
|
DEVMETHOD(device_detach, t4iov_detach),
|
|
|
|
|
|
|
|
#ifdef PCI_IOV
|
|
|
|
DEVMETHOD(pci_iov_init, t4iov_iov_init),
|
|
|
|
DEVMETHOD(pci_iov_uninit, t4iov_iov_uninit),
|
|
|
|
DEVMETHOD(pci_iov_add_vf, t4iov_add_vf),
|
|
|
|
#endif
|
|
|
|
|
|
|
|
DEVMETHOD(t4_attach_child, t4iov_attach_child),
|
|
|
|
DEVMETHOD(t4_detach_child, t4iov_detach_child),
|
|
|
|
|
|
|
|
DEVMETHOD_END
|
|
|
|
};
|
|
|
|
|
|
|
|
static driver_t t5iov_driver = {
|
|
|
|
"t5iov",
|
|
|
|
t5iov_methods,
|
|
|
|
sizeof(struct t4iov_softc)
|
|
|
|
};
|
|
|
|
|
2016-09-16 00:08:37 +00:00
|
|
|
static device_method_t t6iov_methods[] = {
|
|
|
|
DEVMETHOD(device_probe, t6iov_probe),
|
|
|
|
DEVMETHOD(device_attach, t4iov_attach),
|
|
|
|
DEVMETHOD(device_detach, t4iov_detach),
|
|
|
|
|
|
|
|
#ifdef PCI_IOV
|
|
|
|
DEVMETHOD(pci_iov_init, t4iov_iov_init),
|
|
|
|
DEVMETHOD(pci_iov_uninit, t4iov_iov_uninit),
|
|
|
|
DEVMETHOD(pci_iov_add_vf, t4iov_add_vf),
|
|
|
|
#endif
|
|
|
|
|
|
|
|
DEVMETHOD(t4_attach_child, t4iov_attach_child),
|
|
|
|
DEVMETHOD(t4_detach_child, t4iov_detach_child),
|
|
|
|
|
|
|
|
DEVMETHOD_END
|
|
|
|
};
|
|
|
|
|
|
|
|
static driver_t t6iov_driver = {
|
|
|
|
"t6iov",
|
|
|
|
t6iov_methods,
|
|
|
|
sizeof(struct t4iov_softc)
|
|
|
|
};
|
|
|
|
|
|
|
|
static devclass_t t4iov_devclass, t5iov_devclass, t6iov_devclass;
|
2016-07-22 22:46:41 +00:00
|
|
|
|
|
|
|
DRIVER_MODULE(t4iov, pci, t4iov_driver, t4iov_devclass, 0, 0);
|
|
|
|
MODULE_VERSION(t4iov, 1);
|
|
|
|
|
|
|
|
DRIVER_MODULE(t5iov, pci, t5iov_driver, t5iov_devclass, 0, 0);
|
|
|
|
MODULE_VERSION(t5iov, 1);
|
2016-09-16 00:08:37 +00:00
|
|
|
|
|
|
|
DRIVER_MODULE(t6iov, pci, t6iov_driver, t6iov_devclass, 0, 0);
|
|
|
|
MODULE_VERSION(t6iov, 1);
|