2010-07-20 07:11:19 +00:00
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/***********************license start***************
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2010-11-28 06:20:41 +00:00
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* Copyright (c) 2003-2010 Cavium Networks (support@cavium.com). All rights
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* reserved.
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2010-07-20 07:11:19 +00:00
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*
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*
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2010-11-28 06:20:41 +00:00
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met:
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2010-07-20 07:11:19 +00:00
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*
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2010-11-28 06:20:41 +00:00
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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2010-07-20 07:11:19 +00:00
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*
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2010-11-28 06:20:41 +00:00
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* * Redistributions in binary form must reproduce the above
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* copyright notice, this list of conditions and the following
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* disclaimer in the documentation and/or other materials provided
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* with the distribution.
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* * Neither the name of Cavium Networks nor the names of
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* its contributors may be used to endorse or promote products
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* derived from this software without specific prior written
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* permission.
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* This Software, including technical data, may be subject to U.S. export control
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* laws, including the U.S. Export Administration Act and its associated
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* regulations, and may be subject to export or import regulations in other
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* countries.
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* TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS"
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* AND WITH ALL FAULTS AND CAVIUM NETWORKS MAKES NO PROMISES, REPRESENTATIONS OR
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* WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH RESPECT TO
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* THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY REPRESENTATION OR
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* DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT DEFECTS, AND CAVIUM
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* SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY) WARRANTIES OF TITLE,
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* MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A PARTICULAR PURPOSE, LACK OF
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* VIRUSES, ACCURACY OR COMPLETENESS, QUIET ENJOYMENT, QUIET POSSESSION OR
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* CORRESPONDENCE TO DESCRIPTION. THE ENTIRE RISK ARISING OUT OF USE OR
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* PERFORMANCE OF THE SOFTWARE LIES WITH YOU.
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2010-07-20 07:11:19 +00:00
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***********************license end**************************************/
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2010-11-28 06:20:41 +00:00
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2010-07-20 07:11:19 +00:00
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/**
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* @file
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*
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* Implementation of spinlocks.
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*
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2010-11-28 06:20:41 +00:00
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* <hr>$Revision: 49448 $<hr>
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2010-07-20 07:11:19 +00:00
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*/
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#ifndef __CVMX_SPINLOCK_H__
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#define __CVMX_SPINLOCK_H__
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#include "cvmx-asm.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* Spinlocks for Octeon */
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// define these to enable recursive spinlock debugging
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//#define CVMX_SPINLOCK_DEBUG
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/**
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* Spinlocks for Octeon
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*/
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typedef struct {
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volatile uint32_t value;
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} cvmx_spinlock_t;
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// note - macros not expanded in inline ASM, so values hardcoded
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#define CVMX_SPINLOCK_UNLOCKED_VAL 0
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#define CVMX_SPINLOCK_LOCKED_VAL 1
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#define CVMX_SPINLOCK_UNLOCKED_INITIALIZER {CVMX_SPINLOCK_UNLOCKED_VAL}
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/**
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* Initialize a spinlock
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*
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* @param lock Lock to initialize
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*/
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static inline void cvmx_spinlock_init(cvmx_spinlock_t *lock)
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{
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lock->value = CVMX_SPINLOCK_UNLOCKED_VAL;
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}
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/**
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* Return non-zero if the spinlock is currently locked
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*
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* @param lock Lock to check
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* @return Non-zero if locked
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*/
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static inline int cvmx_spinlock_locked(cvmx_spinlock_t *lock)
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{
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return (lock->value != CVMX_SPINLOCK_UNLOCKED_VAL);
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}
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/**
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* Releases lock
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*
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* @param lock pointer to lock structure
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*/
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static inline void cvmx_spinlock_unlock(cvmx_spinlock_t *lock)
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{
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CVMX_SYNCWS;
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lock->value = 0;
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CVMX_SYNCWS;
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}
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/**
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* Attempts to take the lock, but does not spin if lock is not available.
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* May take some time to acquire the lock even if it is available
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* due to the ll/sc not succeeding.
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*
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* @param lock pointer to lock structure
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*
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* @return 0: lock successfully taken
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* 1: lock not taken, held by someone else
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* These return values match the Linux semantics.
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*/
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static inline unsigned int cvmx_spinlock_trylock(cvmx_spinlock_t *lock)
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{
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unsigned int tmp;
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__asm__ __volatile__(
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".set noreorder \n"
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"1: ll %[tmp], %[val] \n"
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" bnez %[tmp], 2f \n" // if lock held, fail immediately
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" li %[tmp], 1 \n"
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" sc %[tmp], %[val] \n"
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" beqz %[tmp], 1b \n"
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" li %[tmp], 0 \n"
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"2: \n"
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".set reorder \n"
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: [val] "+m" (lock->value), [tmp] "=&r" (tmp)
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:
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: "memory");
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return (!!tmp); /* normalize to 0 or 1 */
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}
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/**
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* Gets lock, spins until lock is taken
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*
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* @param lock pointer to lock structure
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*/
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static inline void cvmx_spinlock_lock(cvmx_spinlock_t *lock)
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{
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unsigned int tmp;
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__asm__ __volatile__(
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".set noreorder \n"
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"1: ll %[tmp], %[val] \n"
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" bnez %[tmp], 1b \n"
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" li %[tmp], 1 \n"
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" sc %[tmp], %[val] \n"
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" beqz %[tmp], 1b \n"
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" nop \n"
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".set reorder \n"
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: [val] "+m" (lock->value), [tmp] "=&r" (tmp)
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:
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: "memory");
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}
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/** ********************************************************************
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* Bit spinlocks
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* These spinlocks use a single bit (bit 31) of a 32 bit word for locking.
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* The rest of the bits in the word are left undisturbed. This enables more
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* compact data structures as only 1 bit is consumed for the lock.
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*
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*/
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/**
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* Gets lock, spins until lock is taken
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* Preserves the low 31 bits of the 32 bit
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* word used for the lock.
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*
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*
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* @param word word to lock bit 31 of
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*/
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static inline void cvmx_spinlock_bit_lock(uint32_t *word)
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{
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unsigned int tmp;
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unsigned int sav;
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__asm__ __volatile__(
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".set noreorder \n"
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".set noat \n"
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"1: ll %[tmp], %[val] \n"
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" bbit1 %[tmp], 31, 1b \n"
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" li $at, 1 \n"
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" ins %[tmp], $at, 31, 1 \n"
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" sc %[tmp], %[val] \n"
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" beqz %[tmp], 1b \n"
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" nop \n"
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".set at \n"
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".set reorder \n"
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: [val] "+m" (*word), [tmp] "=&r" (tmp), [sav] "=&r" (sav)
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:
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: "memory");
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}
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/**
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* Attempts to get lock, returns immediately with success/failure
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* Preserves the low 31 bits of the 32 bit
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* word used for the lock.
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*
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*
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* @param word word to lock bit 31 of
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* @return 0: lock successfully taken
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* 1: lock not taken, held by someone else
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* These return values match the Linux semantics.
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*/
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static inline unsigned int cvmx_spinlock_bit_trylock(uint32_t *word)
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{
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unsigned int tmp;
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__asm__ __volatile__(
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".set noreorder \n"
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".set noat \n"
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"1: ll %[tmp], %[val] \n"
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" bbit1 %[tmp], 31, 2f \n" // if lock held, fail immediately
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" li $at, 1 \n"
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" ins %[tmp], $at, 31, 1 \n"
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" sc %[tmp], %[val] \n"
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" beqz %[tmp], 1b \n"
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" li %[tmp], 0 \n"
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"2: \n"
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".set at \n"
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".set reorder \n"
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: [val] "+m" (*word), [tmp] "=&r" (tmp)
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:
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: "memory");
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return (!!tmp); /* normalize to 0 or 1 */
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}
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/**
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* Releases bit lock
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*
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* Unconditionally clears bit 31 of the lock word. Note that this is
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* done non-atomically, as this implementation assumes that the rest
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* of the bits in the word are protected by the lock.
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*
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* @param word word to unlock bit 31 in
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*/
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static inline void cvmx_spinlock_bit_unlock(uint32_t *word)
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{
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CVMX_SYNCWS;
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*word &= ~(1UL << 31) ;
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CVMX_SYNCWS;
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}
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/** ********************************************************************
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* Recursive spinlocks
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*/
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typedef struct {
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volatile unsigned int value;
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volatile unsigned int core_num;
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} cvmx_spinlock_rec_t;
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/**
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* Initialize a recursive spinlock
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*
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* @param lock Lock to initialize
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*/
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static inline void cvmx_spinlock_rec_init(cvmx_spinlock_rec_t *lock)
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{
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lock->value = CVMX_SPINLOCK_UNLOCKED_VAL;
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}
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/**
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* Return non-zero if the recursive spinlock is currently locked
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*
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* @param lock Lock to check
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* @return Non-zero if locked
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*/
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static inline int cvmx_spinlock_rec_locked(cvmx_spinlock_rec_t *lock)
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{
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return (lock->value != CVMX_SPINLOCK_UNLOCKED_VAL);
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}
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/**
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* Unlocks one level of recursive spinlock. Lock is not unlocked
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* unless this is the final unlock call for that spinlock
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*
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* @param lock ptr to recursive spinlock structure
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*/
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static inline void cvmx_spinlock_rec_unlock(cvmx_spinlock_rec_t *lock);
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#ifdef CVMX_SPINLOCK_DEBUG
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#define cvmx_spinlock_rec_unlock(x) _int_cvmx_spinlock_rec_unlock((x), __FILE__, __LINE__)
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static inline void _int_cvmx_spinlock_rec_unlock(cvmx_spinlock_rec_t *lock, char *filename, int linenum)
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#else
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static inline void cvmx_spinlock_rec_unlock(cvmx_spinlock_rec_t *lock)
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#endif
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{
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unsigned int temp, result;
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int core_num;
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core_num = cvmx_get_core_num();
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#ifdef CVMX_SPINLOCK_DEBUG
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{
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if (lock->core_num != core_num)
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{
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cvmx_dprintf("ERROR: Recursive spinlock release attemped by non-owner! file: %s, line: %d\n", filename, linenum);
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return;
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}
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}
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#endif
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__asm__ __volatile__(
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".set noreorder \n"
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" addi %[tmp], %[pid], 0x80 \n"
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" sw %[tmp], %[lid] # set lid to invalid value\n"
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CVMX_SYNCWS_STR
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"1: ll %[tmp], %[val] \n"
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" addu %[res], %[tmp], -1 # decrement lock count\n"
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" sc %[res], %[val] \n"
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" beqz %[res], 1b \n"
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" nop \n"
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" beq %[tmp], %[res], 2f # res is 1 on successful sc \n"
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" nop \n"
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" sw %[pid], %[lid] # set lid to pid, only if lock still held\n"
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"2: \n"
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CVMX_SYNCWS_STR
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".set reorder \n"
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: [res] "=&r" (result), [tmp] "=&r" (temp), [val] "+m" (lock->value), [lid] "+m" (lock->core_num)
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: [pid] "r" (core_num)
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: "memory");
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#ifdef CVMX_SPINLOCK_DEBUG
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{
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if (lock->value == ~0UL)
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{
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cvmx_dprintf("ERROR: Recursive spinlock released too many times! file: %s, line: %d\n", filename, linenum);
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}
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}
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#endif
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}
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/**
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* Takes recursive spinlock for a given core. A core can take the lock multiple
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* times, and the lock is released only when the corresponding number of
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* unlocks have taken place.
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*
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* NOTE: This assumes only one thread per core, and that the core ID is used as
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* the lock 'key'. (This implementation cannot be generalized to allow
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* multiple threads to use the same key (core id) .)
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*
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* @param lock address of recursive spinlock structure. Note that this is
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* distinct from the standard spinlock
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*/
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static inline void cvmx_spinlock_rec_lock(cvmx_spinlock_rec_t *lock);
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#ifdef CVMX_SPINLOCK_DEBUG
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#define cvmx_spinlock_rec_lock(x) _int_cvmx_spinlock_rec_lock((x), __FILE__, __LINE__)
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static inline void _int_cvmx_spinlock_rec_lock(cvmx_spinlock_rec_t *lock, char *filename, int linenum)
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#else
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static inline void cvmx_spinlock_rec_lock(cvmx_spinlock_rec_t *lock)
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#endif
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{
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volatile unsigned int tmp;
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volatile int core_num;
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core_num = cvmx_get_core_num();
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__asm__ __volatile__(
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".set noreorder \n"
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"1: ll %[tmp], %[val] # load the count\n"
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" bnez %[tmp], 2f # if count!=zero branch to 2\n"
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" addu %[tmp], %[tmp], 1 \n"
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" sc %[tmp], %[val] \n"
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" beqz %[tmp], 1b # go back if not success\n"
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" nop \n"
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" j 3f # go to write core_num \n"
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"2: lw %[tmp], %[lid] # load the core_num \n"
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" bne %[tmp], %[pid], 1b # core_num no match, restart\n"
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" nop \n"
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" lw %[tmp], %[val] \n"
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" addu %[tmp], %[tmp], 1 \n"
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" sw %[tmp], %[val] # update the count\n"
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"3: sw %[pid], %[lid] # store the core_num\n"
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CVMX_SYNCWS_STR
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".set reorder \n"
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: [tmp] "=&r" (tmp), [val] "+m" (lock->value), [lid] "+m" (lock->core_num)
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: [pid] "r" (core_num)
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: "memory");
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#ifdef CVMX_SPINLOCK_DEBUG
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if (lock->core_num != core_num)
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{
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cvmx_dprintf("cvmx_spinlock_rec_lock: lock taken, but core_num is incorrect. file: %s, line: %d\n", filename, linenum);
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}
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#endif
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}
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#ifdef __cplusplus
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}
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#endif
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#endif /* __CVMX_SPINLOCK_H__ */
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