202 lines
5.5 KiB
C
202 lines
5.5 KiB
C
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/* $FreeBSD$ */
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/* $NecBSD: nspreg.h,v 1.4 1999/04/15 01:35:55 kmatsuda Exp $ */
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/* $NetBSD$ */
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/*
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* [NetBSD for NEC PC-98 series]
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* Copyright (c) 1998
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* NetBSD/pc98 porting staff. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
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* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
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* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef _NSPREG_H_
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#define _NSPREG_H_
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/* base registers */
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#define nsp_irqcr 0
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#define IRQCR_RESCL 0x01
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#define IRQCR_PHCL 0x02
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#define IRQCR_TIMERCL 0x04
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#define IRQCR_FIFOCL 0x08
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#define IRQCR_SCSIIDIS 0x10
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#define IRQCR_EXTIDIS 0x20
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#define IRQCR_TIMERIDIS 0x40
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#define IRQCR_FIFOIDIS 0x80
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#define IRQCR_ALLMASK 0xff
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#define IRQCR_IRQDIS 0xf0
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#define nsp_irqsr 0
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#define IRQSR_SCSI 0x01
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#define IRQSR_EXT 0x02
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#define IRQSR_TIMER 0x04
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#define IRQSR_FIFO 0x08
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#define IRQSR_MASK 0x0f
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#define nsp_ifselr 1
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#define IFSELR_IFSEL 0x01
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#define IFSELR_REGSEL 0x04
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#define nsp_fifosr 1
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#define FIFOSR_CHIPREVM 0x0f
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#define FIFOSR_CHIPIDM 0x70
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#define FIFOSR_FULLEMP 0x80
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#define nsp_idxr 2
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#define nsp_datar 3
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#define nsp_fifodr 4
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/* indexed registers */
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#define NSPR_EXTBUSC 0x10
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#define NSPR_CLKDIVR 0x11
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#define CLKDIVR_40M 0x02
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#define CLKDIVR_20M 0x01
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#define NSPR_TERMPWRC 0x13
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#define TERMPWRC_POWON 0x01
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#define NSPR_SCIENR 0x15
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#define SCIENR_SCCHG 0x01
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#define SCIENR_RESEL 0x10
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#define SCIENR_FIFO 0x20
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#define SCIENR_RST 0x40
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#define NSPR_IRQPHS 0x16
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#define IRQPHS_LMSG 0x01
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#define IRQPHS_LIO 0x02
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#define IRQPHS_LCD 0x04
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#define IRQPHS_LBF 0x08
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#define IRQPHS_PCHG 0x10
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#define IRQPHS_RSEL 0x20
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#define IRQPHS_FIFO 0x40
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#define IRQPHS_RST 0x80
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#define NSPR_TIMERCNT 0x17
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#define NSPR_SCBUSCR 0x18
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#define SCBUSCR_SEL 0x01
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#define SCBUSCR_RST 0x02
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#define SCBUSCR_DOUT 0x04
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#define SCBUSCR_ATN 0x08
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#define SCBUSCR_ACK 0x10
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#define SCBUSCR_BSY 0x20
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#define SCBUSCR_ADIR 0x40
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#define SCBUSCR_ACKEN 0x80
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#define NSPR_SCBUSMON 0x19
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#define SCBUSMON_MSG 0x01
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#define SCBUSMON_IO 0x02
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#define SCBUSMON_CD 0x04
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#define SCBUSMON_BSY 0x08
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#define SCBUSMON_ACK 0x10
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#define SCBUSMON_REQ 0x20
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#define SCBUSMON_SEL 0x40
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#define SCBUSMON_ATN 0x80
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#define NSPR_SETARBIT 0x1A
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#define NSPR_ARBITS 0x1A
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#define ARBITS_EXEC 0x01
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#define ARBITS_CLR 0x02
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#define ARBITS_WIN 0x02
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#define ARBITS_FAIL 0x04
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#define ARBITS_RESEL 0x08
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#define NSPR_PARITYR 0x1B /* (W/R) */
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#define NSPR_CMDCR 0x1C /* (W) */
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#define CMDCR_PTCLR 0x01
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#define CMDCR_EXEC 0x02
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#define NSPR_RESELR 0x1C /* (R) */
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#define NSPR_CMDDR 0x1D /* (W/R) */
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#define NSPR_PTCLRR 0x1E /* (W) */
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#define PTCLRR_PT 0x01
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#define PTCLRR_ACK 0x02
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#define PTCLRR_REQ 0x04
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#define PTCLRR_HOST 0x08
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#define PTCLRR_RSS 0x30
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#define NSPR_XFERCR 0x1E /* (R) */
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#define NSPR_XFERMR 0x20
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#define XFERMR_MEM8 0x01
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#define XFERMR_MEM32 0x02
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#define XFERMR_ADR24 0x04
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#define XFERMR_ADR32 0x08
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#define XFERMR_IO8 0x10
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#define XFERMR_IO32 0x20
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#define XFERMR_XEN 0x40
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#define XFERMR_FIFOEN 0x80
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#define NSPR_SYNCR 0x21
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#define SYNCR_OFFM 0x0f
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#define SYNCR_PERM 0xf0
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#define SYNCR_PERS 4
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#define NSPR_DATA 0x22
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#define NSPR_DATAACK 0x23
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#define NSPR_OCR 0x26
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#define OCR_ROMEN 0x01
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#define OCR_TERMPWROUT 0x02
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#define OCR_TERMPWRS 0x04
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#define NSPR_ACKWIDTH 0x27
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/* SCBUSMON phase defs */
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#define SCBUSMON_FREE 0
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#define SCBUSMON_CMD \
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(SCBUSMON_BSY | SCBUSMON_CD | SCBUSMON_REQ)
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#define SCBUSMON_MSGIN \
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(SCBUSMON_BSY | SCBUSMON_MSG | SCBUSMON_IO | SCBUSMON_CD | SCBUSMON_REQ)
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#define SCBUSMON_MSGOUT \
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(SCBUSMON_BSY | SCBUSMON_MSG | SCBUSMON_CD | SCBUSMON_REQ)
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#define SCBUSMON_DATAIN \
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(SCBUSMON_BSY | SCBUSMON_IO | SCBUSMON_REQ)
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#define SCBUSMON_DATAOUT \
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(SCBUSMON_BSY | SCBUSMON_REQ)
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#define SCBUSMON_STATUS \
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(SCBUSMON_BSY | SCBUSMON_IO | SCBUSMON_CD | SCBUSMON_REQ)
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#define SCBUSMON_RESELECT \
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(SCBUSMON_SEL | SCBUSMON_IO)
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#define SCBUSMON_PHMASK \
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(SCBUSMON_SEL | SCBUSMON_CD | SCBUSMON_MSG | SCBUSMON_IO)
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/* SCSI phase */
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#define PHASE_CMD (SCBUSMON_CMD & SCBUSMON_PHMASK)
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#define PHASE_DATAIN (SCBUSMON_DATAIN & SCBUSMON_PHMASK)
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#define PHASE_DATAOUT (SCBUSMON_DATAOUT & SCBUSMON_PHMASK)
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#define PHASE_STATUS (SCBUSMON_STATUS & SCBUSMON_PHMASK)
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#define PHASE_MSGIN (SCBUSMON_MSGIN & SCBUSMON_PHMASK)
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#define PHASE_MSGOUT (SCBUSMON_MSGOUT & SCBUSMON_PHMASK)
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#define PHASE_SEL (SCBUSMON_SEL | SCBUSMON_IO)
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/* Size */
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#define NSP_MEMSIZE NBPG
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#define NSP_IOSIZE 16
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#define NSP_BUFFER_SIZE 512
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#endif /* !_NSPREG_H_ */
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