2001-03-06 21:43:46 +00:00
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/*-
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2004-01-11 22:08:34 +00:00
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* Copyright (c) 1998 - 2004 S<EFBFBD>ren Schmidt <sos@FreeBSD.org>
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2001-03-06 21:43:46 +00:00
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer,
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* without modification, immediately at the beginning of the file.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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2003-08-24 17:55:58 +00:00
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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2002-04-05 13:13:56 +00:00
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#include "opt_ata.h"
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2001-03-06 21:43:46 +00:00
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/kernel.h>
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#include <sys/module.h>
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#include <sys/bus.h>
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#include <sys/malloc.h>
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2004-01-11 22:08:34 +00:00
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#include <sys/sema.h>
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2003-08-24 09:22:26 +00:00
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#include <sys/taskqueue.h>
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2004-01-14 21:26:35 +00:00
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#include <vm/uma.h>
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2001-03-06 21:43:46 +00:00
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#include <machine/stdarg.h>
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#include <machine/resource.h>
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#include <machine/bus.h>
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#ifdef __alpha__
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#include <machine/md_var.h>
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#endif
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#include <sys/rman.h>
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2003-08-22 05:54:52 +00:00
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#include <dev/pci/pcivar.h>
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#include <dev/pci/pcireg.h>
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2001-03-06 21:43:46 +00:00
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#include <dev/ata/ata-all.h>
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2003-02-20 20:02:32 +00:00
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#include <dev/ata/ata-pci.h>
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2001-03-06 21:43:46 +00:00
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2003-02-20 20:02:32 +00:00
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/* local vars */
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static MALLOC_DEFINE(M_ATAPCI, "ATA PCI", "ATA driver PCI");
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2001-03-06 21:43:46 +00:00
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2001-09-25 17:10:39 +00:00
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/* misc defines */
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2001-12-25 14:44:26 +00:00
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#define IOMASK 0xfffffffc
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2001-03-06 21:43:46 +00:00
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2003-02-20 20:02:32 +00:00
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/* prototypes */
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2003-03-29 13:37:09 +00:00
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static int ata_pci_allocate(device_t, struct ata_channel *);
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2003-08-25 11:13:04 +00:00
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static void ata_pci_dmainit(struct ata_channel *);
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2004-10-06 19:46:08 +00:00
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static int ata_pci_locknoop(struct ata_channel *, int);
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2001-09-25 17:10:39 +00:00
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2004-04-21 20:03:26 +00:00
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int
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ata_legacy(device_t dev)
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{
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return ((pci_read_config(dev, PCIR_PROGIF, 1)&PCIP_STORAGE_IDE_MASTERDEV) &&
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2004-06-15 11:02:09 +00:00
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((pci_read_config(dev, PCIR_PROGIF, 1) &
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2004-04-21 20:03:26 +00:00
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(PCIP_STORAGE_IDE_MODEPRIM | PCIP_STORAGE_IDE_MODESEC)) !=
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(PCIP_STORAGE_IDE_MODEPRIM | PCIP_STORAGE_IDE_MODESEC)));
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}
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2003-02-20 20:02:32 +00:00
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static int
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ata_pci_probe(device_t dev)
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2001-03-06 21:43:46 +00:00
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{
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if (pci_get_class(dev) != PCIC_STORAGE)
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2003-02-20 20:02:32 +00:00
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return ENXIO;
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2001-03-06 21:43:46 +00:00
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2003-02-20 20:02:32 +00:00
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switch (pci_get_vendor(dev)) {
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case ATA_ACARD_ID:
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2004-06-15 11:02:09 +00:00
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if (!ata_acard_ident(dev))
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return 0;
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break;
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2003-02-20 20:02:32 +00:00
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case ATA_ACER_LABS_ID:
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2004-06-15 11:02:09 +00:00
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if (!ata_ali_ident(dev))
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return 0;
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break;
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2003-02-20 20:02:32 +00:00
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case ATA_AMD_ID:
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2004-06-15 11:02:09 +00:00
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if (!ata_amd_ident(dev))
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return 0;
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break;
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2003-02-20 20:02:32 +00:00
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case ATA_CYRIX_ID:
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2004-06-15 11:02:09 +00:00
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if (!ata_cyrix_ident(dev))
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return 0;
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break;
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2003-02-20 20:02:32 +00:00
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case ATA_CYPRESS_ID:
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2004-06-15 11:02:09 +00:00
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if (!ata_cypress_ident(dev))
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return 0;
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break;
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2003-02-20 20:02:32 +00:00
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case ATA_HIGHPOINT_ID:
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2004-06-15 11:02:09 +00:00
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if (!ata_highpoint_ident(dev))
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return 0;
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break;
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2003-02-20 20:02:32 +00:00
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case ATA_INTEL_ID:
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2004-06-15 11:02:09 +00:00
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if (!ata_intel_ident(dev))
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return 0;
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break;
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2004-12-08 11:17:38 +00:00
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case ATA_ITE_ID:
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if (!ata_ite_ident(dev))
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return 0;
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break;
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2003-12-09 19:13:50 +00:00
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case ATA_NATIONAL_ID:
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2004-06-15 11:02:09 +00:00
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if (!ata_national_ident(dev))
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2003-12-09 19:13:50 +00:00
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return 0;
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break;
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2003-02-20 20:02:32 +00:00
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case ATA_NVIDIA_ID:
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2004-06-15 11:02:09 +00:00
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if (!ata_nvidia_ident(dev))
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return 0;
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break;
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2003-02-20 20:02:32 +00:00
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case ATA_PROMISE_ID:
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2004-06-15 11:02:09 +00:00
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if (!ata_promise_ident(dev))
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return 0;
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break;
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2003-02-20 20:02:32 +00:00
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case ATA_SERVERWORKS_ID:
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2004-06-15 11:02:09 +00:00
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if (!ata_serverworks_ident(dev))
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return 0;
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break;
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2003-02-20 20:02:32 +00:00
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case ATA_SILICON_IMAGE_ID:
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2004-06-15 11:02:09 +00:00
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if (!ata_sii_ident(dev))
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return 0;
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break;
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2003-02-20 20:02:32 +00:00
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case ATA_SIS_ID:
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2004-06-15 11:02:09 +00:00
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if (!ata_sis_ident(dev))
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return 0;
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break;
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2003-02-20 20:02:32 +00:00
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case ATA_VIA_ID:
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2004-06-15 11:02:09 +00:00
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if (!ata_via_ident(dev))
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return 0;
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break;
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2004-12-08 11:17:38 +00:00
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case ATA_CENATEK_ID:
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if (pci_get_devid(dev) == ATA_CENATEK_ROCKET) {
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2003-03-29 13:37:09 +00:00
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ata_generic_ident(dev);
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2003-02-20 20:02:32 +00:00
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device_set_desc(dev, "Cenatek Rocket Drive controller");
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return 0;
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2002-02-11 15:48:04 +00:00
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}
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2003-10-28 19:01:48 +00:00
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break;
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2004-12-08 11:17:38 +00:00
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case ATA_MICRON_ID:
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if (pci_get_devid(dev) == ATA_MICRON_RZ1000 ||
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pci_get_devid(dev) == ATA_MICRON_RZ1001) {
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2003-03-29 13:37:09 +00:00
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ata_generic_ident(dev);
|
2003-02-20 20:02:32 +00:00
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device_set_desc(dev,
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2004-12-08 11:17:38 +00:00
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"RZ 100? ATA controller !WARNING! data loss/corruption risk");
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2003-02-20 20:02:32 +00:00
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return 0;
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}
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2003-10-28 19:01:48 +00:00
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break;
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}
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2001-03-06 21:43:46 +00:00
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2003-02-20 20:02:32 +00:00
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/* unknown chipset, try generic DMA if it seems possible */
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2003-10-28 19:01:48 +00:00
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if ((pci_get_class(dev) == PCIC_STORAGE) &&
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(pci_get_subclass(dev) == PCIS_STORAGE_IDE))
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return ata_generic_ident(dev);
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2003-02-20 20:02:32 +00:00
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return ENXIO;
|
2001-03-06 21:43:46 +00:00
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}
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static int
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ata_pci_attach(device_t dev)
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{
|
2003-03-29 13:37:09 +00:00
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struct ata_pci_controller *ctlr = device_get_softc(dev);
|
2004-03-15 12:03:48 +00:00
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u_int32_t cmd;
|
2004-04-27 12:54:59 +00:00
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int unit;
|
2001-03-06 21:43:46 +00:00
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2003-03-29 13:37:09 +00:00
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/* do chipset specific setups only needed once */
|
2004-04-30 18:49:03 +00:00
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if (ata_legacy(dev) || pci_read_config(dev, PCIR_BAR(2), 4) & IOMASK)
|
2003-03-29 13:37:09 +00:00
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ctlr->channels = 2;
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else
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ctlr->channels = 1;
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ctlr->allocate = ata_pci_allocate;
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ctlr->dmainit = ata_pci_dmainit;
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ctlr->locking = ata_pci_locknoop;
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|
2004-03-15 12:03:48 +00:00
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/* if needed try to enable busmastering */
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cmd = pci_read_config(dev, PCIR_COMMAND, 2);
|
2002-04-05 13:13:56 +00:00
|
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|
if (!(cmd & PCIM_CMD_BUSMASTEREN)) {
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pci_write_config(dev, PCIR_COMMAND, cmd | PCIM_CMD_BUSMASTEREN, 2);
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cmd = pci_read_config(dev, PCIR_COMMAND, 2);
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}
|
2003-03-29 13:37:09 +00:00
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|
2004-03-15 12:03:48 +00:00
|
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/* if busmastering mode "stuck" use it */
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if ((cmd & PCIM_CMD_BUSMASTEREN) == PCIM_CMD_BUSMASTEREN) {
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ctlr->r_type1 = SYS_RES_IOPORT;
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|
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ctlr->r_rid1 = ATA_BMADDR_RID;
|
2004-03-17 17:50:55 +00:00
|
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|
ctlr->r_res1 = bus_alloc_resource_any(dev, ctlr->r_type1, &ctlr->r_rid1,
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|
|
|
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RF_ACTIVE);
|
2001-03-06 21:43:46 +00:00
|
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|
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}
|
|
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|
2003-06-07 15:19:16 +00:00
|
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|
ctlr->chipinit(dev);
|
|
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|
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|
2003-03-29 13:37:09 +00:00
|
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|
|
/* attach all channels on this controller */
|
2004-04-30 18:49:03 +00:00
|
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|
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for (unit = 0; unit < ctlr->channels; unit++) {
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|
|
|
|
if (unit == 0 && (pci_get_progif(dev) & 0x81) == 0x80) {
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|
|
|
|
device_add_child(dev, "ata", unit);
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|
|
|
|
continue;
|
|
|
|
|
}
|
|
|
|
|
if (unit == 1 && (pci_get_progif(dev) & 0x84) == 0x80) {
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|
|
|
|
device_add_child(dev, "ata", unit);
|
|
|
|
|
continue;
|
|
|
|
|
}
|
|
|
|
|
device_add_child(dev, "ata", devclass_find_free_unit(ata_devclass, 2));
|
|
|
|
|
}
|
2004-04-13 09:44:20 +00:00
|
|
|
|
return bus_generic_attach(dev);
|
|
|
|
|
}
|
2001-03-06 21:43:46 +00:00
|
|
|
|
|
2004-03-15 12:03:48 +00:00
|
|
|
|
static int
|
|
|
|
|
ata_pci_detach(device_t dev)
|
|
|
|
|
{
|
|
|
|
|
struct ata_pci_controller *ctlr = device_get_softc(dev);
|
|
|
|
|
struct ata_channel *ch;
|
|
|
|
|
int unit;
|
|
|
|
|
|
|
|
|
|
/* mark HW as gone, we dont want to issue commands to HW no longer there */
|
|
|
|
|
for (unit = 0; unit < ctlr->channels; unit++) {
|
|
|
|
|
if ((ch = ctlr->interrupt[unit].argument))
|
|
|
|
|
ch->flags |= ATA_HWGONE;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
bus_generic_detach(dev);
|
|
|
|
|
|
|
|
|
|
if (ctlr->r_irq) {
|
|
|
|
|
bus_teardown_intr(dev, ctlr->r_irq, ctlr->handle);
|
|
|
|
|
bus_release_resource(dev, SYS_RES_IRQ, ATA_IRQ_RID, ctlr->r_irq);
|
|
|
|
|
}
|
|
|
|
|
if (ctlr->r_res2)
|
|
|
|
|
bus_release_resource(dev, ctlr->r_type2, ctlr->r_rid2, ctlr->r_res2);
|
|
|
|
|
if (ctlr->r_res1)
|
|
|
|
|
bus_release_resource(dev, ctlr->r_type1, ctlr->r_rid1, ctlr->r_res1);
|
|
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
|
}
|
2001-03-06 21:43:46 +00:00
|
|
|
|
|
|
|
|
|
static int
|
|
|
|
|
ata_pci_print_child(device_t dev, device_t child)
|
|
|
|
|
{
|
Major update of the ATA RAID code, part 1:
Overhaul of the attach/detach code and structures, there were some nasty
bugs in the old implementation. This made it possible to collapse the
ATA/ATAPI device control structures into one generic structure.
A note here, the kernel is NOT ready for detach of active devices,
it fails all over in random places, but for inactive devices it works.
However for ATA RAID this works, since the RAID abstration layer
insulates the buggy^H^H^H^H^H^Hfragile device subsystem from the
physical disks.
Proberly detect the RAID's from the BIOS, and mark critical RAID1
arrays as such, but continue if there is enough of the mirror left
to do so.
Properly fail arrays on a live system. For RAID0 that means return EIO,
and for RAID1 it means continue on the still working part of the mirror
if possible, else return EIO.
If the state changes, log this to the console.
Allow for Promise & Highpoint controllers/arrays to coexist on the
same machine. It is not possible to distribute arrays over different
makes of controllers though.
If Promise SuperSwap enclosures are used, signal disk state on the
status LED on the front.
Misc fixes that I had lying around for various minor bugs.
Sponsored by: Advanis Inc.
2002-02-04 19:23:40 +00:00
|
|
|
|
struct ata_channel *ch = device_get_softc(child);
|
2001-03-06 21:43:46 +00:00
|
|
|
|
int retval = 0;
|
|
|
|
|
|
|
|
|
|
retval += bus_print_child_header(dev, child);
|
2004-08-12 08:20:36 +00:00
|
|
|
|
retval += printf(": channel #%d", ch->unit);
|
2001-03-06 21:43:46 +00:00
|
|
|
|
retval += bus_print_child_footer(dev, child);
|
|
|
|
|
return retval;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static struct resource *
|
|
|
|
|
ata_pci_alloc_resource(device_t dev, device_t child, int type, int *rid,
|
|
|
|
|
u_long start, u_long end, u_long count, u_int flags)
|
|
|
|
|
{
|
Major update of the ATA RAID code, part 1:
Overhaul of the attach/detach code and structures, there were some nasty
bugs in the old implementation. This made it possible to collapse the
ATA/ATAPI device control structures into one generic structure.
A note here, the kernel is NOT ready for detach of active devices,
it fails all over in random places, but for inactive devices it works.
However for ATA RAID this works, since the RAID abstration layer
insulates the buggy^H^H^H^H^H^Hfragile device subsystem from the
physical disks.
Proberly detect the RAID's from the BIOS, and mark critical RAID1
arrays as such, but continue if there is enough of the mirror left
to do so.
Properly fail arrays on a live system. For RAID0 that means return EIO,
and for RAID1 it means continue on the still working part of the mirror
if possible, else return EIO.
If the state changes, log this to the console.
Allow for Promise & Highpoint controllers/arrays to coexist on the
same machine. It is not possible to distribute arrays over different
makes of controllers though.
If Promise SuperSwap enclosures are used, signal disk state on the
status LED on the front.
Misc fixes that I had lying around for various minor bugs.
Sponsored by: Advanis Inc.
2002-02-04 19:23:40 +00:00
|
|
|
|
struct ata_pci_controller *controller = device_get_softc(dev);
|
|
|
|
|
int unit = ((struct ata_channel *)device_get_softc(child))->unit;
|
2003-02-20 20:02:32 +00:00
|
|
|
|
struct resource *res = NULL;
|
2001-03-06 21:43:46 +00:00
|
|
|
|
int myrid;
|
|
|
|
|
|
|
|
|
|
if (type == SYS_RES_IOPORT) {
|
|
|
|
|
switch (*rid) {
|
|
|
|
|
case ATA_IOADDR_RID:
|
2004-04-21 20:03:26 +00:00
|
|
|
|
if (ata_legacy(dev)) {
|
Major update of the ATA RAID code, part 1:
Overhaul of the attach/detach code and structures, there were some nasty
bugs in the old implementation. This made it possible to collapse the
ATA/ATAPI device control structures into one generic structure.
A note here, the kernel is NOT ready for detach of active devices,
it fails all over in random places, but for inactive devices it works.
However for ATA RAID this works, since the RAID abstration layer
insulates the buggy^H^H^H^H^H^Hfragile device subsystem from the
physical disks.
Proberly detect the RAID's from the BIOS, and mark critical RAID1
arrays as such, but continue if there is enough of the mirror left
to do so.
Properly fail arrays on a live system. For RAID0 that means return EIO,
and for RAID1 it means continue on the still working part of the mirror
if possible, else return EIO.
If the state changes, log this to the console.
Allow for Promise & Highpoint controllers/arrays to coexist on the
same machine. It is not possible to distribute arrays over different
makes of controllers though.
If Promise SuperSwap enclosures are used, signal disk state on the
status LED on the front.
Misc fixes that I had lying around for various minor bugs.
Sponsored by: Advanis Inc.
2002-02-04 19:23:40 +00:00
|
|
|
|
start = (unit ? ATA_SECONDARY : ATA_PRIMARY);
|
2001-03-06 21:43:46 +00:00
|
|
|
|
count = ATA_IOSIZE;
|
2004-04-13 09:44:20 +00:00
|
|
|
|
end = start + count - 1;
|
2001-03-06 21:43:46 +00:00
|
|
|
|
}
|
2004-04-30 18:49:03 +00:00
|
|
|
|
myrid = PCIR_BAR(0) + (unit << 3);
|
2004-04-13 09:44:20 +00:00
|
|
|
|
res = BUS_ALLOC_RESOURCE(device_get_parent(dev), dev,
|
|
|
|
|
SYS_RES_IOPORT, &myrid,
|
|
|
|
|
start, end, count, flags);
|
2001-03-06 21:43:46 +00:00
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
case ATA_ALTADDR_RID:
|
2004-04-21 20:03:26 +00:00
|
|
|
|
if (ata_legacy(dev)) {
|
2004-04-20 20:57:29 +00:00
|
|
|
|
start = (unit ? ATA_SECONDARY : ATA_PRIMARY) + ATA_ALTOFFSET;
|
|
|
|
|
count = ATA_ALTIOSIZE;
|
2004-04-13 09:44:20 +00:00
|
|
|
|
end = start + count - 1;
|
2001-03-06 21:43:46 +00:00
|
|
|
|
}
|
2004-04-30 18:49:03 +00:00
|
|
|
|
myrid = PCIR_BAR(1) + (unit << 3);
|
2004-04-13 09:44:20 +00:00
|
|
|
|
res = BUS_ALLOC_RESOURCE(device_get_parent(dev), dev,
|
2004-06-15 11:02:09 +00:00
|
|
|
|
SYS_RES_IOPORT, &myrid,
|
2004-04-13 09:44:20 +00:00
|
|
|
|
start, end, count, flags);
|
2001-03-06 21:43:46 +00:00
|
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
return res;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
if (type == SYS_RES_IRQ && *rid == ATA_IRQ_RID) {
|
2004-04-21 20:03:26 +00:00
|
|
|
|
if (ata_legacy(dev)) {
|
2001-03-06 21:43:46 +00:00
|
|
|
|
#ifdef __alpha__
|
Major update of the ATA RAID code, part 1:
Overhaul of the attach/detach code and structures, there were some nasty
bugs in the old implementation. This made it possible to collapse the
ATA/ATAPI device control structures into one generic structure.
A note here, the kernel is NOT ready for detach of active devices,
it fails all over in random places, but for inactive devices it works.
However for ATA RAID this works, since the RAID abstration layer
insulates the buggy^H^H^H^H^H^Hfragile device subsystem from the
physical disks.
Proberly detect the RAID's from the BIOS, and mark critical RAID1
arrays as such, but continue if there is enough of the mirror left
to do so.
Properly fail arrays on a live system. For RAID0 that means return EIO,
and for RAID1 it means continue on the still working part of the mirror
if possible, else return EIO.
If the state changes, log this to the console.
Allow for Promise & Highpoint controllers/arrays to coexist on the
same machine. It is not possible to distribute arrays over different
makes of controllers though.
If Promise SuperSwap enclosures are used, signal disk state on the
status LED on the front.
Misc fixes that I had lying around for various minor bugs.
Sponsored by: Advanis Inc.
2002-02-04 19:23:40 +00:00
|
|
|
|
return alpha_platform_alloc_ide_intr(unit);
|
2001-03-06 21:43:46 +00:00
|
|
|
|
#else
|
Major update of the ATA RAID code, part 1:
Overhaul of the attach/detach code and structures, there were some nasty
bugs in the old implementation. This made it possible to collapse the
ATA/ATAPI device control structures into one generic structure.
A note here, the kernel is NOT ready for detach of active devices,
it fails all over in random places, but for inactive devices it works.
However for ATA RAID this works, since the RAID abstration layer
insulates the buggy^H^H^H^H^H^Hfragile device subsystem from the
physical disks.
Proberly detect the RAID's from the BIOS, and mark critical RAID1
arrays as such, but continue if there is enough of the mirror left
to do so.
Properly fail arrays on a live system. For RAID0 that means return EIO,
and for RAID1 it means continue on the still working part of the mirror
if possible, else return EIO.
If the state changes, log this to the console.
Allow for Promise & Highpoint controllers/arrays to coexist on the
same machine. It is not possible to distribute arrays over different
makes of controllers though.
If Promise SuperSwap enclosures are used, signal disk state on the
status LED on the front.
Misc fixes that I had lying around for various minor bugs.
Sponsored by: Advanis Inc.
2002-02-04 19:23:40 +00:00
|
|
|
|
int irq = (unit == 0 ? 14 : 15);
|
2003-02-20 20:02:32 +00:00
|
|
|
|
|
2001-03-06 21:43:46 +00:00
|
|
|
|
return BUS_ALLOC_RESOURCE(device_get_parent(dev), child,
|
2001-08-21 11:35:47 +00:00
|
|
|
|
SYS_RES_IRQ, rid, irq, irq, 1, flags);
|
2001-03-06 21:43:46 +00:00
|
|
|
|
#endif
|
|
|
|
|
}
|
|
|
|
|
else {
|
2003-02-20 20:02:32 +00:00
|
|
|
|
return controller->r_irq;
|
2001-03-06 21:43:46 +00:00
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
return 0;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static int
|
|
|
|
|
ata_pci_release_resource(device_t dev, device_t child, int type, int rid,
|
|
|
|
|
struct resource *r)
|
|
|
|
|
{
|
Major update of the ATA RAID code, part 1:
Overhaul of the attach/detach code and structures, there were some nasty
bugs in the old implementation. This made it possible to collapse the
ATA/ATAPI device control structures into one generic structure.
A note here, the kernel is NOT ready for detach of active devices,
it fails all over in random places, but for inactive devices it works.
However for ATA RAID this works, since the RAID abstration layer
insulates the buggy^H^H^H^H^H^Hfragile device subsystem from the
physical disks.
Proberly detect the RAID's from the BIOS, and mark critical RAID1
arrays as such, but continue if there is enough of the mirror left
to do so.
Properly fail arrays on a live system. For RAID0 that means return EIO,
and for RAID1 it means continue on the still working part of the mirror
if possible, else return EIO.
If the state changes, log this to the console.
Allow for Promise & Highpoint controllers/arrays to coexist on the
same machine. It is not possible to distribute arrays over different
makes of controllers though.
If Promise SuperSwap enclosures are used, signal disk state on the
status LED on the front.
Misc fixes that I had lying around for various minor bugs.
Sponsored by: Advanis Inc.
2002-02-04 19:23:40 +00:00
|
|
|
|
int unit = ((struct ata_channel *)device_get_softc(child))->unit;
|
2001-03-06 21:43:46 +00:00
|
|
|
|
|
|
|
|
|
if (type == SYS_RES_IOPORT) {
|
|
|
|
|
switch (rid) {
|
|
|
|
|
case ATA_IOADDR_RID:
|
2004-04-13 09:44:20 +00:00
|
|
|
|
return BUS_RELEASE_RESOURCE(device_get_parent(dev), dev,
|
2004-04-30 18:49:03 +00:00
|
|
|
|
SYS_RES_IOPORT,
|
|
|
|
|
PCIR_BAR(0) + (unit << 3), r);
|
2001-03-06 21:43:46 +00:00
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
case ATA_ALTADDR_RID:
|
2004-04-13 09:44:20 +00:00
|
|
|
|
return BUS_RELEASE_RESOURCE(device_get_parent(dev), dev,
|
2004-04-30 18:49:03 +00:00
|
|
|
|
SYS_RES_IOPORT,
|
|
|
|
|
PCIR_BAR(1) + (unit << 3), r);
|
2001-03-06 21:43:46 +00:00
|
|
|
|
break;
|
|
|
|
|
default:
|
|
|
|
|
return ENOENT;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
if (type == SYS_RES_IRQ) {
|
|
|
|
|
if (rid != ATA_IRQ_RID)
|
|
|
|
|
return ENOENT;
|
|
|
|
|
|
2004-04-21 20:03:26 +00:00
|
|
|
|
if (ata_legacy(dev)) {
|
2001-03-06 21:43:46 +00:00
|
|
|
|
#ifdef __alpha__
|
Major update of the ATA RAID code, part 1:
Overhaul of the attach/detach code and structures, there were some nasty
bugs in the old implementation. This made it possible to collapse the
ATA/ATAPI device control structures into one generic structure.
A note here, the kernel is NOT ready for detach of active devices,
it fails all over in random places, but for inactive devices it works.
However for ATA RAID this works, since the RAID abstration layer
insulates the buggy^H^H^H^H^H^Hfragile device subsystem from the
physical disks.
Proberly detect the RAID's from the BIOS, and mark critical RAID1
arrays as such, but continue if there is enough of the mirror left
to do so.
Properly fail arrays on a live system. For RAID0 that means return EIO,
and for RAID1 it means continue on the still working part of the mirror
if possible, else return EIO.
If the state changes, log this to the console.
Allow for Promise & Highpoint controllers/arrays to coexist on the
same machine. It is not possible to distribute arrays over different
makes of controllers though.
If Promise SuperSwap enclosures are used, signal disk state on the
status LED on the front.
Misc fixes that I had lying around for various minor bugs.
Sponsored by: Advanis Inc.
2002-02-04 19:23:40 +00:00
|
|
|
|
return alpha_platform_release_ide_intr(unit, r);
|
2001-03-06 21:43:46 +00:00
|
|
|
|
#else
|
2001-03-19 08:02:42 +00:00
|
|
|
|
return BUS_RELEASE_RESOURCE(device_get_parent(dev), child,
|
|
|
|
|
SYS_RES_IRQ, rid, r);
|
2001-03-06 21:43:46 +00:00
|
|
|
|
#endif
|
2004-06-15 11:02:09 +00:00
|
|
|
|
}
|
2003-02-20 20:02:32 +00:00
|
|
|
|
else
|
|
|
|
|
return 0;
|
2001-03-06 21:43:46 +00:00
|
|
|
|
}
|
|
|
|
|
return EINVAL;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static int
|
|
|
|
|
ata_pci_setup_intr(device_t dev, device_t child, struct resource *irq,
|
2003-02-20 20:02:32 +00:00
|
|
|
|
int flags, driver_intr_t *function, void *argument,
|
2001-03-06 21:43:46 +00:00
|
|
|
|
void **cookiep)
|
|
|
|
|
{
|
2004-04-21 20:03:26 +00:00
|
|
|
|
if (ata_legacy(dev)) {
|
2001-03-06 21:43:46 +00:00
|
|
|
|
#ifdef __alpha__
|
2003-02-20 20:02:32 +00:00
|
|
|
|
return alpha_platform_setup_ide_intr(child, irq, function, argument,
|
|
|
|
|
cookiep);
|
2001-03-06 21:43:46 +00:00
|
|
|
|
#else
|
|
|
|
|
return BUS_SETUP_INTR(device_get_parent(dev), child, irq,
|
2003-02-20 20:02:32 +00:00
|
|
|
|
flags, function, argument, cookiep);
|
2001-03-06 21:43:46 +00:00
|
|
|
|
#endif
|
|
|
|
|
}
|
2003-02-20 20:02:32 +00:00
|
|
|
|
else {
|
2003-02-25 14:46:30 +00:00
|
|
|
|
struct ata_pci_controller *controller = device_get_softc(dev);
|
|
|
|
|
int unit = ((struct ata_channel *)device_get_softc(child))->unit;
|
2003-02-20 20:02:32 +00:00
|
|
|
|
|
2003-02-25 14:46:30 +00:00
|
|
|
|
controller->interrupt[unit].function = function;
|
|
|
|
|
controller->interrupt[unit].argument = argument;
|
|
|
|
|
*cookiep = controller;
|
|
|
|
|
return 0;
|
2003-02-20 20:02:32 +00:00
|
|
|
|
}
|
2001-03-06 21:43:46 +00:00
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static int
|
|
|
|
|
ata_pci_teardown_intr(device_t dev, device_t child, struct resource *irq,
|
|
|
|
|
void *cookie)
|
|
|
|
|
{
|
2004-04-21 20:03:26 +00:00
|
|
|
|
if (ata_legacy(dev)) {
|
2001-03-06 21:43:46 +00:00
|
|
|
|
#ifdef __alpha__
|
|
|
|
|
return alpha_platform_teardown_ide_intr(child, irq, cookie);
|
|
|
|
|
#else
|
|
|
|
|
return BUS_TEARDOWN_INTR(device_get_parent(dev), child, irq, cookie);
|
|
|
|
|
#endif
|
|
|
|
|
}
|
2003-02-25 14:46:30 +00:00
|
|
|
|
else {
|
|
|
|
|
struct ata_pci_controller *controller = device_get_softc(dev);
|
|
|
|
|
int unit = ((struct ata_channel *)device_get_softc(child))->unit;
|
|
|
|
|
|
|
|
|
|
controller->interrupt[unit].function = NULL;
|
|
|
|
|
controller->interrupt[unit].argument = NULL;
|
2003-02-20 20:02:32 +00:00
|
|
|
|
return 0;
|
2003-02-25 14:46:30 +00:00
|
|
|
|
}
|
2001-03-06 21:43:46 +00:00
|
|
|
|
}
|
2003-03-29 13:37:09 +00:00
|
|
|
|
|
|
|
|
|
static int
|
|
|
|
|
ata_pci_allocate(device_t dev, struct ata_channel *ch)
|
|
|
|
|
{
|
|
|
|
|
struct ata_pci_controller *ctlr = device_get_softc(device_get_parent(dev));
|
|
|
|
|
struct resource *io = NULL, *altio = NULL;
|
|
|
|
|
int i, rid;
|
|
|
|
|
|
|
|
|
|
rid = ATA_IOADDR_RID;
|
|
|
|
|
io = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid,
|
|
|
|
|
0, ~0, ATA_IOSIZE, RF_ACTIVE);
|
|
|
|
|
if (!io)
|
|
|
|
|
return ENXIO;
|
|
|
|
|
|
|
|
|
|
rid = ATA_ALTADDR_RID;
|
|
|
|
|
altio = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid,
|
|
|
|
|
0, ~0, ATA_ALTIOSIZE, RF_ACTIVE);
|
|
|
|
|
if (!altio) {
|
|
|
|
|
bus_release_resource(dev, SYS_RES_IOPORT, ATA_IOADDR_RID, io);
|
|
|
|
|
return ENXIO;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
for (i = ATA_DATA; i <= ATA_STATUS; i ++) {
|
|
|
|
|
ch->r_io[i].res = io;
|
|
|
|
|
ch->r_io[i].offset = i;
|
|
|
|
|
}
|
|
|
|
|
ch->r_io[ATA_ALTSTAT].res = altio;
|
2004-04-21 20:03:26 +00:00
|
|
|
|
ch->r_io[ATA_ALTSTAT].offset = ata_legacy(device_get_parent(dev)) ? 0 : 2;
|
2003-04-07 14:12:12 +00:00
|
|
|
|
ch->r_io[ATA_IDX_ADDR].res = io;
|
2003-03-29 13:37:09 +00:00
|
|
|
|
|
2004-03-15 12:03:48 +00:00
|
|
|
|
if (ctlr->r_res1) {
|
2003-03-29 13:37:09 +00:00
|
|
|
|
for (i = ATA_BMCMD_PORT; i <= ATA_BMDTP_PORT; i++) {
|
2004-03-15 12:03:48 +00:00
|
|
|
|
ch->r_io[i].res = ctlr->r_res1;
|
2003-03-29 13:37:09 +00:00
|
|
|
|
ch->r_io[i].offset = (i - ATA_BMCMD_PORT)+(ch->unit * ATA_BMIOSIZE);
|
|
|
|
|
}
|
|
|
|
|
}
|
2004-04-13 09:44:20 +00:00
|
|
|
|
|
|
|
|
|
ata_generic_hw(ch);
|
|
|
|
|
|
2003-03-29 13:37:09 +00:00
|
|
|
|
return 0;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static int
|
2003-10-21 19:20:37 +00:00
|
|
|
|
ata_pci_dmastart(struct ata_channel *ch)
|
2003-03-29 13:37:09 +00:00
|
|
|
|
{
|
|
|
|
|
ATA_IDX_OUTB(ch, ATA_BMSTAT_PORT, (ATA_IDX_INB(ch, ATA_BMSTAT_PORT) |
|
2003-04-07 14:12:12 +00:00
|
|
|
|
(ATA_BMSTAT_INTERRUPT | ATA_BMSTAT_ERROR)));
|
2003-08-24 09:22:26 +00:00
|
|
|
|
ATA_IDX_OUTL(ch, ATA_BMDTP_PORT, ch->dma->mdmatab);
|
2004-09-26 11:42:42 +00:00
|
|
|
|
ch->dma->flags |= ATA_DMA_ACTIVE;
|
2003-08-24 09:22:26 +00:00
|
|
|
|
ATA_IDX_OUTB(ch, ATA_BMCMD_PORT,
|
2004-05-10 20:23:25 +00:00
|
|
|
|
(ATA_IDX_INB(ch, ATA_BMCMD_PORT) & ~ATA_BMCMD_WRITE_READ) |
|
2003-10-21 19:20:37 +00:00
|
|
|
|
((ch->dma->flags & ATA_DMA_READ) ? ATA_BMCMD_WRITE_READ : 0) |
|
|
|
|
|
ATA_BMCMD_START_STOP);
|
2003-03-29 13:37:09 +00:00
|
|
|
|
return 0;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static int
|
|
|
|
|
ata_pci_dmastop(struct ata_channel *ch)
|
|
|
|
|
{
|
|
|
|
|
int error;
|
|
|
|
|
|
|
|
|
|
ATA_IDX_OUTB(ch, ATA_BMCMD_PORT,
|
2003-04-07 14:12:12 +00:00
|
|
|
|
ATA_IDX_INB(ch, ATA_BMCMD_PORT) & ~ATA_BMCMD_START_STOP);
|
2004-08-05 21:13:41 +00:00
|
|
|
|
ch->dma->flags &= ~ATA_DMA_ACTIVE;
|
2004-09-26 11:42:42 +00:00
|
|
|
|
error = ATA_IDX_INB(ch, ATA_BMSTAT_PORT) & ATA_BMSTAT_MASK;
|
2003-03-29 13:37:09 +00:00
|
|
|
|
ATA_IDX_OUTB(ch, ATA_BMSTAT_PORT, ATA_BMSTAT_INTERRUPT | ATA_BMSTAT_ERROR);
|
2003-08-24 09:22:26 +00:00
|
|
|
|
return error;
|
2003-03-29 13:37:09 +00:00
|
|
|
|
}
|
|
|
|
|
|
2003-08-25 11:13:04 +00:00
|
|
|
|
static void
|
2003-03-29 13:37:09 +00:00
|
|
|
|
ata_pci_dmainit(struct ata_channel *ch)
|
|
|
|
|
{
|
2003-08-25 11:13:04 +00:00
|
|
|
|
ata_dmainit(ch);
|
|
|
|
|
if (ch->dma) {
|
|
|
|
|
ch->dma->start = ata_pci_dmastart;
|
|
|
|
|
ch->dma->stop = ata_pci_dmastop;
|
|
|
|
|
}
|
2003-03-29 13:37:09 +00:00
|
|
|
|
}
|
2001-03-06 21:43:46 +00:00
|
|
|
|
|
2004-10-06 19:46:08 +00:00
|
|
|
|
static int
|
2003-02-20 20:02:32 +00:00
|
|
|
|
ata_pci_locknoop(struct ata_channel *ch, int flags)
|
|
|
|
|
{
|
2004-10-06 19:46:08 +00:00
|
|
|
|
return ch->unit;
|
2003-02-20 20:02:32 +00:00
|
|
|
|
}
|
|
|
|
|
|
2001-03-06 21:43:46 +00:00
|
|
|
|
static device_method_t ata_pci_methods[] = {
|
|
|
|
|
/* device interface */
|
|
|
|
|
DEVMETHOD(device_probe, ata_pci_probe),
|
|
|
|
|
DEVMETHOD(device_attach, ata_pci_attach),
|
2004-03-15 12:03:48 +00:00
|
|
|
|
DEVMETHOD(device_detach, ata_pci_detach),
|
2001-03-06 21:43:46 +00:00
|
|
|
|
DEVMETHOD(device_shutdown, bus_generic_shutdown),
|
|
|
|
|
DEVMETHOD(device_suspend, bus_generic_suspend),
|
|
|
|
|
DEVMETHOD(device_resume, bus_generic_resume),
|
|
|
|
|
|
|
|
|
|
/* bus methods */
|
|
|
|
|
DEVMETHOD(bus_print_child, ata_pci_print_child),
|
|
|
|
|
DEVMETHOD(bus_alloc_resource, ata_pci_alloc_resource),
|
|
|
|
|
DEVMETHOD(bus_release_resource, ata_pci_release_resource),
|
|
|
|
|
DEVMETHOD(bus_activate_resource, bus_generic_activate_resource),
|
|
|
|
|
DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource),
|
|
|
|
|
DEVMETHOD(bus_setup_intr, ata_pci_setup_intr),
|
|
|
|
|
DEVMETHOD(bus_teardown_intr, ata_pci_teardown_intr),
|
|
|
|
|
{ 0, 0 }
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
static driver_t ata_pci_driver = {
|
|
|
|
|
"atapci",
|
|
|
|
|
ata_pci_methods,
|
Major update of the ATA RAID code, part 1:
Overhaul of the attach/detach code and structures, there were some nasty
bugs in the old implementation. This made it possible to collapse the
ATA/ATAPI device control structures into one generic structure.
A note here, the kernel is NOT ready for detach of active devices,
it fails all over in random places, but for inactive devices it works.
However for ATA RAID this works, since the RAID abstration layer
insulates the buggy^H^H^H^H^H^Hfragile device subsystem from the
physical disks.
Proberly detect the RAID's from the BIOS, and mark critical RAID1
arrays as such, but continue if there is enough of the mirror left
to do so.
Properly fail arrays on a live system. For RAID0 that means return EIO,
and for RAID1 it means continue on the still working part of the mirror
if possible, else return EIO.
If the state changes, log this to the console.
Allow for Promise & Highpoint controllers/arrays to coexist on the
same machine. It is not possible to distribute arrays over different
makes of controllers though.
If Promise SuperSwap enclosures are used, signal disk state on the
status LED on the front.
Misc fixes that I had lying around for various minor bugs.
Sponsored by: Advanis Inc.
2002-02-04 19:23:40 +00:00
|
|
|
|
sizeof(struct ata_pci_controller),
|
2001-03-06 21:43:46 +00:00
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
static devclass_t ata_pci_devclass;
|
|
|
|
|
|
|
|
|
|
DRIVER_MODULE(atapci, pci, ata_pci_driver, ata_pci_devclass, 0, 0);
|
|
|
|
|
|
|
|
|
|
static int
|
2004-08-12 08:20:36 +00:00
|
|
|
|
ata_channel_probe(device_t dev)
|
2001-03-06 21:43:46 +00:00
|
|
|
|
{
|
Major update of the ATA RAID code, part 1:
Overhaul of the attach/detach code and structures, there were some nasty
bugs in the old implementation. This made it possible to collapse the
ATA/ATAPI device control structures into one generic structure.
A note here, the kernel is NOT ready for detach of active devices,
it fails all over in random places, but for inactive devices it works.
However for ATA RAID this works, since the RAID abstration layer
insulates the buggy^H^H^H^H^H^Hfragile device subsystem from the
physical disks.
Proberly detect the RAID's from the BIOS, and mark critical RAID1
arrays as such, but continue if there is enough of the mirror left
to do so.
Properly fail arrays on a live system. For RAID0 that means return EIO,
and for RAID1 it means continue on the still working part of the mirror
if possible, else return EIO.
If the state changes, log this to the console.
Allow for Promise & Highpoint controllers/arrays to coexist on the
same machine. It is not possible to distribute arrays over different
makes of controllers though.
If Promise SuperSwap enclosures are used, signal disk state on the
status LED on the front.
Misc fixes that I had lying around for various minor bugs.
Sponsored by: Advanis Inc.
2002-02-04 19:23:40 +00:00
|
|
|
|
struct ata_channel *ch = device_get_softc(dev);
|
2001-03-06 21:43:46 +00:00
|
|
|
|
device_t *children;
|
2004-08-12 08:20:36 +00:00
|
|
|
|
int count, i;
|
2001-03-06 21:43:46 +00:00
|
|
|
|
|
2004-03-15 12:03:48 +00:00
|
|
|
|
/* take care of green memory */
|
|
|
|
|
bzero(ch, sizeof(struct ata_channel));
|
|
|
|
|
|
2001-03-06 21:43:46 +00:00
|
|
|
|
/* find channel number on this controller */
|
|
|
|
|
device_get_children(device_get_parent(dev), &children, &count);
|
|
|
|
|
for (i = 0; i < count; i++) {
|
|
|
|
|
if (children[i] == dev)
|
Major update of the ATA RAID code, part 1:
Overhaul of the attach/detach code and structures, there were some nasty
bugs in the old implementation. This made it possible to collapse the
ATA/ATAPI device control structures into one generic structure.
A note here, the kernel is NOT ready for detach of active devices,
it fails all over in random places, but for inactive devices it works.
However for ATA RAID this works, since the RAID abstration layer
insulates the buggy^H^H^H^H^H^Hfragile device subsystem from the
physical disks.
Proberly detect the RAID's from the BIOS, and mark critical RAID1
arrays as such, but continue if there is enough of the mirror left
to do so.
Properly fail arrays on a live system. For RAID0 that means return EIO,
and for RAID1 it means continue on the still working part of the mirror
if possible, else return EIO.
If the state changes, log this to the console.
Allow for Promise & Highpoint controllers/arrays to coexist on the
same machine. It is not possible to distribute arrays over different
makes of controllers though.
If Promise SuperSwap enclosures are used, signal disk state on the
status LED on the front.
Misc fixes that I had lying around for various minor bugs.
Sponsored by: Advanis Inc.
2002-02-04 19:23:40 +00:00
|
|
|
|
ch->unit = i;
|
2001-03-06 21:43:46 +00:00
|
|
|
|
}
|
|
|
|
|
free(children, M_TEMP);
|
2002-12-03 20:20:44 +00:00
|
|
|
|
|
2004-08-12 08:20:36 +00:00
|
|
|
|
return ata_probe(dev);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static int
|
|
|
|
|
ata_channel_attach(device_t dev)
|
|
|
|
|
{
|
|
|
|
|
struct ata_pci_controller *ctlr = device_get_softc(device_get_parent(dev));
|
|
|
|
|
struct ata_channel *ch = device_get_softc(dev);
|
|
|
|
|
int error;
|
|
|
|
|
|
2003-02-20 20:02:32 +00:00
|
|
|
|
ch->device[MASTER].setmode = ctlr->setmode;
|
|
|
|
|
ch->device[SLAVE].setmode = ctlr->setmode;
|
|
|
|
|
ch->locking = ctlr->locking;
|
2004-06-15 11:02:09 +00:00
|
|
|
|
ch->reset = ctlr->reset;
|
|
|
|
|
|
2004-08-20 06:19:25 +00:00
|
|
|
|
if (ctlr->r_res1)
|
|
|
|
|
ctlr->dmainit(ch);
|
2004-08-12 08:20:36 +00:00
|
|
|
|
if (ch->dma)
|
|
|
|
|
ch->dma->alloc(ch);
|
|
|
|
|
|
2004-06-15 11:02:09 +00:00
|
|
|
|
if ((error = ctlr->allocate(dev, ch)))
|
|
|
|
|
return error;
|
|
|
|
|
|
2004-08-12 08:20:36 +00:00
|
|
|
|
return ata_attach(dev);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static int
|
|
|
|
|
ata_channel_detach(device_t dev)
|
|
|
|
|
{
|
|
|
|
|
struct ata_channel *ch = device_get_softc(dev);
|
|
|
|
|
int error;
|
|
|
|
|
|
|
|
|
|
if ((error = ata_detach(dev)))
|
|
|
|
|
return error;
|
|
|
|
|
|
|
|
|
|
if (ch->dma)
|
|
|
|
|
ch->dma->free(ch);
|
|
|
|
|
|
|
|
|
|
return 0;
|
2001-03-06 21:43:46 +00:00
|
|
|
|
}
|
|
|
|
|
|
2004-08-12 08:20:36 +00:00
|
|
|
|
static device_method_t ata_channel_methods[] = {
|
2001-03-06 21:43:46 +00:00
|
|
|
|
/* device interface */
|
2004-08-12 08:20:36 +00:00
|
|
|
|
DEVMETHOD(device_probe, ata_channel_probe),
|
|
|
|
|
DEVMETHOD(device_attach, ata_channel_attach),
|
|
|
|
|
DEVMETHOD(device_detach, ata_channel_detach),
|
2003-05-04 09:34:14 +00:00
|
|
|
|
DEVMETHOD(device_suspend, ata_suspend),
|
2001-03-06 21:43:46 +00:00
|
|
|
|
DEVMETHOD(device_resume, ata_resume),
|
|
|
|
|
{ 0, 0 }
|
|
|
|
|
};
|
|
|
|
|
|
2004-08-12 08:20:36 +00:00
|
|
|
|
static driver_t ata_channel_driver = {
|
2001-03-06 21:43:46 +00:00
|
|
|
|
"ata",
|
2004-08-12 08:20:36 +00:00
|
|
|
|
ata_channel_methods,
|
Major update of the ATA RAID code, part 1:
Overhaul of the attach/detach code and structures, there were some nasty
bugs in the old implementation. This made it possible to collapse the
ATA/ATAPI device control structures into one generic structure.
A note here, the kernel is NOT ready for detach of active devices,
it fails all over in random places, but for inactive devices it works.
However for ATA RAID this works, since the RAID abstration layer
insulates the buggy^H^H^H^H^H^Hfragile device subsystem from the
physical disks.
Proberly detect the RAID's from the BIOS, and mark critical RAID1
arrays as such, but continue if there is enough of the mirror left
to do so.
Properly fail arrays on a live system. For RAID0 that means return EIO,
and for RAID1 it means continue on the still working part of the mirror
if possible, else return EIO.
If the state changes, log this to the console.
Allow for Promise & Highpoint controllers/arrays to coexist on the
same machine. It is not possible to distribute arrays over different
makes of controllers though.
If Promise SuperSwap enclosures are used, signal disk state on the
status LED on the front.
Misc fixes that I had lying around for various minor bugs.
Sponsored by: Advanis Inc.
2002-02-04 19:23:40 +00:00
|
|
|
|
sizeof(struct ata_channel),
|
2001-03-06 21:43:46 +00:00
|
|
|
|
};
|
|
|
|
|
|
2004-08-12 08:20:36 +00:00
|
|
|
|
DRIVER_MODULE(ata, atapci, ata_channel_driver, ata_devclass, 0, 0);
|