2008-03-03 17:17:00 +00:00
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/*-
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2012-05-30 17:34:40 +00:00
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* Copyright (C) 2006-2012 Semihalf
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2008-03-03 17:17:00 +00:00
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
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* NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
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* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
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* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
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* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
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* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/*-
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* Copyright (C) 2001 Benno Rice
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY Benno Rice ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
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* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
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* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
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* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
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* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
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* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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* $NetBSD: machdep.c,v 1.74.2.1 2000/11/01 16:13:48 tv Exp $
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*/
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/*-
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* Copyright (C) 1995, 1996 Wolfgang Solfrank.
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* Copyright (C) 1995, 1996 TooLs GmbH.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by TooLs GmbH.
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* 4. The name of TooLs GmbH may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
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* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
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* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
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* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
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* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
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* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include "opt_compat.h"
|
2009-04-21 17:04:01 +00:00
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#include "opt_ddb.h"
|
2015-04-18 21:39:17 +00:00
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|
#include "opt_hwpmc_hooks.h"
|
2008-03-03 17:17:00 +00:00
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|
#include "opt_kstack_pages.h"
|
2011-01-17 23:54:50 +00:00
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#include "opt_platform.h"
|
2008-03-03 17:17:00 +00:00
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#include <sys/cdefs.h>
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#include <sys/types.h>
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#include <sys/param.h>
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#include <sys/proc.h>
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#include <sys/systm.h>
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#include <sys/time.h>
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#include <sys/bio.h>
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#include <sys/buf.h>
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#include <sys/bus.h>
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#include <sys/cons.h>
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#include <sys/cpu.h>
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#include <sys/kdb.h>
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#include <sys/kernel.h>
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#include <sys/lock.h>
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#include <sys/mutex.h>
|
2013-03-09 02:32:23 +00:00
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#include <sys/rwlock.h>
|
2008-03-03 17:17:00 +00:00
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#include <sys/sysctl.h>
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#include <sys/exec.h>
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#include <sys/ktr.h>
|
2010-06-30 18:03:42 +00:00
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#include <sys/syscallsubr.h>
|
2008-03-03 17:17:00 +00:00
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#include <sys/sysproto.h>
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#include <sys/signalvar.h>
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#include <sys/sysent.h>
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#include <sys/imgact.h>
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#include <sys/msgbuf.h>
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#include <sys/ptrace.h>
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#include <vm/vm.h>
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#include <vm/pmap.h>
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#include <vm/vm_page.h>
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#include <vm/vm_object.h>
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#include <vm/vm_pager.h>
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#include <machine/cpu.h>
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#include <machine/kdb.h>
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#include <machine/reg.h>
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#include <machine/vmparam.h>
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#include <machine/spr.h>
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|
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#include <machine/hid.h>
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#include <machine/psl.h>
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#include <machine/trap.h>
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#include <machine/md_var.h>
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#include <machine/mmuvar.h>
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#include <machine/sigframe.h>
|
2012-05-30 17:34:40 +00:00
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|
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#include <machine/machdep.h>
|
2008-03-03 17:17:00 +00:00
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#include <machine/metadata.h>
|
2009-05-14 00:34:26 +00:00
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#include <machine/platform.h>
|
2008-03-03 17:17:00 +00:00
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|
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#include <sys/linker.h>
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|
|
#include <sys/reboot.h>
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|
|
|
2013-10-26 19:50:40 +00:00
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|
|
#include <contrib/libfdt/libfdt.h>
|
Convert Freescale PowerPC platforms to FDT convention.
The following systems are affected:
- MPC8555CDS
- MPC8572DS
This overhaul covers the following major changes:
- All integrated peripherals drivers for Freescale MPC85XX SoC, which are
currently in the FreeBSD source tree are reworked and adjusted so they
derive config data out of the device tree blob (instead of hard coded /
tabelarized values).
- This includes: LBC, PCI / PCI-Express, I2C, DS1553, OpenPIC, TSEC, SEC,
QUICC, UART, CFI.
- Thanks to the common FDT infrastrucutre (fdtbus, simplebus) we retire
ocpbus(4) driver, which was based on hard-coded config data.
Note that world for these platforms has to be built WITH_FDT.
Reviewed by: imp
Sponsored by: The FreeBSD Foundation
2010-07-11 21:08:29 +00:00
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#include <dev/fdt/fdt_common.h>
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|
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|
#include <dev/ofw/openfirm.h>
|
|
|
|
|
Add more interrupts handled for booke.
e500mc, e5500, and e6500 all use the normal FPU, with the same behavior as AIM
hardware. e6500 also supports Altivec, so, although we don't yet have e6500
hardware to test on, add these IVORs as well. Theoretically, since it boots the
same as a e5500, it should work, single-threaded, single-core, with full altivec
support as of this commit.
With this commit, and some other patches to be committed shortly FreeBSD now
boots on the P5020, single-core, all the way to user space, and should boot just
fine on e500mc.
Relnotes: Yes (e500mc, e5500 support)
Sponsored by: Alex Perez/Inertial Computing
2015-12-11 01:23:18 +00:00
|
|
|
#if defined(MPC85XX) || defined(QORIQ_DPAA)
|
2015-03-31 05:29:44 +00:00
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|
#include <powerpc/mpc85xx/mpc85xx.h>
|
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|
#endif
|
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|
|
2009-04-21 17:04:01 +00:00
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|
#ifdef DDB
|
2014-09-25 08:28:10 +00:00
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#include <ddb/ddb.h>
|
2009-04-21 17:04:01 +00:00
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|
#endif
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2008-03-03 17:17:00 +00:00
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#ifdef DEBUG
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#define debugf(fmt, args...) printf(fmt, ##args)
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#else
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#define debugf(fmt, args...)
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|
#endif
|
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|
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|
extern unsigned char kernel_text[];
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|
|
extern unsigned char _etext[];
|
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|
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extern unsigned char _edata[];
|
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|
|
extern unsigned char __bss_start[];
|
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|
|
extern unsigned char __sbss_start[];
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|
extern unsigned char __sbss_end[];
|
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|
extern unsigned char _end[];
|
2015-04-30 01:24:25 +00:00
|
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|
extern vm_offset_t __endkernel;
|
2008-03-03 17:17:00 +00:00
|
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|
|
2011-01-17 23:54:50 +00:00
|
|
|
/*
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|
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* Bootinfo is passed to us by legacy loaders. Save the address of the
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* structure to handle backward compatibility.
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*/
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uint32_t *bootinfo;
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2008-03-03 17:17:00 +00:00
|
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void print_kernel_section_addr(void);
|
2008-12-17 15:31:15 +00:00
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|
void print_kenv(void);
|
2015-08-08 23:13:53 +00:00
|
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|
uintptr_t booke_init(uint32_t, uint32_t);
|
2015-03-05 05:53:08 +00:00
|
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void ivor_setup(void);
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extern void *interrupt_vector_base;
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extern void *int_critical_input;
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extern void *int_machine_check;
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extern void *int_data_storage;
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extern void *int_instr_storage;
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extern void *int_external_input;
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extern void *int_alignment;
|
Add more interrupts handled for booke.
e500mc, e5500, and e6500 all use the normal FPU, with the same behavior as AIM
hardware. e6500 also supports Altivec, so, although we don't yet have e6500
hardware to test on, add these IVORs as well. Theoretically, since it boots the
same as a e5500, it should work, single-threaded, single-core, with full altivec
support as of this commit.
With this commit, and some other patches to be committed shortly FreeBSD now
boots on the P5020, single-core, all the way to user space, and should boot just
fine on e500mc.
Relnotes: Yes (e500mc, e5500 support)
Sponsored by: Alex Perez/Inertial Computing
2015-12-11 01:23:18 +00:00
|
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|
extern void *int_fpu;
|
2015-03-05 05:53:08 +00:00
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extern void *int_program;
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extern void *int_syscall;
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extern void *int_decrementer;
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extern void *int_fixed_interval_timer;
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extern void *int_watchdog;
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extern void *int_data_tlb_error;
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extern void *int_inst_tlb_error;
|
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|
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extern void *int_debug;
|
Add more interrupts handled for booke.
e500mc, e5500, and e6500 all use the normal FPU, with the same behavior as AIM
hardware. e6500 also supports Altivec, so, although we don't yet have e6500
hardware to test on, add these IVORs as well. Theoretically, since it boots the
same as a e5500, it should work, single-threaded, single-core, with full altivec
support as of this commit.
With this commit, and some other patches to be committed shortly FreeBSD now
boots on the P5020, single-core, all the way to user space, and should boot just
fine on e500mc.
Relnotes: Yes (e500mc, e5500 support)
Sponsored by: Alex Perez/Inertial Computing
2015-12-11 01:23:18 +00:00
|
|
|
extern void *int_vec;
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extern void *int_vecast;
|
2015-04-18 21:39:17 +00:00
|
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|
#ifdef HWPMC_HOOKS
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extern void *int_performance_counter;
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#endif
|
2015-03-05 05:53:08 +00:00
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#define SET_TRAP(ivor, handler) \
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KASSERT(((uintptr_t)(&handler) & ~0xffffUL) == \
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((uintptr_t)(&interrupt_vector_base) & ~0xffffUL), \
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("Handler " #handler " too far from interrupt vector base")); \
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mtspr(ivor, (uintptr_t)(&handler) & 0xffffUL);
|
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|
|
2015-04-30 01:24:25 +00:00
|
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uintptr_t powerpc_init(vm_offset_t fdt, vm_offset_t, vm_offset_t, void *mdp);
|
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void booke_cpu_init(void);
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void
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booke_cpu_init(void)
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{
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|
|
|
2016-01-02 18:15:10 +00:00
|
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|
cpu_features |= PPC_FEATURE_BOOKE;
|
|
|
|
|
2015-04-30 01:24:25 +00:00
|
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|
pmap_mmu_install(MMU_TYPE_BOOKE, BUS_PROBE_GENERIC);
|
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|
|
}
|
|
|
|
|
2015-03-05 05:53:08 +00:00
|
|
|
void
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|
|
|
ivor_setup(void)
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|
|
|
{
|
|
|
|
|
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|
mtspr(SPR_IVPR, ((uintptr_t)&interrupt_vector_base) & 0xffff0000);
|
|
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|
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SET_TRAP(SPR_IVOR0, int_critical_input);
|
|
|
|
SET_TRAP(SPR_IVOR1, int_machine_check);
|
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|
|
SET_TRAP(SPR_IVOR2, int_data_storage);
|
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|
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SET_TRAP(SPR_IVOR3, int_instr_storage);
|
|
|
|
SET_TRAP(SPR_IVOR4, int_external_input);
|
|
|
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SET_TRAP(SPR_IVOR5, int_alignment);
|
|
|
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SET_TRAP(SPR_IVOR6, int_program);
|
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SET_TRAP(SPR_IVOR8, int_syscall);
|
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SET_TRAP(SPR_IVOR10, int_decrementer);
|
|
|
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SET_TRAP(SPR_IVOR11, int_fixed_interval_timer);
|
|
|
|
SET_TRAP(SPR_IVOR12, int_watchdog);
|
|
|
|
SET_TRAP(SPR_IVOR13, int_data_tlb_error);
|
|
|
|
SET_TRAP(SPR_IVOR14, int_inst_tlb_error);
|
|
|
|
SET_TRAP(SPR_IVOR15, int_debug);
|
2015-04-18 21:39:17 +00:00
|
|
|
#ifdef HWPMC_HOOKS
|
|
|
|
SET_TRAP(SPR_IVOR35, int_performance_counter);
|
|
|
|
#endif
|
Add more interrupts handled for booke.
e500mc, e5500, and e6500 all use the normal FPU, with the same behavior as AIM
hardware. e6500 also supports Altivec, so, although we don't yet have e6500
hardware to test on, add these IVORs as well. Theoretically, since it boots the
same as a e5500, it should work, single-threaded, single-core, with full altivec
support as of this commit.
With this commit, and some other patches to be committed shortly FreeBSD now
boots on the P5020, single-core, all the way to user space, and should boot just
fine on e500mc.
Relnotes: Yes (e500mc, e5500 support)
Sponsored by: Alex Perez/Inertial Computing
2015-12-11 01:23:18 +00:00
|
|
|
switch ((mfpvr() >> 16) & 0xffff) {
|
|
|
|
case FSL_E6500:
|
|
|
|
SET_TRAP(SPR_IVOR32, int_vec);
|
|
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SET_TRAP(SPR_IVOR33, int_vecast);
|
|
|
|
/* FALLTHROUGH */
|
|
|
|
case FSL_E500mc:
|
|
|
|
case FSL_E5500:
|
|
|
|
SET_TRAP(SPR_IVOR7, int_fpu);
|
|
|
|
}
|
2015-03-05 05:53:08 +00:00
|
|
|
}
|
2008-03-03 17:17:00 +00:00
|
|
|
|
2013-10-26 19:50:40 +00:00
|
|
|
static int
|
|
|
|
booke_check_for_fdt(uint32_t arg1, vm_offset_t *dtbp)
|
|
|
|
{
|
|
|
|
void *ptr;
|
|
|
|
|
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|
if (arg1 % 8 != 0)
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|
|
|
return (-1);
|
|
|
|
|
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|
|
ptr = (void *)pmap_early_io_map(arg1, PAGE_SIZE);
|
|
|
|
if (fdt_check_header(ptr) != 0)
|
|
|
|
return (-1);
|
|
|
|
|
|
|
|
*dtbp = (vm_offset_t)ptr;
|
|
|
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|
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|
|
return (0);
|
|
|
|
}
|
|
|
|
|
2015-04-30 01:24:25 +00:00
|
|
|
uintptr_t
|
2011-05-28 04:10:44 +00:00
|
|
|
booke_init(uint32_t arg1, uint32_t arg2)
|
2008-03-03 17:17:00 +00:00
|
|
|
{
|
2015-04-30 01:24:25 +00:00
|
|
|
uintptr_t ret;
|
|
|
|
void *mdp;
|
Convert Freescale PowerPC platforms to FDT convention.
The following systems are affected:
- MPC8555CDS
- MPC8572DS
This overhaul covers the following major changes:
- All integrated peripherals drivers for Freescale MPC85XX SoC, which are
currently in the FreeBSD source tree are reworked and adjusted so they
derive config data out of the device tree blob (instead of hard coded /
tabelarized values).
- This includes: LBC, PCI / PCI-Express, I2C, DS1553, OpenPIC, TSEC, SEC,
QUICC, UART, CFI.
- Thanks to the common FDT infrastrucutre (fdtbus, simplebus) we retire
ocpbus(4) driver, which was based on hard-coded config data.
Note that world for these platforms has to be built WITH_FDT.
Reviewed by: imp
Sponsored by: The FreeBSD Foundation
2010-07-11 21:08:29 +00:00
|
|
|
vm_offset_t dtbp, end;
|
2008-03-03 17:17:00 +00:00
|
|
|
|
2011-05-28 04:10:44 +00:00
|
|
|
end = (uintptr_t)_end;
|
Convert Freescale PowerPC platforms to FDT convention.
The following systems are affected:
- MPC8555CDS
- MPC8572DS
This overhaul covers the following major changes:
- All integrated peripherals drivers for Freescale MPC85XX SoC, which are
currently in the FreeBSD source tree are reworked and adjusted so they
derive config data out of the device tree blob (instead of hard coded /
tabelarized values).
- This includes: LBC, PCI / PCI-Express, I2C, DS1553, OpenPIC, TSEC, SEC,
QUICC, UART, CFI.
- Thanks to the common FDT infrastrucutre (fdtbus, simplebus) we retire
ocpbus(4) driver, which was based on hard-coded config data.
Note that world for these platforms has to be built WITH_FDT.
Reviewed by: imp
Sponsored by: The FreeBSD Foundation
2010-07-11 21:08:29 +00:00
|
|
|
dtbp = (vm_offset_t)NULL;
|
2008-03-03 17:17:00 +00:00
|
|
|
|
2013-10-26 19:50:40 +00:00
|
|
|
/* Set up TLB initially */
|
|
|
|
bootinfo = NULL;
|
2015-04-30 01:24:25 +00:00
|
|
|
bzero(__sbss_start, __sbss_end - __sbss_start);
|
|
|
|
bzero(__bss_start, _end - __bss_start);
|
2013-10-26 19:50:40 +00:00
|
|
|
tlb1_init();
|
|
|
|
|
2011-05-28 04:10:44 +00:00
|
|
|
/*
|
|
|
|
* Handle the various ways we can get loaded and started:
|
|
|
|
* - FreeBSD's loader passes the pointer to the metadata
|
|
|
|
* in arg1, with arg2 undefined. arg1 has a value that's
|
|
|
|
* relative to the kernel's link address (i.e. larger
|
|
|
|
* than 0xc0000000).
|
|
|
|
* - Juniper's loader passes the metadata pointer in arg2
|
|
|
|
* and sets arg1 to zero. This is to signal that the
|
|
|
|
* loader maps the kernel and starts it at its link
|
|
|
|
* address (unlike the FreeBSD loader).
|
|
|
|
* - U-Boot passes the standard argc and argv parameters
|
|
|
|
* in arg1 and arg2 (resp). arg1 is between 1 and some
|
|
|
|
* relatively small number, such as 64K. arg2 is the
|
|
|
|
* physical address of the argv vector.
|
2013-10-26 19:50:40 +00:00
|
|
|
* - ePAPR loaders pass an FDT blob in r3 (arg1) and the magic hex
|
2015-12-11 01:34:13 +00:00
|
|
|
* string 0x45504150 ('EPAP') in r6 (which has been lost by now).
|
2013-10-26 19:50:40 +00:00
|
|
|
* r4 (arg2) is supposed to be set to zero, but is not always.
|
2011-05-28 04:10:44 +00:00
|
|
|
*/
|
2013-10-26 19:50:40 +00:00
|
|
|
|
|
|
|
if (arg1 == 0) /* Juniper loader */
|
2011-05-28 04:10:44 +00:00
|
|
|
mdp = (void *)arg2;
|
2013-10-26 19:50:40 +00:00
|
|
|
else if (booke_check_for_fdt(arg1, &dtbp) == 0) { /* ePAPR */
|
|
|
|
end = roundup(end, 8);
|
|
|
|
memmove((void *)end, (void *)dtbp, fdt_totalsize((void *)dtbp));
|
|
|
|
dtbp = end;
|
|
|
|
end += fdt_totalsize((void *)dtbp);
|
2015-04-30 01:24:25 +00:00
|
|
|
__endkernel = end;
|
2013-10-26 19:50:40 +00:00
|
|
|
mdp = NULL;
|
|
|
|
} else if (arg1 > (uintptr_t)kernel_text) /* FreeBSD loader */
|
|
|
|
mdp = (void *)arg1;
|
2011-05-28 04:10:44 +00:00
|
|
|
else /* U-Boot */
|
|
|
|
mdp = NULL;
|
|
|
|
|
2015-12-30 03:43:25 +00:00
|
|
|
/* Default to 32 byte cache line size. */
|
|
|
|
switch ((mfpvr()) >> 16) {
|
|
|
|
case FSL_E500mc:
|
|
|
|
case FSL_E5500:
|
|
|
|
case FSL_E6500:
|
|
|
|
cacheline_size = 64;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
2016-01-04 01:33:07 +00:00
|
|
|
ret = powerpc_init(dtbp, 0, 0, mdp);
|
|
|
|
|
2015-12-30 03:43:25 +00:00
|
|
|
/* Enable caches */
|
2012-05-30 17:34:40 +00:00
|
|
|
booke_enable_l1_cache();
|
2015-12-30 03:43:25 +00:00
|
|
|
booke_enable_l2_cache();
|
|
|
|
|
|
|
|
booke_enable_bpred();
|
2008-03-08 05:36:25 +00:00
|
|
|
|
2015-04-30 01:24:25 +00:00
|
|
|
return (ret);
|
2008-03-03 17:17:00 +00:00
|
|
|
}
|
|
|
|
|
2009-05-21 11:43:37 +00:00
|
|
|
#define RES_GRANULE 32
|
|
|
|
extern uint32_t tlb0_miss_locks[];
|
|
|
|
|
2008-03-03 17:17:00 +00:00
|
|
|
/* Initialise a struct pcpu. */
|
|
|
|
void
|
|
|
|
cpu_pcpu_init(struct pcpu *pcpu, int cpuid, size_t sz)
|
|
|
|
{
|
|
|
|
|
2009-01-13 15:41:58 +00:00
|
|
|
pcpu->pc_tid_next = TID_MIN;
|
2009-05-21 11:43:37 +00:00
|
|
|
|
|
|
|
#ifdef SMP
|
|
|
|
uint32_t *ptr;
|
|
|
|
int words_per_gran = RES_GRANULE / sizeof(uint32_t);
|
|
|
|
|
|
|
|
ptr = &tlb0_miss_locks[cpuid * words_per_gran];
|
|
|
|
pcpu->pc_booke_tlb_lock = ptr;
|
2010-11-11 13:35:23 +00:00
|
|
|
*ptr = TLB_UNLOCKED;
|
2009-05-21 11:43:37 +00:00
|
|
|
*(ptr + 1) = 0; /* recurse counter */
|
|
|
|
#endif
|
2008-03-03 17:17:00 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
/* Shutdown the CPU as much as possible. */
|
|
|
|
void
|
|
|
|
cpu_halt(void)
|
|
|
|
{
|
|
|
|
|
|
|
|
mtmsr(mfmsr() & ~(PSL_CE | PSL_EE | PSL_ME | PSL_DE));
|
2012-05-26 13:36:18 +00:00
|
|
|
while (1)
|
|
|
|
;
|
2008-03-03 17:17:00 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
int
|
|
|
|
ptrace_single_step(struct thread *td)
|
|
|
|
{
|
|
|
|
struct trapframe *tf;
|
|
|
|
|
|
|
|
tf = td->td_frame;
|
|
|
|
tf->srr1 |= PSL_DE;
|
2009-02-27 12:08:24 +00:00
|
|
|
tf->cpu.booke.dbcr0 |= (DBCR0_IDM | DBCR0_IC);
|
2008-03-03 17:17:00 +00:00
|
|
|
return (0);
|
|
|
|
}
|
|
|
|
|
|
|
|
int
|
|
|
|
ptrace_clear_single_step(struct thread *td)
|
|
|
|
{
|
|
|
|
struct trapframe *tf;
|
|
|
|
|
|
|
|
tf = td->td_frame;
|
|
|
|
tf->srr1 &= ~PSL_DE;
|
2009-02-27 12:08:24 +00:00
|
|
|
tf->cpu.booke.dbcr0 &= ~(DBCR0_IDM | DBCR0_IC);
|
2008-03-03 17:17:00 +00:00
|
|
|
return (0);
|
|
|
|
}
|
|
|
|
|
|
|
|
void
|
|
|
|
kdb_cpu_clear_singlestep(void)
|
|
|
|
{
|
|
|
|
register_t r;
|
|
|
|
|
|
|
|
r = mfspr(SPR_DBCR0);
|
|
|
|
mtspr(SPR_DBCR0, r & ~DBCR0_IC);
|
|
|
|
kdb_frame->srr1 &= ~PSL_DE;
|
|
|
|
}
|
|
|
|
|
|
|
|
void
|
|
|
|
kdb_cpu_set_singlestep(void)
|
|
|
|
{
|
|
|
|
register_t r;
|
|
|
|
|
|
|
|
r = mfspr(SPR_DBCR0);
|
|
|
|
mtspr(SPR_DBCR0, r | DBCR0_IC | DBCR0_IDM);
|
|
|
|
kdb_frame->srr1 |= PSL_DE;
|
|
|
|
}
|
|
|
|
|