FreeBSD/mips port. The FreeBSD/mips port targets mips32, mips64,
mips32r2 and mips64r2 (and close relatives) processors. There
presently is support for ADMtek ADM5120, A mips 4Kc in a malta board,
the RB533 routerboard (based on IDT RC32434) and some preliminary
support for sibtye/broadcom designs. Other hardware support will be
forthcomcing.
This port boots multiuser under gxemul emulating the malta board and
also bootstraps on the hardware whose support is forthcoming...
Oleksandr Tymoshenko, Wojciech Koszek, Warner Losh, Olivier Houchard,
Randall Stewert and others that have contributed to the mips2 and/or
mips2-jnpr perforce branches. Juniper contirbuted a generic mips port
late in the life cycle of the misp2 branch. Warner Losh merged the
mips2 and Juniper code bases, and others list above have worked for
the past several months to get to multiuser.
In addition, the mips2 work owe a debt to the trail blazing efforts of
the original mips branch in perforce done by Juli Mallett.
2008-04-13 07:44:55 +00:00
|
|
|
/*-
|
|
|
|
* Copyright (c) 2006 Wojciech A. Koszek <wkoszek@FreeBSD.org>
|
|
|
|
* All rights reserved.
|
|
|
|
*
|
|
|
|
* Redistribution and use in source and binary forms, with or without
|
|
|
|
* modification, are permitted provided that the following conditions
|
|
|
|
* are met:
|
|
|
|
* 1. Redistributions of source code must retain the above copyright
|
|
|
|
* notice, this list of conditions and the following disclaimer.
|
|
|
|
* 2. Redistributions in binary form must reproduce the above copyright
|
|
|
|
* notice, this list of conditions and the following disclaimer in the
|
|
|
|
* documentation and/or other materials provided with the distribution.
|
|
|
|
*
|
|
|
|
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
|
|
|
|
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
|
|
|
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
|
|
|
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
|
|
|
|
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
|
|
|
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
|
|
|
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
|
|
|
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
|
|
|
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
|
|
|
|
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
|
|
|
* SUCH DAMAGE.
|
|
|
|
*
|
|
|
|
* $FreeBSD$
|
|
|
|
*/
|
|
|
|
#include <sys/cdefs.h>
|
|
|
|
__FBSDID("$FreeBSD$");
|
|
|
|
|
|
|
|
#include "opt_ddb.h"
|
|
|
|
|
|
|
|
#include <sys/param.h>
|
|
|
|
#include <sys/conf.h>
|
|
|
|
#include <sys/kernel.h>
|
|
|
|
#include <sys/systm.h>
|
|
|
|
#include <sys/imgact.h>
|
|
|
|
#include <sys/bio.h>
|
|
|
|
#include <sys/buf.h>
|
|
|
|
#include <sys/bus.h>
|
|
|
|
#include <sys/cpu.h>
|
|
|
|
#include <sys/cons.h>
|
|
|
|
#include <sys/exec.h>
|
|
|
|
#include <sys/ucontext.h>
|
|
|
|
#include <sys/proc.h>
|
|
|
|
#include <sys/kdb.h>
|
|
|
|
#include <sys/ptrace.h>
|
|
|
|
#include <sys/reboot.h>
|
|
|
|
#include <sys/signalvar.h>
|
|
|
|
#include <sys/sysent.h>
|
|
|
|
#include <sys/sysproto.h>
|
|
|
|
#include <sys/user.h>
|
|
|
|
|
|
|
|
#include <vm/vm.h>
|
|
|
|
#include <vm/vm_object.h>
|
|
|
|
#include <vm/vm_page.h>
|
|
|
|
#include <vm/vm_pager.h>
|
|
|
|
|
|
|
|
#include <machine/clock.h>
|
|
|
|
#include <machine/cpu.h>
|
|
|
|
#include <machine/cpuregs.h>
|
|
|
|
#include <machine/hwfunc.h>
|
|
|
|
#include <machine/md_var.h>
|
|
|
|
#include <machine/pmap.h>
|
|
|
|
#include <machine/trap.h>
|
|
|
|
|
|
|
|
#ifdef TICK_USE_YAMON_FREQ
|
2008-09-10 03:49:08 +00:00
|
|
|
#include <mips/malta/yamon.h>
|
FreeBSD/mips port. The FreeBSD/mips port targets mips32, mips64,
mips32r2 and mips64r2 (and close relatives) processors. There
presently is support for ADMtek ADM5120, A mips 4Kc in a malta board,
the RB533 routerboard (based on IDT RC32434) and some preliminary
support for sibtye/broadcom designs. Other hardware support will be
forthcomcing.
This port boots multiuser under gxemul emulating the malta board and
also bootstraps on the hardware whose support is forthcoming...
Oleksandr Tymoshenko, Wojciech Koszek, Warner Losh, Olivier Houchard,
Randall Stewert and others that have contributed to the mips2 and/or
mips2-jnpr perforce branches. Juniper contirbuted a generic mips port
late in the life cycle of the misp2 branch. Warner Losh merged the
mips2 and Juniper code bases, and others list above have worked for
the past several months to get to multiuser.
In addition, the mips2 work owe a debt to the trail blazing efforts of
the original mips branch in perforce done by Juli Mallett.
2008-04-13 07:44:55 +00:00
|
|
|
#endif
|
|
|
|
|
|
|
|
#ifdef TICK_USE_MALTA_RTC
|
|
|
|
#include <mips/mips4k/malta/maltareg.h>
|
|
|
|
#include <dev/mc146818/mc146818reg.h>
|
|
|
|
#include <isa/rtc.h>
|
|
|
|
#endif
|
|
|
|
|
2008-09-10 03:49:08 +00:00
|
|
|
#include <mips/malta/maltareg.h>
|
FreeBSD/mips port. The FreeBSD/mips port targets mips32, mips64,
mips32r2 and mips64r2 (and close relatives) processors. There
presently is support for ADMtek ADM5120, A mips 4Kc in a malta board,
the RB533 routerboard (based on IDT RC32434) and some preliminary
support for sibtye/broadcom designs. Other hardware support will be
forthcomcing.
This port boots multiuser under gxemul emulating the malta board and
also bootstraps on the hardware whose support is forthcoming...
Oleksandr Tymoshenko, Wojciech Koszek, Warner Losh, Olivier Houchard,
Randall Stewert and others that have contributed to the mips2 and/or
mips2-jnpr perforce branches. Juniper contirbuted a generic mips port
late in the life cycle of the misp2 branch. Warner Losh merged the
mips2 and Juniper code bases, and others list above have worked for
the past several months to get to multiuser.
In addition, the mips2 work owe a debt to the trail blazing efforts of
the original mips branch in perforce done by Juli Mallett.
2008-04-13 07:44:55 +00:00
|
|
|
|
|
|
|
extern int *edata;
|
|
|
|
extern int *end;
|
|
|
|
|
|
|
|
void lcd_init(void);
|
|
|
|
void lcd_puts(char *);
|
|
|
|
void malta_reset(void);
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Offsets to MALTA LCD characters.
|
|
|
|
*/
|
|
|
|
static int malta_lcd_offs[] = {
|
|
|
|
MALTA_ASCIIPOS0,
|
|
|
|
MALTA_ASCIIPOS1,
|
|
|
|
MALTA_ASCIIPOS2,
|
|
|
|
MALTA_ASCIIPOS3,
|
|
|
|
MALTA_ASCIIPOS4,
|
|
|
|
MALTA_ASCIIPOS5,
|
|
|
|
MALTA_ASCIIPOS6,
|
|
|
|
MALTA_ASCIIPOS7
|
|
|
|
};
|
|
|
|
|
Merge from projects/mips to head by hand:
r201881 | imp | 2010-01-08 20:08:22 -0700 (Fri, 08 Jan 2010) | 3 lines
Rename mips_pcpu_init to mips_pcpu0_init since it applies only to the
BSP. Provide a missing prototype.
r198669 | rrs | 2009-10-30 02:53:11 -0600 (Fri, 30 Oct 2009) | 5 lines
With this commit our friend RMI will now compile. I have
not tested it and the chances of it running yet are about
ZERO.. but it will now compile. The hard part now begins,
making it run ;-)
r198154 | rrs | 2009-10-15 15:03:32 -0600 (Thu, 15 Oct 2009) | 10 lines
Does 4 things:
1) Adds future RMI directories
2) Places intr_machdep.c in specfic files.arch pointing to the generic
intr_machdep.c. This allows us to have an architecture dependant
intr_machdep.c (which we will need for RMI) in the machine specific
directory
3) removes intr_machdep.c from files.mips
4) Adds some TARGET_XLR_XLS ifdef's for the machine specific intra_machdep.h. We
may need to look at finding a better place to put this. But first I want to
get this thing compiling.
r196836 | gonzo | 2009-09-04 13:02:11 -0600 (Fri, 04 Sep 2009) | 2 lines
- Clean out some XXXMIPS comments that's not relevant now
r196236 | imp | 2009-08-14 19:03:13 -0600 (Fri, 14 Aug 2009) | 3 lines
Fix style error replicated multiple times. Move to
mips_bus_space_generic for octeon obio impl.
r195496 | imp | 2009-07-09 09:04:52 -0600 (Thu, 09 Jul 2009) | 2 lines
Don't force ISA_MIPS32.
r195495 | imp | 2009-07-09 09:04:24 -0600 (Thu, 09 Jul 2009) | 4 lines
Make the yamon function pointer stuff 64-bit safe. Make the base
unsigned long, and sign extend the address of the function we're
calling through.
r195494 | imp | 2009-07-09 08:54:09 -0600 (Thu, 09 Jul 2009) | 3 lines
Addresses should be unsigned long. Make the address constants
unsigned long.
r194929 | gonzo | 2009-06-24 16:42:52 -0600 (Wed, 24 Jun 2009) | 6 lines
- Do not use hardcoded uart speed
- Call mips_timer_early_init before initializing uart in order
to make DELAY usable for ns8250 driver
Submitted by: Neelkanth Natu
r194212 | gonzo | 2009-06-14 14:54:46 -0600 (Sun, 14 Jun 2009) | 2 lines
- Fix prototypes to make compiler happy
r192864 | gonzo | 2009-05-26 16:40:12 -0600 (Tue, 26 May 2009) | 4 lines
- Replace CPU_NOFPU and SOFTFLOAT options with CPU_FPU. By default
we assume that there is no FPU, because majority of SoC does
not have it.
r192788 | gonzo | 2009-05-25 22:51:56 -0600 (Mon, 25 May 2009) | 3 lines
- Provide proper pre_thread/post_ithread functions for GT PCI
controller.
r191282 | gonzo | 2009-04-19 16:02:14 -0600 (Sun, 19 Apr 2009) | 3 lines
- Make mips_bus_space_generic be of type bus_space_tag_t instead of
struct bus_space and update all relevant places.
r191084 | gonzo | 2009-04-14 20:28:26 -0600 (Tue, 14 Apr 2009) | 6 lines
Use FreeBSD/arm approach for handling bus space access: space tag is a pointer
to bus_space structure that defines access methods and hence every bus can
define own accessors. Default space is mips_bus_space_generic. It's a simple
interface to physical memory, values are read with regard to host system
byte order.
2010-01-10 20:06:14 +00:00
|
|
|
void
|
|
|
|
platform_cpu_init()
|
|
|
|
{
|
|
|
|
/* Nothing special */
|
|
|
|
}
|
|
|
|
|
FreeBSD/mips port. The FreeBSD/mips port targets mips32, mips64,
mips32r2 and mips64r2 (and close relatives) processors. There
presently is support for ADMtek ADM5120, A mips 4Kc in a malta board,
the RB533 routerboard (based on IDT RC32434) and some preliminary
support for sibtye/broadcom designs. Other hardware support will be
forthcomcing.
This port boots multiuser under gxemul emulating the malta board and
also bootstraps on the hardware whose support is forthcoming...
Oleksandr Tymoshenko, Wojciech Koszek, Warner Losh, Olivier Houchard,
Randall Stewert and others that have contributed to the mips2 and/or
mips2-jnpr perforce branches. Juniper contirbuted a generic mips port
late in the life cycle of the misp2 branch. Warner Losh merged the
mips2 and Juniper code bases, and others list above have worked for
the past several months to get to multiuser.
In addition, the mips2 work owe a debt to the trail blazing efforts of
the original mips branch in perforce done by Juli Mallett.
2008-04-13 07:44:55 +00:00
|
|
|
/*
|
|
|
|
* Put character to Malta LCD at given position.
|
|
|
|
*/
|
|
|
|
static void
|
|
|
|
malta_lcd_putc(int pos, char c)
|
|
|
|
{
|
|
|
|
void *addr;
|
|
|
|
char *ch;
|
|
|
|
|
|
|
|
if (pos < 0 || pos > 7)
|
|
|
|
return;
|
|
|
|
addr = (void *)(MALTA_ASCII_BASE + malta_lcd_offs[pos]);
|
|
|
|
ch = (char *)MIPS_PHYS_TO_KSEG0(addr);
|
|
|
|
*ch = c;
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Print given string on LCD.
|
|
|
|
*/
|
|
|
|
static void
|
|
|
|
malta_lcd_print(char *str)
|
|
|
|
{
|
|
|
|
int i;
|
|
|
|
|
|
|
|
if (str == NULL)
|
|
|
|
return;
|
|
|
|
|
|
|
|
for (i = 0; *str != '\0'; i++, str++)
|
|
|
|
malta_lcd_putc(i, *str);
|
|
|
|
}
|
|
|
|
|
|
|
|
void
|
|
|
|
lcd_init(void)
|
|
|
|
{
|
|
|
|
malta_lcd_print("FreeBSD_");
|
|
|
|
}
|
|
|
|
|
|
|
|
void
|
|
|
|
lcd_puts(char *s)
|
|
|
|
{
|
|
|
|
malta_lcd_print(s);
|
|
|
|
}
|
|
|
|
|
|
|
|
#ifdef TICK_USE_MALTA_RTC
|
|
|
|
static __inline uint8_t
|
|
|
|
rtcin(uint8_t addr)
|
|
|
|
{
|
|
|
|
|
|
|
|
*((volatile uint8_t *)
|
|
|
|
MIPS_PHYS_TO_KSEG1(MALTA_PCI0_ADDR(MALTA_RTCADR))) = addr;
|
|
|
|
return (*((volatile uint8_t *)
|
|
|
|
MIPS_PHYS_TO_KSEG1(MALTA_PCI0_ADDR(MALTA_RTCDAT))));
|
|
|
|
}
|
|
|
|
|
|
|
|
static __inline void
|
|
|
|
writertc(uint8_t addr, uint8_t val)
|
|
|
|
{
|
|
|
|
|
|
|
|
*((volatile uint8_t *)
|
|
|
|
MIPS_PHYS_TO_KSEG1(MALTA_PCI0_ADDR(MALTA_RTCADR))) = addr;
|
|
|
|
*((volatile uint8_t *)
|
|
|
|
MIPS_PHYS_TO_KSEG1(MALTA_PCI0_ADDR(MALTA_RTCDAT))) = val;
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
|
|
|
static void
|
|
|
|
mips_init(void)
|
|
|
|
{
|
|
|
|
int i;
|
|
|
|
|
|
|
|
for (i = 0; i < 10; i++) {
|
|
|
|
phys_avail[i] = 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* phys_avail regions are in bytes */
|
|
|
|
phys_avail[0] = MIPS_KSEG0_TO_PHYS((vm_offset_t)&end);
|
|
|
|
phys_avail[1] = ctob(realmem);
|
|
|
|
|
|
|
|
physmem = realmem;
|
|
|
|
|
|
|
|
init_param1();
|
|
|
|
init_param2(physmem);
|
|
|
|
mips_cpu_init();
|
|
|
|
pmap_bootstrap();
|
|
|
|
mips_proc0_init();
|
|
|
|
mutex_init();
|
|
|
|
#ifdef DDB
|
|
|
|
kdb_init();
|
|
|
|
#endif
|
|
|
|
}
|
|
|
|
|
|
|
|
void
|
|
|
|
platform_halt(void)
|
|
|
|
{
|
|
|
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
platform_identify(void)
|
|
|
|
{
|
|
|
|
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Perform a board-level soft-reset.
|
|
|
|
* Note that this is not emulated by gxemul.
|
|
|
|
*/
|
|
|
|
void
|
|
|
|
platform_reset(void)
|
|
|
|
{
|
|
|
|
char *c;
|
|
|
|
|
|
|
|
c = (char *)MIPS_PHYS_TO_KSEG0(MALTA_SOFTRES);
|
|
|
|
*c = MALTA_GORESET;
|
|
|
|
}
|
|
|
|
|
|
|
|
void
|
|
|
|
platform_trap_enter(void)
|
|
|
|
{
|
|
|
|
|
|
|
|
}
|
|
|
|
|
|
|
|
void
|
|
|
|
platform_trap_exit(void)
|
|
|
|
{
|
|
|
|
|
|
|
|
}
|
|
|
|
|
Merge from projects/mips to head by hand:
r201881 | imp | 2010-01-08 20:08:22 -0700 (Fri, 08 Jan 2010) | 3 lines
Rename mips_pcpu_init to mips_pcpu0_init since it applies only to the
BSP. Provide a missing prototype.
r198669 | rrs | 2009-10-30 02:53:11 -0600 (Fri, 30 Oct 2009) | 5 lines
With this commit our friend RMI will now compile. I have
not tested it and the chances of it running yet are about
ZERO.. but it will now compile. The hard part now begins,
making it run ;-)
r198154 | rrs | 2009-10-15 15:03:32 -0600 (Thu, 15 Oct 2009) | 10 lines
Does 4 things:
1) Adds future RMI directories
2) Places intr_machdep.c in specfic files.arch pointing to the generic
intr_machdep.c. This allows us to have an architecture dependant
intr_machdep.c (which we will need for RMI) in the machine specific
directory
3) removes intr_machdep.c from files.mips
4) Adds some TARGET_XLR_XLS ifdef's for the machine specific intra_machdep.h. We
may need to look at finding a better place to put this. But first I want to
get this thing compiling.
r196836 | gonzo | 2009-09-04 13:02:11 -0600 (Fri, 04 Sep 2009) | 2 lines
- Clean out some XXXMIPS comments that's not relevant now
r196236 | imp | 2009-08-14 19:03:13 -0600 (Fri, 14 Aug 2009) | 3 lines
Fix style error replicated multiple times. Move to
mips_bus_space_generic for octeon obio impl.
r195496 | imp | 2009-07-09 09:04:52 -0600 (Thu, 09 Jul 2009) | 2 lines
Don't force ISA_MIPS32.
r195495 | imp | 2009-07-09 09:04:24 -0600 (Thu, 09 Jul 2009) | 4 lines
Make the yamon function pointer stuff 64-bit safe. Make the base
unsigned long, and sign extend the address of the function we're
calling through.
r195494 | imp | 2009-07-09 08:54:09 -0600 (Thu, 09 Jul 2009) | 3 lines
Addresses should be unsigned long. Make the address constants
unsigned long.
r194929 | gonzo | 2009-06-24 16:42:52 -0600 (Wed, 24 Jun 2009) | 6 lines
- Do not use hardcoded uart speed
- Call mips_timer_early_init before initializing uart in order
to make DELAY usable for ns8250 driver
Submitted by: Neelkanth Natu
r194212 | gonzo | 2009-06-14 14:54:46 -0600 (Sun, 14 Jun 2009) | 2 lines
- Fix prototypes to make compiler happy
r192864 | gonzo | 2009-05-26 16:40:12 -0600 (Tue, 26 May 2009) | 4 lines
- Replace CPU_NOFPU and SOFTFLOAT options with CPU_FPU. By default
we assume that there is no FPU, because majority of SoC does
not have it.
r192788 | gonzo | 2009-05-25 22:51:56 -0600 (Mon, 25 May 2009) | 3 lines
- Provide proper pre_thread/post_ithread functions for GT PCI
controller.
r191282 | gonzo | 2009-04-19 16:02:14 -0600 (Sun, 19 Apr 2009) | 3 lines
- Make mips_bus_space_generic be of type bus_space_tag_t instead of
struct bus_space and update all relevant places.
r191084 | gonzo | 2009-04-14 20:28:26 -0600 (Tue, 14 Apr 2009) | 6 lines
Use FreeBSD/arm approach for handling bus space access: space tag is a pointer
to bus_space structure that defines access methods and hence every bus can
define own accessors. Default space is mips_bus_space_generic. It's a simple
interface to physical memory, values are read with regard to host system
byte order.
2010-01-10 20:06:14 +00:00
|
|
|
static uint64_t
|
|
|
|
malta_cpu_freq(void)
|
|
|
|
{
|
|
|
|
uint64_t platform_counter_freq = 0;
|
|
|
|
|
|
|
|
#if defined(TICK_USE_YAMON_FREQ)
|
|
|
|
/*
|
|
|
|
* If we are running on a board which uses YAMON firmware,
|
|
|
|
* then query CPU pipeline clock from the syscon object.
|
|
|
|
* If unsuccessful, use hard-coded default.
|
|
|
|
*/
|
|
|
|
platform_counter_freq = yamon_getcpufreq();
|
|
|
|
|
|
|
|
#elif defined(TICK_USE_MALTA_RTC)
|
|
|
|
/*
|
|
|
|
* If we are running on a board with the MC146818 RTC,
|
|
|
|
* use it to determine CPU pipeline clock frequency.
|
|
|
|
*/
|
|
|
|
u_int64_t counterval[2];
|
|
|
|
|
|
|
|
/* Set RTC to binary mode. */
|
|
|
|
writertc(RTC_STATUSB, (rtcin(RTC_STATUSB) | RTCSB_BCD));
|
|
|
|
|
|
|
|
/* Busy-wait for falling edge of RTC update. */
|
|
|
|
while (((rtcin(RTC_STATUSA) & RTCSA_TUP) == 0))
|
|
|
|
;
|
|
|
|
while (((rtcin(RTC_STATUSA)& RTCSA_TUP) != 0))
|
|
|
|
;
|
|
|
|
counterval[0] = mips_rd_count();
|
|
|
|
|
|
|
|
/* Busy-wait for falling edge of RTC update. */
|
|
|
|
while (((rtcin(RTC_STATUSA) & RTCSA_TUP) == 0))
|
|
|
|
;
|
|
|
|
while (((rtcin(RTC_STATUSA)& RTCSA_TUP) != 0))
|
|
|
|
;
|
|
|
|
counterval[1] = mips_rd_count();
|
|
|
|
|
|
|
|
platform_counter_freq = counterval[1] - counterval[0];
|
|
|
|
#endif
|
|
|
|
|
|
|
|
if (platform_counter_freq == 0)
|
|
|
|
platform_counter_freq = MIPS_DEFAULT_HZ;
|
|
|
|
|
|
|
|
return (platform_counter_freq);
|
|
|
|
}
|
|
|
|
|
FreeBSD/mips port. The FreeBSD/mips port targets mips32, mips64,
mips32r2 and mips64r2 (and close relatives) processors. There
presently is support for ADMtek ADM5120, A mips 4Kc in a malta board,
the RB533 routerboard (based on IDT RC32434) and some preliminary
support for sibtye/broadcom designs. Other hardware support will be
forthcomcing.
This port boots multiuser under gxemul emulating the malta board and
also bootstraps on the hardware whose support is forthcoming...
Oleksandr Tymoshenko, Wojciech Koszek, Warner Losh, Olivier Houchard,
Randall Stewert and others that have contributed to the mips2 and/or
mips2-jnpr perforce branches. Juniper contirbuted a generic mips port
late in the life cycle of the misp2 branch. Warner Losh merged the
mips2 and Juniper code bases, and others list above have worked for
the past several months to get to multiuser.
In addition, the mips2 work owe a debt to the trail blazing efforts of
the original mips branch in perforce done by Juli Mallett.
2008-04-13 07:44:55 +00:00
|
|
|
void
|
|
|
|
platform_start(__register_t a0, __register_t a1, __register_t a2,
|
|
|
|
__register_t a3)
|
|
|
|
{
|
|
|
|
vm_offset_t kernend;
|
|
|
|
uint64_t platform_counter_freq;
|
|
|
|
int argc = a0;
|
|
|
|
char **argv = (char **)a1;
|
|
|
|
char **envp = (char **)a2;
|
|
|
|
unsigned int memsize = a3;
|
|
|
|
int i;
|
|
|
|
|
|
|
|
/* clear the BSS and SBSS segments */
|
|
|
|
kernend = round_page((vm_offset_t)&end);
|
|
|
|
memset(&edata, 0, kernend - (vm_offset_t)(&edata));
|
|
|
|
|
Merge from projects/mips to head by hand:
r201881 | imp | 2010-01-08 20:08:22 -0700 (Fri, 08 Jan 2010) | 3 lines
Rename mips_pcpu_init to mips_pcpu0_init since it applies only to the
BSP. Provide a missing prototype.
r198669 | rrs | 2009-10-30 02:53:11 -0600 (Fri, 30 Oct 2009) | 5 lines
With this commit our friend RMI will now compile. I have
not tested it and the chances of it running yet are about
ZERO.. but it will now compile. The hard part now begins,
making it run ;-)
r198154 | rrs | 2009-10-15 15:03:32 -0600 (Thu, 15 Oct 2009) | 10 lines
Does 4 things:
1) Adds future RMI directories
2) Places intr_machdep.c in specfic files.arch pointing to the generic
intr_machdep.c. This allows us to have an architecture dependant
intr_machdep.c (which we will need for RMI) in the machine specific
directory
3) removes intr_machdep.c from files.mips
4) Adds some TARGET_XLR_XLS ifdef's for the machine specific intra_machdep.h. We
may need to look at finding a better place to put this. But first I want to
get this thing compiling.
r196836 | gonzo | 2009-09-04 13:02:11 -0600 (Fri, 04 Sep 2009) | 2 lines
- Clean out some XXXMIPS comments that's not relevant now
r196236 | imp | 2009-08-14 19:03:13 -0600 (Fri, 14 Aug 2009) | 3 lines
Fix style error replicated multiple times. Move to
mips_bus_space_generic for octeon obio impl.
r195496 | imp | 2009-07-09 09:04:52 -0600 (Thu, 09 Jul 2009) | 2 lines
Don't force ISA_MIPS32.
r195495 | imp | 2009-07-09 09:04:24 -0600 (Thu, 09 Jul 2009) | 4 lines
Make the yamon function pointer stuff 64-bit safe. Make the base
unsigned long, and sign extend the address of the function we're
calling through.
r195494 | imp | 2009-07-09 08:54:09 -0600 (Thu, 09 Jul 2009) | 3 lines
Addresses should be unsigned long. Make the address constants
unsigned long.
r194929 | gonzo | 2009-06-24 16:42:52 -0600 (Wed, 24 Jun 2009) | 6 lines
- Do not use hardcoded uart speed
- Call mips_timer_early_init before initializing uart in order
to make DELAY usable for ns8250 driver
Submitted by: Neelkanth Natu
r194212 | gonzo | 2009-06-14 14:54:46 -0600 (Sun, 14 Jun 2009) | 2 lines
- Fix prototypes to make compiler happy
r192864 | gonzo | 2009-05-26 16:40:12 -0600 (Tue, 26 May 2009) | 4 lines
- Replace CPU_NOFPU and SOFTFLOAT options with CPU_FPU. By default
we assume that there is no FPU, because majority of SoC does
not have it.
r192788 | gonzo | 2009-05-25 22:51:56 -0600 (Mon, 25 May 2009) | 3 lines
- Provide proper pre_thread/post_ithread functions for GT PCI
controller.
r191282 | gonzo | 2009-04-19 16:02:14 -0600 (Sun, 19 Apr 2009) | 3 lines
- Make mips_bus_space_generic be of type bus_space_tag_t instead of
struct bus_space and update all relevant places.
r191084 | gonzo | 2009-04-14 20:28:26 -0600 (Tue, 14 Apr 2009) | 6 lines
Use FreeBSD/arm approach for handling bus space access: space tag is a pointer
to bus_space structure that defines access methods and hence every bus can
define own accessors. Default space is mips_bus_space_generic. It's a simple
interface to physical memory, values are read with regard to host system
byte order.
2010-01-10 20:06:14 +00:00
|
|
|
mips_pcpu0_init();
|
|
|
|
platform_counter_freq = malta_cpu_freq();
|
|
|
|
mips_timer_early_init(platform_counter_freq);
|
|
|
|
|
FreeBSD/mips port. The FreeBSD/mips port targets mips32, mips64,
mips32r2 and mips64r2 (and close relatives) processors. There
presently is support for ADMtek ADM5120, A mips 4Kc in a malta board,
the RB533 routerboard (based on IDT RC32434) and some preliminary
support for sibtye/broadcom designs. Other hardware support will be
forthcomcing.
This port boots multiuser under gxemul emulating the malta board and
also bootstraps on the hardware whose support is forthcoming...
Oleksandr Tymoshenko, Wojciech Koszek, Warner Losh, Olivier Houchard,
Randall Stewert and others that have contributed to the mips2 and/or
mips2-jnpr perforce branches. Juniper contirbuted a generic mips port
late in the life cycle of the misp2 branch. Warner Losh merged the
mips2 and Juniper code bases, and others list above have worked for
the past several months to get to multiuser.
In addition, the mips2 work owe a debt to the trail blazing efforts of
the original mips branch in perforce done by Juli Mallett.
2008-04-13 07:44:55 +00:00
|
|
|
cninit();
|
|
|
|
printf("entry: platform_start()\n");
|
|
|
|
|
|
|
|
bootverbose = 1;
|
|
|
|
if (bootverbose) {
|
|
|
|
printf("cmd line: ");
|
|
|
|
for (i = 0; i < argc; i++)
|
|
|
|
printf("%s ", argv[i]);
|
|
|
|
printf("\n");
|
|
|
|
|
|
|
|
printf("envp:\n");
|
|
|
|
for (i = 0; envp[i]; i += 2)
|
|
|
|
printf("\t%s = %s\n", envp[i], envp[i+1]);
|
|
|
|
|
|
|
|
printf("memsize = %08x\n", memsize);
|
|
|
|
}
|
|
|
|
|
|
|
|
realmem = btoc(memsize);
|
|
|
|
mips_init();
|
|
|
|
|
|
|
|
mips_timer_init_params(platform_counter_freq, 0);
|
|
|
|
}
|