2005-01-06 01:43:34 +00:00
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/*-
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1996-11-04 22:17:20 +00:00
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* Copyright (c) 1994 Herb Peyerl <hpeyerl@novatel.ca>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by Herb Peyerl.
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* 4. The name of Herb Peyerl may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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1998-02-21 05:35:02 +00:00
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*
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1996-11-04 22:17:20 +00:00
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*/
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2003-08-24 17:55:58 +00:00
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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1996-11-04 22:17:20 +00:00
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/*
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* Created from if_ep.c driver by Fred Gray (fgray@rice.edu) to support
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* the 3c590 family.
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*/
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/*
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* Modified from the FreeBSD 1.1.5.1 version by:
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* Andres Vega Garcia
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* INRIA - Sophia Antipolis, France
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* avega@sophia.inria.fr
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*/
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/*
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* Promiscuous mode added and interrupt logic slightly changed
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* to reduce the number of adapter failures. Transceiver select
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* logic changed to use value from EEPROM. Autoconfiguration
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* features added.
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* Done by:
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* Serge Babkin
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* Chelindbank (Chelyabinsk, Russia)
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* babkin@hq.icb.chel.su
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*/
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#include <sys/param.h>
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#include <sys/systm.h>
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1997-03-24 11:33:46 +00:00
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#include <sys/sockio.h>
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2005-10-06 18:27:59 +00:00
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#include <sys/kernel.h>
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1997-06-14 13:56:12 +00:00
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#include <sys/malloc.h>
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1996-11-04 22:17:20 +00:00
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#include <sys/mbuf.h>
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#include <sys/socket.h>
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#include <net/if.h>
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2013-10-26 17:58:36 +00:00
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#include <net/if_var.h>
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1996-11-04 22:17:20 +00:00
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1998-01-08 23:42:31 +00:00
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#include <net/ethernet.h>
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2005-11-11 16:04:59 +00:00
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#include <net/if_dl.h>
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2005-06-10 16:49:24 +00:00
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#include <net/if_types.h>
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1996-11-04 22:17:20 +00:00
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2000-11-07 00:56:14 +00:00
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#include <machine/bus.h>
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2003-10-31 18:32:15 +00:00
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#include <sys/bus.h>
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1996-11-04 22:17:20 +00:00
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#include <net/bpf.h>
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#include <dev/vx/if_vxreg.h>
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2003-10-25 04:05:33 +00:00
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#include <dev/vx/if_vxvar.h>
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1996-11-04 22:17:20 +00:00
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#define ETHER_MAX_LEN 1518
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#define ETHER_ADDR_LEN 6
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2000-12-07 23:30:51 +00:00
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#define ETHER_ALIGN 2
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1996-11-04 22:17:20 +00:00
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static struct connector_entry {
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2004-08-18 16:56:54 +00:00
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int bit;
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char *name;
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1996-12-02 18:44:31 +00:00
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} conn_tab[VX_CONNECTORS] = {
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2004-08-18 16:56:54 +00:00
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1996-11-04 22:17:20 +00:00
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#define CONNECTOR_UTP 0
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2004-08-18 16:56:54 +00:00
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{
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0x08, "utp"
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},
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1996-11-04 22:17:20 +00:00
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#define CONNECTOR_AUI 1
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2004-08-18 16:56:54 +00:00
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{
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0x20, "aui"
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},
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1996-11-04 22:17:20 +00:00
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/* dummy */
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2004-08-18 16:56:54 +00:00
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{
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0, "???"
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},
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1996-11-04 22:17:20 +00:00
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#define CONNECTOR_BNC 3
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2004-08-18 16:56:54 +00:00
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{
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0x10, "bnc"
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},
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1996-11-04 22:17:20 +00:00
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#define CONNECTOR_TX 4
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2004-08-18 16:56:54 +00:00
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{
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0x02, "tx"
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},
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1996-11-04 22:17:20 +00:00
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#define CONNECTOR_FX 5
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2004-08-18 16:56:54 +00:00
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{
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0x04, "fx"
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},
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1996-11-04 22:17:20 +00:00
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#define CONNECTOR_MII 6
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2004-08-18 16:56:54 +00:00
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{
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0x40, "mii"
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},
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{
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0, "???"
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}
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1996-11-04 22:17:20 +00:00
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};
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2005-10-06 18:27:59 +00:00
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static void vx_txstat(struct vx_softc *);
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static int vx_status(struct vx_softc *);
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static void vx_init(void *);
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static void vx_init_locked(struct vx_softc *);
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static int vx_ioctl(struct ifnet *, u_long, caddr_t);
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static void vx_start(struct ifnet *);
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static void vx_start_locked(struct ifnet *);
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2009-11-19 22:06:40 +00:00
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static void vx_watchdog(void *);
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2005-10-06 18:27:59 +00:00
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static void vx_reset(struct vx_softc *);
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static void vx_read(struct vx_softc *);
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static struct mbuf *vx_get(struct vx_softc *, u_int);
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static void vx_mbuf_fill(void *);
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static void vx_mbuf_empty(struct vx_softc *);
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static void vx_setfilter(struct vx_softc *);
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static void vx_getlink(struct vx_softc *);
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static void vx_setlink(struct vx_softc *);
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1996-11-04 22:17:20 +00:00
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int
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2005-10-06 18:27:59 +00:00
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vx_attach(device_t dev)
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1996-11-04 22:17:20 +00:00
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{
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2004-08-18 16:56:54 +00:00
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struct vx_softc *sc = device_get_softc(dev);
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2005-06-10 16:49:24 +00:00
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struct ifnet *ifp;
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2004-08-18 16:56:54 +00:00
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int i;
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2005-06-10 16:49:24 +00:00
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u_char eaddr[6];
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2005-10-06 18:27:59 +00:00
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ifp = sc->vx_ifp = if_alloc(IFT_ETHER);
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2005-06-10 16:49:24 +00:00
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if (ifp == NULL) {
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device_printf(dev, "can not if_alloc()\n");
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return 0;
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}
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2005-10-06 18:27:59 +00:00
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if_initname(ifp, device_get_name(dev), device_get_unit(dev));
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1996-11-04 22:17:20 +00:00
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2005-10-06 18:27:59 +00:00
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mtx_init(&sc->vx_mtx, device_get_nameunit(dev), MTX_NETWORK_LOCK,
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MTX_DEF);
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callout_init_mtx(&sc->vx_callout, &sc->vx_mtx, 0);
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2009-11-19 22:06:40 +00:00
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callout_init_mtx(&sc->vx_watchdog, &sc->vx_mtx, 0);
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2004-08-18 16:56:54 +00:00
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GO_WINDOW(0);
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CSR_WRITE_2(sc, VX_COMMAND, GLOBAL_RESET);
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VX_BUSY_WAIT;
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1996-11-04 22:17:20 +00:00
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2005-10-06 18:27:59 +00:00
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vx_getlink(sc);
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2004-08-18 16:56:54 +00:00
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/*
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* Read the station address from the eeprom
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*/
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GO_WINDOW(0);
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for (i = 0; i < 3; i++) {
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int x;
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2005-10-06 18:27:59 +00:00
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if (vx_busy_eeprom(sc)) {
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mtx_destroy(&sc->vx_mtx);
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if_free(ifp);
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2004-08-18 16:56:54 +00:00
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return 0;
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2005-10-06 18:27:59 +00:00
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}
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2004-08-18 16:56:54 +00:00
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CSR_WRITE_2(sc, VX_W0_EEPROM_COMMAND, EEPROM_CMD_RD
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| (EEPROM_OEM_ADDR0 + i));
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2005-10-06 18:27:59 +00:00
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if (vx_busy_eeprom(sc)) {
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mtx_destroy(&sc->vx_mtx);
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if_free(ifp);
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2004-08-18 16:56:54 +00:00
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return 0;
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2005-10-06 18:27:59 +00:00
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}
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2004-08-18 16:56:54 +00:00
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x = CSR_READ_2(sc, VX_W0_EEPROM_DATA);
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2005-06-10 16:49:24 +00:00
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eaddr[(i << 1)] = x >> 8;
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eaddr[(i << 1) + 1] = x;
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2004-08-18 16:56:54 +00:00
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}
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2010-05-03 07:32:50 +00:00
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ifp->if_snd.ifq_maxlen = ifqmaxlen;
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2005-10-06 18:27:59 +00:00
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ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
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ifp->if_start = vx_start;
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ifp->if_ioctl = vx_ioctl;
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ifp->if_init = vx_init;
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2004-08-18 16:56:54 +00:00
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ifp->if_softc = sc;
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2005-06-10 16:49:24 +00:00
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ether_ifattach(ifp, eaddr);
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2004-08-18 16:56:54 +00:00
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2005-10-06 18:27:59 +00:00
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sc->vx_tx_start_thresh = 20; /* probably a good starting point. */
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2004-08-18 16:56:54 +00:00
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2008-04-24 22:51:43 +00:00
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VX_LOCK(sc);
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2005-10-06 18:27:59 +00:00
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vx_stop(sc);
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2008-04-24 22:51:43 +00:00
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VX_UNLOCK(sc);
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2004-08-18 16:56:54 +00:00
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return 1;
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}
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1996-11-04 22:17:20 +00:00
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/*
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* The order in here seems important. Otherwise we may not receive
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* interrupts. ?!
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*/
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static void
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2005-10-06 18:27:59 +00:00
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vx_init(void *xsc)
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1996-11-04 22:17:20 +00:00
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{
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2004-08-18 16:56:54 +00:00
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struct vx_softc *sc = (struct vx_softc *)xsc;
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2005-10-06 18:27:59 +00:00
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VX_LOCK(sc);
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vx_init_locked(sc);
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VX_UNLOCK(sc);
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}
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static void
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vx_init_locked(struct vx_softc *sc)
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{
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struct ifnet *ifp = sc->vx_ifp;
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2004-08-18 16:56:54 +00:00
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int i;
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1996-11-04 22:17:20 +00:00
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2005-10-06 18:27:59 +00:00
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VX_LOCK_ASSERT(sc);
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2004-08-18 16:56:54 +00:00
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VX_BUSY_WAIT;
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1996-11-04 22:17:20 +00:00
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2004-08-18 16:56:54 +00:00
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GO_WINDOW(2);
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1996-11-04 22:17:20 +00:00
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2004-08-18 16:56:54 +00:00
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for (i = 0; i < 6; i++) /* Reload the ether_addr. */
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2005-11-11 16:04:59 +00:00
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CSR_WRITE_1(sc, VX_W2_ADDR_0 + i, IF_LLADDR(sc->vx_ifp)[i]);
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1996-11-04 22:17:20 +00:00
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2004-08-18 16:56:54 +00:00
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CSR_WRITE_2(sc, VX_COMMAND, RX_RESET);
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VX_BUSY_WAIT;
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CSR_WRITE_2(sc, VX_COMMAND, TX_RESET);
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VX_BUSY_WAIT;
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1996-11-04 22:17:20 +00:00
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2004-08-18 16:56:54 +00:00
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GO_WINDOW(1); /* Window 1 is operating window */
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for (i = 0; i < 31; i++)
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CSR_READ_1(sc, VX_W1_TX_STATUS);
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1996-11-04 22:17:20 +00:00
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2004-08-18 16:56:54 +00:00
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CSR_WRITE_2(sc, VX_COMMAND, SET_RD_0_MASK | S_CARD_FAILURE |
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S_RX_COMPLETE | S_TX_COMPLETE | S_TX_AVAIL);
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CSR_WRITE_2(sc, VX_COMMAND, SET_INTR_MASK | S_CARD_FAILURE |
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S_RX_COMPLETE | S_TX_COMPLETE | S_TX_AVAIL);
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1996-11-04 22:17:20 +00:00
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2004-08-18 16:56:54 +00:00
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/*
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* Attempt to get rid of any stray interrupts that occured during
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* configuration. On the i386 this isn't possible because one may
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* already be queued. However, a single stray interrupt is
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* unimportant.
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*/
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CSR_WRITE_2(sc, VX_COMMAND, ACK_INTR | 0xff);
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1996-11-04 22:17:20 +00:00
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2005-10-06 18:27:59 +00:00
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vx_setfilter(sc);
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vx_setlink(sc);
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1996-11-04 22:17:20 +00:00
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2004-08-18 16:56:54 +00:00
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CSR_WRITE_2(sc, VX_COMMAND, RX_ENABLE);
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CSR_WRITE_2(sc, VX_COMMAND, TX_ENABLE);
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1996-11-04 22:17:20 +00:00
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2005-10-06 18:27:59 +00:00
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vx_mbuf_fill(sc);
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1996-11-04 22:17:20 +00:00
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2004-08-18 16:56:54 +00:00
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/* Interface is now `running', with no output active. */
|
2005-08-09 10:20:02 +00:00
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ifp->if_drv_flags |= IFF_DRV_RUNNING;
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ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
|
2009-11-19 22:06:40 +00:00
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callout_reset(&sc->vx_watchdog, hz, vx_watchdog, sc);
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1996-11-04 22:17:20 +00:00
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2004-08-18 16:56:54 +00:00
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/* Attempt to start output, if any. */
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2005-10-06 18:27:59 +00:00
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vx_start_locked(ifp);
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1996-11-04 22:17:20 +00:00
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}
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static void
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2005-10-06 18:27:59 +00:00
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vx_setfilter(struct vx_softc *sc)
|
1996-11-04 22:17:20 +00:00
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{
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2005-10-06 18:27:59 +00:00
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struct ifnet *ifp = sc->vx_ifp;
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2004-08-18 16:56:54 +00:00
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2005-10-06 18:27:59 +00:00
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|
|
VX_LOCK_ASSERT(sc);
|
2004-08-18 16:56:54 +00:00
|
|
|
GO_WINDOW(1); /* Window 1 is operating window */
|
|
|
|
CSR_WRITE_2(sc, VX_COMMAND, SET_RX_FILTER |
|
|
|
|
FIL_INDIVIDUAL | FIL_BRDCST | FIL_MULTICAST |
|
|
|
|
((ifp->if_flags & IFF_PROMISC) ? FIL_PROMISC : 0));
|
1996-11-04 22:17:20 +00:00
|
|
|
}
|
|
|
|
|
2004-08-18 16:56:54 +00:00
|
|
|
static void
|
2005-10-06 18:27:59 +00:00
|
|
|
vx_getlink(struct vx_softc *sc)
|
2004-08-18 16:56:54 +00:00
|
|
|
{
|
|
|
|
int n, k;
|
|
|
|
|
|
|
|
GO_WINDOW(3);
|
|
|
|
sc->vx_connectors = CSR_READ_2(sc, VX_W3_RESET_OPT) & 0x7f;
|
|
|
|
for (n = 0, k = 0; k < VX_CONNECTORS; k++) {
|
|
|
|
if (sc->vx_connectors & conn_tab[k].bit) {
|
|
|
|
if (n > 0)
|
|
|
|
printf("/");
|
|
|
|
printf("%s", conn_tab[k].name);
|
|
|
|
n++;
|
|
|
|
}
|
1996-12-02 18:44:31 +00:00
|
|
|
}
|
2004-08-18 16:56:54 +00:00
|
|
|
if (sc->vx_connectors == 0) {
|
2008-04-24 22:51:43 +00:00
|
|
|
printf("no connectors!\n");
|
2004-08-18 16:56:54 +00:00
|
|
|
return;
|
1996-12-02 18:44:31 +00:00
|
|
|
}
|
2004-08-18 16:56:54 +00:00
|
|
|
GO_WINDOW(3);
|
|
|
|
sc->vx_connector =
|
|
|
|
(CSR_READ_4(sc, VX_W3_INTERNAL_CFG) & INTERNAL_CONNECTOR_MASK)
|
|
|
|
>> INTERNAL_CONNECTOR_BITS;
|
|
|
|
if (sc->vx_connector & 0x10) {
|
|
|
|
sc->vx_connector &= 0x0f;
|
|
|
|
printf("[*%s*]", conn_tab[(int)sc->vx_connector].name);
|
2008-04-24 22:51:43 +00:00
|
|
|
printf(": disable 'auto select' with DOS util!\n");
|
1996-12-02 18:44:31 +00:00
|
|
|
} else {
|
2008-04-24 22:51:43 +00:00
|
|
|
printf("[*%s*]\n", conn_tab[(int)sc->vx_connector].name);
|
1996-12-02 18:44:31 +00:00
|
|
|
}
|
2004-08-18 16:56:54 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
static void
|
2005-10-06 18:27:59 +00:00
|
|
|
vx_setlink(struct vx_softc *sc)
|
2004-08-18 16:56:54 +00:00
|
|
|
{
|
2005-10-06 18:27:59 +00:00
|
|
|
struct ifnet *ifp = sc->vx_ifp;
|
2004-08-18 16:56:54 +00:00
|
|
|
int i, j, k;
|
|
|
|
char *reason, *warning;
|
|
|
|
static int prev_flags;
|
2005-02-03 02:35:28 +00:00
|
|
|
static signed char prev_conn = -1;
|
2004-08-18 16:56:54 +00:00
|
|
|
|
2005-10-06 18:27:59 +00:00
|
|
|
VX_LOCK_ASSERT(sc);
|
2004-08-18 16:56:54 +00:00
|
|
|
if (prev_conn == -1)
|
|
|
|
prev_conn = sc->vx_connector;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* S.B.
|
|
|
|
*
|
|
|
|
* Now behavior was slightly changed:
|
|
|
|
*
|
|
|
|
* if any of flags link[0-2] is used and its connector is
|
|
|
|
* physically present the following connectors are used:
|
|
|
|
*
|
|
|
|
* link0 - AUI * highest precedence
|
|
|
|
* link1 - BNC
|
|
|
|
* link2 - UTP * lowest precedence
|
|
|
|
*
|
|
|
|
* If none of them is specified then
|
|
|
|
* connector specified in the EEPROM is used
|
|
|
|
* (if present on card or UTP if not).
|
|
|
|
*/
|
|
|
|
i = sc->vx_connector; /* default in EEPROM */
|
|
|
|
reason = "default";
|
|
|
|
warning = 0;
|
|
|
|
|
|
|
|
if (ifp->if_flags & IFF_LINK0) {
|
|
|
|
if (sc->vx_connectors & conn_tab[CONNECTOR_AUI].bit) {
|
|
|
|
i = CONNECTOR_AUI;
|
|
|
|
reason = "link0";
|
|
|
|
} else {
|
|
|
|
warning = "aui not present! (link0)";
|
|
|
|
}
|
|
|
|
} else if (ifp->if_flags & IFF_LINK1) {
|
|
|
|
if (sc->vx_connectors & conn_tab[CONNECTOR_BNC].bit) {
|
|
|
|
i = CONNECTOR_BNC;
|
|
|
|
reason = "link1";
|
|
|
|
} else {
|
|
|
|
warning = "bnc not present! (link1)";
|
|
|
|
}
|
|
|
|
} else if (ifp->if_flags & IFF_LINK2) {
|
|
|
|
if (sc->vx_connectors & conn_tab[CONNECTOR_UTP].bit) {
|
|
|
|
i = CONNECTOR_UTP;
|
|
|
|
reason = "link2";
|
|
|
|
} else {
|
|
|
|
warning = "utp not present! (link2)";
|
|
|
|
}
|
|
|
|
} else if ((sc->vx_connectors & conn_tab[(int)sc->vx_connector].bit) == 0) {
|
|
|
|
warning = "strange connector type in EEPROM.";
|
|
|
|
reason = "forced";
|
|
|
|
i = CONNECTOR_UTP;
|
1996-12-02 18:44:31 +00:00
|
|
|
}
|
2004-08-18 16:56:54 +00:00
|
|
|
/* Avoid unnecessary message. */
|
|
|
|
k = (prev_flags ^ ifp->if_flags) & (IFF_LINK0 | IFF_LINK1 | IFF_LINK2);
|
|
|
|
if ((k != 0) || (prev_conn != i)) {
|
2005-10-06 18:27:59 +00:00
|
|
|
if (warning != NULL)
|
|
|
|
if_printf(ifp, "warning: %s\n", warning);
|
|
|
|
if_printf(ifp, "selected %s. (%s)\n", conn_tab[i].name, reason);
|
2004-08-18 16:56:54 +00:00
|
|
|
}
|
|
|
|
/* Set the selected connector. */
|
|
|
|
GO_WINDOW(3);
|
|
|
|
j = CSR_READ_4(sc, VX_W3_INTERNAL_CFG) & ~INTERNAL_CONNECTOR_MASK;
|
|
|
|
CSR_WRITE_4(sc, VX_W3_INTERNAL_CFG, j | (i << INTERNAL_CONNECTOR_BITS));
|
|
|
|
|
|
|
|
/* First, disable all. */
|
|
|
|
CSR_WRITE_2(sc, VX_COMMAND, STOP_TRANSCEIVER);
|
1996-12-02 18:44:31 +00:00
|
|
|
DELAY(800);
|
|
|
|
GO_WINDOW(4);
|
2004-08-18 16:56:54 +00:00
|
|
|
CSR_WRITE_2(sc, VX_W4_MEDIA_TYPE, 0);
|
|
|
|
|
|
|
|
/* Second, enable the selected one. */
|
|
|
|
switch (i) {
|
|
|
|
case CONNECTOR_UTP:
|
|
|
|
GO_WINDOW(4);
|
|
|
|
CSR_WRITE_2(sc, VX_W4_MEDIA_TYPE, ENABLE_UTP);
|
|
|
|
break;
|
|
|
|
case CONNECTOR_BNC:
|
|
|
|
CSR_WRITE_2(sc, VX_COMMAND, START_TRANSCEIVER);
|
|
|
|
DELAY(800);
|
|
|
|
break;
|
|
|
|
case CONNECTOR_TX:
|
|
|
|
case CONNECTOR_FX:
|
|
|
|
GO_WINDOW(4);
|
|
|
|
CSR_WRITE_2(sc, VX_W4_MEDIA_TYPE, LINKBEAT_ENABLE);
|
|
|
|
break;
|
|
|
|
default: /* AUI and MII fall here */
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
GO_WINDOW(1);
|
|
|
|
|
|
|
|
prev_flags = ifp->if_flags;
|
|
|
|
prev_conn = i;
|
1996-11-04 22:17:20 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
static void
|
2005-10-06 18:27:59 +00:00
|
|
|
vx_start(struct ifnet *ifp)
|
|
|
|
{
|
|
|
|
struct vx_softc *sc = ifp->if_softc;
|
|
|
|
|
|
|
|
VX_LOCK(sc);
|
|
|
|
vx_start_locked(ifp);
|
|
|
|
VX_UNLOCK(sc);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void
|
|
|
|
vx_start_locked(struct ifnet *ifp)
|
1996-11-04 22:17:20 +00:00
|
|
|
{
|
2005-10-06 18:27:59 +00:00
|
|
|
struct vx_softc *sc = ifp->if_softc;
|
|
|
|
struct mbuf *m;
|
|
|
|
int len, pad;
|
|
|
|
|
|
|
|
VX_LOCK_ASSERT(sc);
|
1996-11-04 22:17:20 +00:00
|
|
|
|
2004-08-18 16:56:54 +00:00
|
|
|
/* Don't transmit if interface is busy or not running */
|
2005-10-06 18:27:59 +00:00
|
|
|
if ((sc->vx_ifp->if_drv_flags &
|
2005-08-09 10:20:02 +00:00
|
|
|
(IFF_DRV_RUNNING | IFF_DRV_OACTIVE)) != IFF_DRV_RUNNING)
|
2004-08-18 16:56:54 +00:00
|
|
|
return;
|
1996-11-04 22:17:20 +00:00
|
|
|
|
|
|
|
startagain:
|
2004-08-18 16:56:54 +00:00
|
|
|
/* Sneak a peek at the next packet */
|
|
|
|
m = ifp->if_snd.ifq_head;
|
|
|
|
if (m == NULL) {
|
|
|
|
return;
|
1996-12-02 18:44:31 +00:00
|
|
|
}
|
2004-08-18 16:56:54 +00:00
|
|
|
/* We need to use m->m_pkthdr.len, so require the header */
|
|
|
|
M_ASSERTPKTHDR(m);
|
|
|
|
len = m->m_pkthdr.len;
|
1996-11-04 22:17:20 +00:00
|
|
|
|
2004-08-18 16:56:54 +00:00
|
|
|
pad = (4 - len) & 3;
|
1996-11-04 22:17:20 +00:00
|
|
|
|
2004-08-18 16:56:54 +00:00
|
|
|
/*
|
|
|
|
* The 3c509 automatically pads short packets to minimum ethernet
|
|
|
|
* length, but we drop packets that are too large. Perhaps we should
|
|
|
|
* truncate them instead?
|
|
|
|
*/
|
|
|
|
if (len + pad > ETHER_MAX_LEN) {
|
|
|
|
/* packet is obviously too large: toss it */
|
2014-09-19 03:51:26 +00:00
|
|
|
if_inc_counter(ifp, IFCOUNTER_OERRORS, 1);
|
2004-08-18 16:56:54 +00:00
|
|
|
IF_DEQUEUE(&ifp->if_snd, m);
|
|
|
|
m_freem(m);
|
|
|
|
goto readcheck;
|
|
|
|
}
|
|
|
|
VX_BUSY_WAIT;
|
|
|
|
if (CSR_READ_2(sc, VX_W1_FREE_TX) < len + pad + 4) {
|
|
|
|
CSR_WRITE_2(sc, VX_COMMAND,
|
|
|
|
SET_TX_AVAIL_THRESH | ((len + pad + 4) >> 2));
|
|
|
|
/* not enough room in FIFO - make sure */
|
|
|
|
if (CSR_READ_2(sc, VX_W1_FREE_TX) < len + pad + 4) {
|
2005-08-09 10:20:02 +00:00
|
|
|
ifp->if_drv_flags |= IFF_DRV_OACTIVE;
|
2009-11-19 22:06:40 +00:00
|
|
|
sc->vx_timer = 1;
|
2004-08-18 16:56:54 +00:00
|
|
|
return;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
CSR_WRITE_2(sc, VX_COMMAND, SET_TX_AVAIL_THRESH | (8188 >> 2));
|
|
|
|
IF_DEQUEUE(&ifp->if_snd, m);
|
|
|
|
if (m == NULL) /* not really needed */
|
|
|
|
return;
|
1996-11-04 22:17:20 +00:00
|
|
|
|
2004-08-18 16:56:54 +00:00
|
|
|
VX_BUSY_WAIT;
|
|
|
|
CSR_WRITE_2(sc, VX_COMMAND, SET_TX_START_THRESH |
|
2005-10-06 18:27:59 +00:00
|
|
|
((len / 4 + sc->vx_tx_start_thresh) >> 2));
|
1996-11-04 22:17:20 +00:00
|
|
|
|
2005-10-06 18:27:59 +00:00
|
|
|
BPF_MTAP(sc->vx_ifp, m);
|
1996-11-04 22:17:20 +00:00
|
|
|
|
2004-08-18 16:56:54 +00:00
|
|
|
/*
|
|
|
|
* Do the output at splhigh() so that an interrupt from another device
|
|
|
|
* won't cause a FIFO underrun.
|
2005-10-06 18:27:59 +00:00
|
|
|
*
|
|
|
|
* XXX: Can't enforce that anymore.
|
2004-08-18 16:56:54 +00:00
|
|
|
*/
|
|
|
|
|
|
|
|
CSR_WRITE_4(sc, VX_W1_TX_PIO_WR_1, len | TX_INDICATE);
|
|
|
|
|
|
|
|
while (m) {
|
|
|
|
if (m->m_len > 3)
|
2005-10-06 18:27:59 +00:00
|
|
|
bus_space_write_multi_4(sc->vx_bst, sc->vx_bsh,
|
2004-08-18 16:56:54 +00:00
|
|
|
VX_W1_TX_PIO_WR_1, (u_int32_t *)mtod(m, caddr_t),
|
|
|
|
m->m_len / 4);
|
|
|
|
if (m->m_len & 3)
|
2005-10-06 18:27:59 +00:00
|
|
|
bus_space_write_multi_1(sc->vx_bst, sc->vx_bsh,
|
2004-08-18 16:56:54 +00:00
|
|
|
VX_W1_TX_PIO_WR_1,
|
|
|
|
mtod(m, caddr_t) + (m->m_len & ~3), m->m_len & 3);
|
|
|
|
m = m_free(m);
|
|
|
|
}
|
|
|
|
while (pad--)
|
|
|
|
CSR_WRITE_1(sc, VX_W1_TX_PIO_WR_1, 0); /* Padding */
|
1996-11-04 22:17:20 +00:00
|
|
|
|
2014-09-19 03:51:26 +00:00
|
|
|
if_inc_counter(ifp, IFCOUNTER_OPACKETS, 1);
|
2009-11-19 22:06:40 +00:00
|
|
|
sc->vx_timer = 1;
|
1996-11-04 22:17:20 +00:00
|
|
|
|
|
|
|
readcheck:
|
2004-08-18 16:56:54 +00:00
|
|
|
if ((CSR_READ_2(sc, VX_W1_RX_STATUS) & ERR_INCOMPLETE) == 0) {
|
|
|
|
/* We received a complete packet. */
|
|
|
|
|
|
|
|
if ((CSR_READ_2(sc, VX_STATUS) & S_INTR_LATCH) == 0) {
|
|
|
|
/*
|
|
|
|
* No interrupt, read the packet and continue
|
|
|
|
* Is this supposed to happen? Is my motherboard
|
|
|
|
* completely busted?
|
|
|
|
*/
|
2005-10-06 18:27:59 +00:00
|
|
|
vx_read(sc);
|
2004-08-18 16:56:54 +00:00
|
|
|
} else
|
|
|
|
/*
|
|
|
|
* Got an interrupt, return so that it gets
|
|
|
|
* serviced.
|
|
|
|
*/
|
|
|
|
return;
|
|
|
|
} else {
|
|
|
|
/* Check if we are stuck and reset [see XXX comment] */
|
2005-10-06 18:27:59 +00:00
|
|
|
if (vx_status(sc)) {
|
2004-08-18 16:56:54 +00:00
|
|
|
if (ifp->if_flags & IFF_DEBUG)
|
|
|
|
if_printf(ifp, "adapter reset\n");
|
2005-10-06 18:27:59 +00:00
|
|
|
vx_reset(sc);
|
2004-08-18 16:56:54 +00:00
|
|
|
}
|
1996-11-04 22:17:20 +00:00
|
|
|
}
|
|
|
|
|
2004-08-18 16:56:54 +00:00
|
|
|
goto startagain;
|
1996-11-04 22:17:20 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* XXX: The 3c509 card can get in a mode where both the fifo status bit
|
|
|
|
* FIFOS_RX_OVERRUN and the status bit ERR_INCOMPLETE are set
|
|
|
|
* We detect this situation and we reset the adapter.
|
|
|
|
* It happens at times when there is a lot of broadcast traffic
|
|
|
|
* on the cable (once in a blue moon).
|
|
|
|
*/
|
|
|
|
static int
|
2005-10-06 18:27:59 +00:00
|
|
|
vx_status(struct vx_softc *sc)
|
1996-11-04 22:17:20 +00:00
|
|
|
{
|
2005-10-06 18:27:59 +00:00
|
|
|
struct ifnet *ifp;
|
2004-08-18 16:56:54 +00:00
|
|
|
int fifost;
|
1996-11-04 22:17:20 +00:00
|
|
|
|
2005-10-06 18:27:59 +00:00
|
|
|
VX_LOCK_ASSERT(sc);
|
|
|
|
|
2004-08-18 16:56:54 +00:00
|
|
|
/*
|
|
|
|
* Check the FIFO status and act accordingly
|
|
|
|
*/
|
|
|
|
GO_WINDOW(4);
|
|
|
|
fifost = CSR_READ_2(sc, VX_W4_FIFO_DIAG);
|
|
|
|
GO_WINDOW(1);
|
|
|
|
|
2005-10-06 18:27:59 +00:00
|
|
|
ifp = sc->vx_ifp;
|
2004-08-18 16:56:54 +00:00
|
|
|
if (fifost & FIFOS_RX_UNDERRUN) {
|
2005-10-06 18:27:59 +00:00
|
|
|
if (ifp->if_flags & IFF_DEBUG)
|
|
|
|
if_printf(ifp, "RX underrun\n");
|
|
|
|
vx_reset(sc);
|
2004-08-18 16:56:54 +00:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
if (fifost & FIFOS_RX_STATUS_OVERRUN) {
|
2005-10-06 18:27:59 +00:00
|
|
|
if (ifp->if_flags & IFF_DEBUG)
|
|
|
|
if_printf(ifp, "RX Status overrun\n");
|
2004-08-18 16:56:54 +00:00
|
|
|
return 1;
|
|
|
|
}
|
|
|
|
if (fifost & FIFOS_RX_OVERRUN) {
|
2005-10-06 18:27:59 +00:00
|
|
|
if (ifp->if_flags & IFF_DEBUG)
|
|
|
|
if_printf(ifp, "RX overrun\n");
|
2004-08-18 16:56:54 +00:00
|
|
|
return 1;
|
|
|
|
}
|
|
|
|
if (fifost & FIFOS_TX_OVERRUN) {
|
2005-10-06 18:27:59 +00:00
|
|
|
if (ifp->if_flags & IFF_DEBUG)
|
|
|
|
if_printf(ifp, "TX overrun\n");
|
|
|
|
vx_reset(sc);
|
2004-08-18 16:56:54 +00:00
|
|
|
return 0;
|
|
|
|
}
|
1996-11-04 22:17:20 +00:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2004-08-18 16:56:54 +00:00
|
|
|
static void
|
2005-10-06 18:27:59 +00:00
|
|
|
vx_txstat(struct vx_softc *sc)
|
1996-11-04 22:17:20 +00:00
|
|
|
{
|
2005-10-06 18:27:59 +00:00
|
|
|
struct ifnet *ifp;
|
2004-08-18 16:56:54 +00:00
|
|
|
int i;
|
|
|
|
|
2005-10-06 18:27:59 +00:00
|
|
|
VX_LOCK_ASSERT(sc);
|
|
|
|
|
2004-08-18 16:56:54 +00:00
|
|
|
/*
|
|
|
|
* We need to read+write TX_STATUS until we get a 0 status
|
|
|
|
* in order to turn off the interrupt flag.
|
|
|
|
*/
|
2005-10-06 18:27:59 +00:00
|
|
|
ifp = sc->vx_ifp;
|
2004-08-18 16:56:54 +00:00
|
|
|
while ((i = CSR_READ_1(sc, VX_W1_TX_STATUS)) & TXS_COMPLETE) {
|
|
|
|
CSR_WRITE_1(sc, VX_W1_TX_STATUS, 0x0);
|
|
|
|
|
|
|
|
if (i & TXS_JABBER) {
|
2014-09-19 03:51:26 +00:00
|
|
|
if_inc_counter(ifp, IFCOUNTER_OERRORS, 1);
|
2005-10-06 18:27:59 +00:00
|
|
|
if (ifp->if_flags & IFF_DEBUG)
|
|
|
|
if_printf(ifp, "jabber (%x)\n", i);
|
|
|
|
vx_reset(sc);
|
2004-08-18 16:56:54 +00:00
|
|
|
} else if (i & TXS_UNDERRUN) {
|
2014-09-19 03:51:26 +00:00
|
|
|
if_inc_counter(ifp, IFCOUNTER_OERRORS, 1);
|
2005-10-06 18:27:59 +00:00
|
|
|
if (ifp->if_flags & IFF_DEBUG)
|
|
|
|
if_printf(ifp, "fifo underrun (%x) @%d\n", i,
|
|
|
|
sc->vx_tx_start_thresh);
|
|
|
|
if (sc->vx_tx_succ_ok < 100)
|
|
|
|
sc->vx_tx_start_thresh =
|
|
|
|
min(ETHER_MAX_LEN,
|
|
|
|
sc->vx_tx_start_thresh + 20);
|
|
|
|
sc->vx_tx_succ_ok = 0;
|
|
|
|
vx_reset(sc);
|
2004-08-18 16:56:54 +00:00
|
|
|
} else if (i & TXS_MAX_COLLISION) {
|
2014-09-19 03:51:26 +00:00
|
|
|
if_inc_counter(ifp, IFCOUNTER_COLLISIONS, 1);
|
2004-08-18 16:56:54 +00:00
|
|
|
CSR_WRITE_2(sc, VX_COMMAND, TX_ENABLE);
|
2005-10-06 18:27:59 +00:00
|
|
|
ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
|
2004-08-18 16:56:54 +00:00
|
|
|
} else
|
2005-10-06 18:27:59 +00:00
|
|
|
sc->vx_tx_succ_ok = (sc->vx_tx_succ_ok + 1) & 127;
|
2004-08-18 16:56:54 +00:00
|
|
|
}
|
1996-11-04 22:17:20 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
void
|
2005-10-06 18:27:59 +00:00
|
|
|
vx_intr(void *voidsc)
|
1996-11-04 22:17:20 +00:00
|
|
|
{
|
2005-10-06 18:27:59 +00:00
|
|
|
short status;
|
2004-08-18 16:56:54 +00:00
|
|
|
struct vx_softc *sc = voidsc;
|
2005-10-06 18:27:59 +00:00
|
|
|
struct ifnet *ifp = sc->vx_ifp;
|
2004-08-18 16:56:54 +00:00
|
|
|
|
2005-10-06 18:27:59 +00:00
|
|
|
VX_LOCK(sc);
|
2004-08-18 16:56:54 +00:00
|
|
|
for (;;) {
|
|
|
|
CSR_WRITE_2(sc, VX_COMMAND, C_INTR_LATCH);
|
|
|
|
|
|
|
|
status = CSR_READ_2(sc, VX_STATUS);
|
|
|
|
|
|
|
|
if ((status & (S_TX_COMPLETE | S_TX_AVAIL |
|
|
|
|
S_RX_COMPLETE | S_CARD_FAILURE)) == 0)
|
|
|
|
break;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Acknowledge any interrupts. It's important that we do this
|
|
|
|
* first, since there would otherwise be a race condition.
|
|
|
|
* Due to the i386 interrupt queueing, we may get spurious
|
|
|
|
* interrupts occasionally.
|
|
|
|
*/
|
|
|
|
CSR_WRITE_2(sc, VX_COMMAND, ACK_INTR | status);
|
|
|
|
|
|
|
|
if (status & S_RX_COMPLETE)
|
2005-10-06 18:27:59 +00:00
|
|
|
vx_read(sc);
|
2004-08-18 16:56:54 +00:00
|
|
|
if (status & S_TX_AVAIL) {
|
2009-11-19 22:06:40 +00:00
|
|
|
sc->vx_timer = 0;
|
2005-10-06 18:27:59 +00:00
|
|
|
sc->vx_ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
|
|
|
|
vx_start_locked(sc->vx_ifp);
|
2004-08-18 16:56:54 +00:00
|
|
|
}
|
|
|
|
if (status & S_CARD_FAILURE) {
|
2005-10-06 18:27:59 +00:00
|
|
|
if_printf(ifp, "adapter failure (%x)\n", status);
|
2009-11-19 22:06:40 +00:00
|
|
|
sc->vx_timer = 0;
|
2005-10-06 18:27:59 +00:00
|
|
|
vx_reset(sc);
|
|
|
|
break;
|
2004-08-18 16:56:54 +00:00
|
|
|
}
|
|
|
|
if (status & S_TX_COMPLETE) {
|
2009-11-19 22:06:40 +00:00
|
|
|
sc->vx_timer = 0;
|
2005-10-06 18:27:59 +00:00
|
|
|
vx_txstat(sc);
|
|
|
|
vx_start_locked(ifp);
|
2004-08-18 16:56:54 +00:00
|
|
|
}
|
1996-11-04 22:17:20 +00:00
|
|
|
}
|
2005-10-06 18:27:59 +00:00
|
|
|
VX_UNLOCK(sc);
|
1996-11-04 22:17:20 +00:00
|
|
|
|
2004-08-18 16:56:54 +00:00
|
|
|
/* no more interrupts */
|
|
|
|
return;
|
1996-11-04 22:17:20 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
static void
|
2005-10-06 18:27:59 +00:00
|
|
|
vx_read(struct vx_softc *sc)
|
1996-11-04 22:17:20 +00:00
|
|
|
{
|
2005-10-06 18:27:59 +00:00
|
|
|
struct ifnet *ifp = sc->vx_ifp;
|
2004-08-18 16:56:54 +00:00
|
|
|
struct mbuf *m;
|
|
|
|
struct ether_header *eh;
|
|
|
|
u_int len;
|
1996-11-04 22:17:20 +00:00
|
|
|
|
2005-10-06 18:27:59 +00:00
|
|
|
VX_LOCK_ASSERT(sc);
|
2004-08-18 16:56:54 +00:00
|
|
|
len = CSR_READ_2(sc, VX_W1_RX_STATUS);
|
1996-11-04 22:17:20 +00:00
|
|
|
again:
|
|
|
|
|
2004-08-18 16:56:54 +00:00
|
|
|
if (ifp->if_flags & IFF_DEBUG) {
|
|
|
|
int err = len & ERR_MASK;
|
|
|
|
char *s = NULL;
|
|
|
|
|
|
|
|
if (len & ERR_INCOMPLETE)
|
|
|
|
s = "incomplete packet";
|
|
|
|
else if (err == ERR_OVERRUN)
|
|
|
|
s = "packet overrun";
|
|
|
|
else if (err == ERR_RUNT)
|
|
|
|
s = "runt packet";
|
|
|
|
else if (err == ERR_ALIGNMENT)
|
|
|
|
s = "bad alignment";
|
|
|
|
else if (err == ERR_CRC)
|
|
|
|
s = "bad crc";
|
|
|
|
else if (err == ERR_OVERSIZE)
|
|
|
|
s = "oversized packet";
|
|
|
|
else if (err == ERR_DRIBBLE)
|
|
|
|
s = "dribble bits";
|
|
|
|
|
|
|
|
if (s)
|
2005-10-06 18:27:59 +00:00
|
|
|
if_printf(ifp, "%s\n", s);
|
2004-08-18 16:56:54 +00:00
|
|
|
}
|
1996-11-04 22:17:20 +00:00
|
|
|
if (len & ERR_INCOMPLETE)
|
2004-08-18 16:56:54 +00:00
|
|
|
return;
|
1996-11-04 22:17:20 +00:00
|
|
|
|
2004-08-18 16:56:54 +00:00
|
|
|
if (len & ERR_RX) {
|
2014-09-19 03:51:26 +00:00
|
|
|
if_inc_counter(ifp, IFCOUNTER_IERRORS, 1);
|
2004-08-18 16:56:54 +00:00
|
|
|
goto abort;
|
|
|
|
}
|
|
|
|
len &= RX_BYTES_MASK; /* Lower 11 bits = RX bytes. */
|
2000-12-07 23:30:51 +00:00
|
|
|
|
2004-08-18 16:56:54 +00:00
|
|
|
/* Pull packet off interface. */
|
2005-10-06 18:27:59 +00:00
|
|
|
m = vx_get(sc, len);
|
2004-08-18 16:56:54 +00:00
|
|
|
if (m == 0) {
|
2014-09-19 03:51:26 +00:00
|
|
|
if_inc_counter(ifp, IFCOUNTER_IERRORS, 1);
|
2000-12-07 23:30:51 +00:00
|
|
|
goto abort;
|
|
|
|
}
|
2014-09-19 03:51:26 +00:00
|
|
|
if_inc_counter(ifp, IFCOUNTER_IPACKETS, 1);
|
2004-08-18 16:56:54 +00:00
|
|
|
|
|
|
|
{
|
|
|
|
struct mbuf *m0;
|
|
|
|
|
2005-10-06 18:27:59 +00:00
|
|
|
m0 = m_devget(mtod(m, char *), m->m_pkthdr.len, ETHER_ALIGN,
|
|
|
|
ifp, NULL);
|
2004-08-18 16:56:54 +00:00
|
|
|
if (m0 == NULL) {
|
2014-09-19 03:51:26 +00:00
|
|
|
if_inc_counter(ifp, IFCOUNTER_IERRORS, 1);
|
2004-08-18 16:56:54 +00:00
|
|
|
goto abort;
|
|
|
|
}
|
|
|
|
m_freem(m);
|
|
|
|
m = m0;
|
|
|
|
}
|
2000-12-07 23:30:51 +00:00
|
|
|
|
2004-08-18 16:56:54 +00:00
|
|
|
/* We assume the header fit entirely in one mbuf. */
|
|
|
|
eh = mtod(m, struct ether_header *);
|
1996-11-04 22:17:20 +00:00
|
|
|
|
2004-08-18 16:56:54 +00:00
|
|
|
/*
|
|
|
|
* XXX: Some cards seem to be in promiscous mode all the time.
|
|
|
|
* we need to make sure we only get our own stuff always.
|
|
|
|
* bleah!
|
|
|
|
*/
|
1997-01-28 11:21:21 +00:00
|
|
|
|
2005-07-22 11:27:07 +00:00
|
|
|
if (!(ifp->if_flags & IFF_PROMISC)
|
|
|
|
&& (eh->ether_dhost[0] & 1) == 0 /* !mcast and !bcast */
|
2005-11-11 16:04:59 +00:00
|
|
|
&& bcmp(eh->ether_dhost, IF_LLADDR(sc->vx_ifp),
|
2005-10-06 18:27:59 +00:00
|
|
|
ETHER_ADDR_LEN) != 0) {
|
2004-08-18 16:56:54 +00:00
|
|
|
m_freem(m);
|
|
|
|
return;
|
1996-11-04 22:17:20 +00:00
|
|
|
}
|
2005-10-06 18:27:59 +00:00
|
|
|
VX_UNLOCK(sc);
|
|
|
|
(*ifp->if_input)(ifp, m);
|
|
|
|
VX_LOCK(sc);
|
1996-11-04 22:17:20 +00:00
|
|
|
|
2004-08-18 16:56:54 +00:00
|
|
|
/*
|
|
|
|
* In periods of high traffic we can actually receive enough
|
|
|
|
* packets so that the fifo overrun bit will be set at this point,
|
|
|
|
* even though we just read a packet. In this case we
|
|
|
|
* are not going to receive any more interrupts. We check for
|
|
|
|
* this condition and read again until the fifo is not full.
|
2005-10-06 18:27:59 +00:00
|
|
|
* We could simplify this test by not using vx_status(), but
|
2004-08-18 16:56:54 +00:00
|
|
|
* rechecking the RX_STATUS register directly. This test could
|
|
|
|
* result in unnecessary looping in cases where there is a new
|
|
|
|
* packet but the fifo is not full, but it will not fix the
|
|
|
|
* stuck behavior.
|
|
|
|
*
|
|
|
|
* Even with this improvement, we still get packet overrun errors
|
|
|
|
* which are hurting performance. Maybe when I get some more time
|
2005-10-06 18:27:59 +00:00
|
|
|
* I'll modify vx_read() so that it can handle RX_EARLY interrupts.
|
2004-08-18 16:56:54 +00:00
|
|
|
*/
|
2005-10-06 18:27:59 +00:00
|
|
|
if (vx_status(sc)) {
|
2004-08-18 16:56:54 +00:00
|
|
|
len = CSR_READ_2(sc, VX_W1_RX_STATUS);
|
|
|
|
/* Check if we are stuck and reset [see XXX comment] */
|
|
|
|
if (len & ERR_INCOMPLETE) {
|
|
|
|
if (ifp->if_flags & IFF_DEBUG)
|
2005-10-06 18:27:59 +00:00
|
|
|
if_printf(ifp, "adapter reset\n");
|
|
|
|
vx_reset(sc);
|
2004-08-18 16:56:54 +00:00
|
|
|
return;
|
|
|
|
}
|
|
|
|
goto again;
|
|
|
|
}
|
|
|
|
return;
|
1996-11-04 22:17:20 +00:00
|
|
|
|
|
|
|
abort:
|
2004-08-18 16:56:54 +00:00
|
|
|
CSR_WRITE_2(sc, VX_COMMAND, RX_DISCARD_TOP_PACK);
|
1996-11-04 22:17:20 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
static struct mbuf *
|
2005-10-06 18:27:59 +00:00
|
|
|
vx_get(struct vx_softc *sc, u_int totlen)
|
1996-11-04 22:17:20 +00:00
|
|
|
{
|
2005-10-06 18:27:59 +00:00
|
|
|
struct ifnet *ifp = sc->vx_ifp;
|
2004-08-18 16:56:54 +00:00
|
|
|
struct mbuf *top, **mp, *m;
|
|
|
|
int len;
|
|
|
|
|
2005-10-06 18:27:59 +00:00
|
|
|
VX_LOCK_ASSERT(sc);
|
|
|
|
m = sc->vx_mb[sc->vx_next_mb];
|
|
|
|
sc->vx_mb[sc->vx_next_mb] = NULL;
|
|
|
|
if (m == NULL) {
|
2012-12-04 09:32:43 +00:00
|
|
|
MGETHDR(m, M_NOWAIT, MT_DATA);
|
2005-10-06 18:27:59 +00:00
|
|
|
if (m == NULL)
|
|
|
|
return NULL;
|
2004-08-18 16:56:54 +00:00
|
|
|
} else {
|
|
|
|
/* If the queue is no longer full, refill. */
|
2005-10-06 18:27:59 +00:00
|
|
|
if (sc->vx_last_mb == sc->vx_next_mb &&
|
|
|
|
sc->vx_buffill_pending == 0) {
|
|
|
|
callout_reset(&sc->vx_callout, hz / 100, vx_mbuf_fill,
|
|
|
|
sc);
|
|
|
|
sc->vx_buffill_pending = 1;
|
2004-08-18 16:56:54 +00:00
|
|
|
}
|
|
|
|
/* Convert one of our saved mbuf's. */
|
2005-10-06 18:27:59 +00:00
|
|
|
sc->vx_next_mb = (sc->vx_next_mb + 1) % MAX_MBS;
|
2004-08-18 16:56:54 +00:00
|
|
|
m->m_data = m->m_pktdat;
|
|
|
|
m->m_flags = M_PKTHDR;
|
|
|
|
bzero(&m->m_pkthdr, sizeof(m->m_pkthdr));
|
1997-09-21 21:33:01 +00:00
|
|
|
}
|
2004-08-18 16:56:54 +00:00
|
|
|
m->m_pkthdr.rcvif = ifp;
|
|
|
|
m->m_pkthdr.len = totlen;
|
|
|
|
len = MHLEN;
|
2005-10-06 18:27:59 +00:00
|
|
|
top = NULL;
|
2004-08-18 16:56:54 +00:00
|
|
|
mp = ⊤
|
|
|
|
|
|
|
|
/*
|
|
|
|
* We read the packet at splhigh() so that an interrupt from another
|
|
|
|
* device doesn't cause the card's buffer to overflow while we're
|
|
|
|
* reading it. We may still lose packets at other times.
|
2005-10-06 18:27:59 +00:00
|
|
|
*
|
|
|
|
* XXX: Can't enforce this anymore.
|
2004-08-18 16:56:54 +00:00
|
|
|
*/
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Since we don't set allowLargePackets bit in MacControl register,
|
|
|
|
* we can assume that totlen <= 1500bytes.
|
|
|
|
* The while loop will be performed iff we have a packet with
|
|
|
|
* MLEN < m_len < MINCLSIZE.
|
|
|
|
*/
|
|
|
|
while (totlen > 0) {
|
|
|
|
if (top) {
|
2005-10-06 18:27:59 +00:00
|
|
|
m = sc->vx_mb[sc->vx_next_mb];
|
|
|
|
sc->vx_mb[sc->vx_next_mb] = NULL;
|
|
|
|
if (m == NULL) {
|
2012-12-04 09:32:43 +00:00
|
|
|
MGET(m, M_NOWAIT, MT_DATA);
|
2005-10-06 18:27:59 +00:00
|
|
|
if (m == NULL) {
|
2004-08-18 16:56:54 +00:00
|
|
|
m_freem(top);
|
2005-10-06 18:27:59 +00:00
|
|
|
return NULL;
|
2004-08-18 16:56:54 +00:00
|
|
|
}
|
|
|
|
} else {
|
2005-10-06 18:27:59 +00:00
|
|
|
sc->vx_next_mb = (sc->vx_next_mb + 1) % MAX_MBS;
|
2004-08-18 16:56:54 +00:00
|
|
|
}
|
|
|
|
len = MLEN;
|
|
|
|
}
|
|
|
|
if (totlen >= MINCLSIZE) {
|
2015-01-06 12:59:37 +00:00
|
|
|
if (MCLGET(m, M_NOWAIT))
|
2004-08-18 16:56:54 +00:00
|
|
|
len = MCLBYTES;
|
|
|
|
}
|
|
|
|
len = min(totlen, len);
|
|
|
|
if (len > 3)
|
2005-10-06 18:27:59 +00:00
|
|
|
bus_space_read_multi_4(sc->vx_bst, sc->vx_bsh,
|
2004-08-18 16:56:54 +00:00
|
|
|
VX_W1_RX_PIO_RD_1, mtod(m, u_int32_t *), len / 4);
|
|
|
|
if (len & 3) {
|
2005-10-06 18:27:59 +00:00
|
|
|
bus_space_read_multi_1(sc->vx_bst, sc->vx_bsh,
|
2004-08-18 16:56:54 +00:00
|
|
|
VX_W1_RX_PIO_RD_1, mtod(m, u_int8_t *) + (len & ~3),
|
|
|
|
len & 3);
|
|
|
|
}
|
|
|
|
m->m_len = len;
|
|
|
|
totlen -= len;
|
|
|
|
*mp = m;
|
|
|
|
mp = &m->m_next;
|
1997-10-01 05:54:58 +00:00
|
|
|
}
|
1996-11-04 22:17:20 +00:00
|
|
|
|
2004-08-18 16:56:54 +00:00
|
|
|
CSR_WRITE_2(sc, VX_COMMAND, RX_DISCARD_TOP_PACK);
|
1996-11-04 22:17:20 +00:00
|
|
|
|
2004-08-18 16:56:54 +00:00
|
|
|
return top;
|
1996-11-04 22:17:20 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
static int
|
2005-10-06 18:27:59 +00:00
|
|
|
vx_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data)
|
1996-11-04 22:17:20 +00:00
|
|
|
{
|
2004-08-18 16:56:54 +00:00
|
|
|
struct vx_softc *sc = ifp->if_softc;
|
|
|
|
struct ifreq *ifr = (struct ifreq *) data;
|
2005-10-06 18:27:59 +00:00
|
|
|
int error = 0;
|
2004-08-18 16:56:54 +00:00
|
|
|
|
|
|
|
switch (cmd) {
|
|
|
|
case SIOCSIFFLAGS:
|
2005-10-06 18:27:59 +00:00
|
|
|
VX_LOCK(sc);
|
2004-08-18 16:56:54 +00:00
|
|
|
if ((ifp->if_flags & IFF_UP) == 0 &&
|
2005-08-09 10:20:02 +00:00
|
|
|
(ifp->if_drv_flags & IFF_DRV_RUNNING) != 0) {
|
2004-08-18 16:56:54 +00:00
|
|
|
/*
|
|
|
|
* If interface is marked up and it is stopped, then
|
|
|
|
* start it.
|
|
|
|
*/
|
2005-10-06 18:27:59 +00:00
|
|
|
vx_stop(sc);
|
2005-08-09 10:20:02 +00:00
|
|
|
ifp->if_drv_flags &= ~IFF_DRV_RUNNING;
|
2004-08-18 16:56:54 +00:00
|
|
|
} else if ((ifp->if_flags & IFF_UP) != 0 &&
|
2005-08-09 10:20:02 +00:00
|
|
|
(ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) {
|
2004-08-18 16:56:54 +00:00
|
|
|
/*
|
|
|
|
* If interface is marked up and it is stopped, then
|
|
|
|
* start it.
|
|
|
|
*/
|
2005-10-06 18:27:59 +00:00
|
|
|
vx_init_locked(sc);
|
2004-08-18 16:56:54 +00:00
|
|
|
} else {
|
|
|
|
/*
|
|
|
|
* deal with flags changes:
|
|
|
|
* IFF_MULTICAST, IFF_PROMISC,
|
|
|
|
* IFF_LINK0, IFF_LINK1,
|
|
|
|
*/
|
2005-10-06 18:27:59 +00:00
|
|
|
vx_setfilter(sc);
|
|
|
|
vx_setlink(sc);
|
2004-08-18 16:56:54 +00:00
|
|
|
}
|
2005-10-06 18:27:59 +00:00
|
|
|
VX_UNLOCK(sc);
|
2004-08-18 16:56:54 +00:00
|
|
|
break;
|
|
|
|
|
|
|
|
case SIOCSIFMTU:
|
|
|
|
/*
|
|
|
|
* Set the interface MTU.
|
|
|
|
*/
|
2005-10-06 18:27:59 +00:00
|
|
|
VX_LOCK(sc);
|
2004-08-18 16:56:54 +00:00
|
|
|
if (ifr->ifr_mtu > ETHERMTU) {
|
|
|
|
error = EINVAL;
|
|
|
|
} else {
|
|
|
|
ifp->if_mtu = ifr->ifr_mtu;
|
|
|
|
}
|
2005-10-06 18:27:59 +00:00
|
|
|
VX_UNLOCK(sc);
|
2004-08-18 16:56:54 +00:00
|
|
|
break;
|
|
|
|
|
|
|
|
case SIOCADDMULTI:
|
|
|
|
case SIOCDELMULTI:
|
|
|
|
/*
|
|
|
|
* Multicast list has changed; set the hardware filter
|
|
|
|
* accordingly.
|
|
|
|
*/
|
2005-10-06 18:27:59 +00:00
|
|
|
VX_LOCK(sc);
|
|
|
|
vx_reset(sc);
|
|
|
|
VX_UNLOCK(sc);
|
2004-08-18 16:56:54 +00:00
|
|
|
error = 0;
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
|
|
default:
|
|
|
|
error = ether_ioctl(ifp, cmd, data);
|
|
|
|
break;
|
|
|
|
}
|
1996-11-04 22:17:20 +00:00
|
|
|
|
2004-08-18 16:56:54 +00:00
|
|
|
return (error);
|
1996-11-04 22:17:20 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
static void
|
2005-10-06 18:27:59 +00:00
|
|
|
vx_reset(struct vx_softc *sc)
|
1996-11-04 22:17:20 +00:00
|
|
|
{
|
|
|
|
|
2005-10-06 18:27:59 +00:00
|
|
|
VX_LOCK_ASSERT(sc);
|
|
|
|
vx_stop(sc);
|
|
|
|
vx_init_locked(sc);
|
1996-11-04 22:17:20 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
static void
|
2009-11-19 22:06:40 +00:00
|
|
|
vx_watchdog(void *arg)
|
1996-11-04 22:17:20 +00:00
|
|
|
{
|
2009-11-19 22:06:40 +00:00
|
|
|
struct vx_softc *sc;
|
|
|
|
struct ifnet *ifp;
|
1996-11-04 22:17:20 +00:00
|
|
|
|
2009-11-19 22:06:40 +00:00
|
|
|
sc = arg;
|
|
|
|
VX_LOCK_ASSERT(sc);
|
|
|
|
callout_reset(&sc->vx_watchdog, hz, vx_watchdog, sc);
|
|
|
|
if (sc->vx_timer == 0 || --sc->vx_timer > 0)
|
|
|
|
return;
|
|
|
|
|
|
|
|
ifp = sc->vx_ifp;
|
2004-08-18 16:56:54 +00:00
|
|
|
if (ifp->if_flags & IFF_DEBUG)
|
|
|
|
if_printf(ifp, "device timeout\n");
|
2005-08-09 10:20:02 +00:00
|
|
|
ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
|
2005-10-06 18:27:59 +00:00
|
|
|
vx_start_locked(ifp);
|
|
|
|
vx_intr(sc);
|
1996-11-04 22:17:20 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
void
|
2005-10-06 18:27:59 +00:00
|
|
|
vx_stop(struct vx_softc *sc)
|
1996-11-04 22:17:20 +00:00
|
|
|
{
|
2004-08-18 16:56:54 +00:00
|
|
|
|
2005-10-06 18:27:59 +00:00
|
|
|
VX_LOCK_ASSERT(sc);
|
2009-11-19 22:06:40 +00:00
|
|
|
sc->vx_timer = 0;
|
|
|
|
callout_stop(&sc->vx_watchdog);
|
2004-08-18 16:56:54 +00:00
|
|
|
|
|
|
|
CSR_WRITE_2(sc, VX_COMMAND, RX_DISABLE);
|
|
|
|
CSR_WRITE_2(sc, VX_COMMAND, RX_DISCARD_TOP_PACK);
|
|
|
|
VX_BUSY_WAIT;
|
|
|
|
CSR_WRITE_2(sc, VX_COMMAND, TX_DISABLE);
|
|
|
|
CSR_WRITE_2(sc, VX_COMMAND, STOP_TRANSCEIVER);
|
|
|
|
DELAY(800);
|
|
|
|
CSR_WRITE_2(sc, VX_COMMAND, RX_RESET);
|
|
|
|
VX_BUSY_WAIT;
|
|
|
|
CSR_WRITE_2(sc, VX_COMMAND, TX_RESET);
|
|
|
|
VX_BUSY_WAIT;
|
|
|
|
CSR_WRITE_2(sc, VX_COMMAND, C_INTR_LATCH);
|
|
|
|
CSR_WRITE_2(sc, VX_COMMAND, SET_RD_0_MASK);
|
|
|
|
CSR_WRITE_2(sc, VX_COMMAND, SET_INTR_MASK);
|
|
|
|
CSR_WRITE_2(sc, VX_COMMAND, SET_RX_FILTER);
|
|
|
|
|
2005-10-06 18:27:59 +00:00
|
|
|
vx_mbuf_empty(sc);
|
1996-11-04 22:17:20 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
int
|
2005-10-06 18:27:59 +00:00
|
|
|
vx_busy_eeprom(struct vx_softc *sc)
|
1996-11-04 22:17:20 +00:00
|
|
|
{
|
2004-08-18 16:56:54 +00:00
|
|
|
int j, i = 100;
|
|
|
|
|
|
|
|
while (i--) {
|
|
|
|
j = CSR_READ_2(sc, VX_W0_EEPROM_COMMAND);
|
|
|
|
if (j & EEPROM_BUSY)
|
|
|
|
DELAY(100);
|
|
|
|
else
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
if (!i) {
|
2005-10-06 18:27:59 +00:00
|
|
|
if_printf(sc->vx_ifp, "eeprom failed to come ready\n");
|
2004-08-18 16:56:54 +00:00
|
|
|
return (1);
|
|
|
|
}
|
|
|
|
return (0);
|
1996-11-04 22:17:20 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
static void
|
2005-10-06 18:27:59 +00:00
|
|
|
vx_mbuf_fill(void *sp)
|
1996-11-04 22:17:20 +00:00
|
|
|
{
|
2004-08-18 16:56:54 +00:00
|
|
|
struct vx_softc *sc = (struct vx_softc *)sp;
|
2005-10-06 18:27:59 +00:00
|
|
|
int i;
|
2004-08-18 16:56:54 +00:00
|
|
|
|
2005-10-06 18:27:59 +00:00
|
|
|
VX_LOCK_ASSERT(sc);
|
|
|
|
i = sc->vx_last_mb;
|
2004-08-18 16:56:54 +00:00
|
|
|
do {
|
2005-10-06 18:27:59 +00:00
|
|
|
if (sc->vx_mb[i] == NULL)
|
2012-12-04 09:32:43 +00:00
|
|
|
MGET(sc->vx_mb[i], M_NOWAIT, MT_DATA);
|
2005-10-06 18:27:59 +00:00
|
|
|
if (sc->vx_mb[i] == NULL)
|
2004-08-18 16:56:54 +00:00
|
|
|
break;
|
|
|
|
i = (i + 1) % MAX_MBS;
|
2005-10-06 18:27:59 +00:00
|
|
|
} while (i != sc->vx_next_mb);
|
|
|
|
sc->vx_last_mb = i;
|
2004-08-18 16:56:54 +00:00
|
|
|
/* If the queue was not filled, try again. */
|
2005-10-06 18:27:59 +00:00
|
|
|
if (sc->vx_last_mb != sc->vx_next_mb) {
|
|
|
|
callout_reset(&sc->vx_callout, hz / 100, vx_mbuf_fill, sc);
|
|
|
|
sc->vx_buffill_pending = 1;
|
2004-08-18 16:56:54 +00:00
|
|
|
} else {
|
2005-10-06 18:27:59 +00:00
|
|
|
sc->vx_buffill_pending = 0;
|
2004-08-18 16:56:54 +00:00
|
|
|
}
|
1996-11-04 22:17:20 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
static void
|
2005-10-06 18:27:59 +00:00
|
|
|
vx_mbuf_empty(struct vx_softc *sc)
|
1996-11-04 22:17:20 +00:00
|
|
|
{
|
2005-10-06 18:27:59 +00:00
|
|
|
int i;
|
2004-08-18 16:56:54 +00:00
|
|
|
|
2005-10-06 18:27:59 +00:00
|
|
|
VX_LOCK_ASSERT(sc);
|
2004-08-18 16:56:54 +00:00
|
|
|
for (i = 0; i < MAX_MBS; i++) {
|
2005-10-06 18:27:59 +00:00
|
|
|
if (sc->vx_mb[i]) {
|
|
|
|
m_freem(sc->vx_mb[i]);
|
|
|
|
sc->vx_mb[i] = NULL;
|
2004-08-18 16:56:54 +00:00
|
|
|
}
|
1996-11-04 22:17:20 +00:00
|
|
|
}
|
2005-10-06 18:27:59 +00:00
|
|
|
sc->vx_last_mb = sc->vx_next_mb = 0;
|
|
|
|
if (sc->vx_buffill_pending != 0)
|
|
|
|
callout_stop(&sc->vx_callout);
|
1996-11-04 22:17:20 +00:00
|
|
|
}
|