376 lines
10 KiB
C
376 lines
10 KiB
C
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/*-
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* SPDX-License-Identifier: BSD-2-Clause-FreeBSD
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*
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* Copyright (c) 2020 Oskar Holmlund <oskar.holmlund@ohdata.se>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/conf.h>
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#include <sys/bus.h>
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#include <sys/kernel.h>
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#include <sys/module.h>
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#include <sys/systm.h>
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#include <sys/libkern.h>
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#include <machine/bus.h>
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#include <dev/fdt/simplebus.h>
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#include <dev/extres/clk/clk_div.h>
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#include <dev/ofw/ofw_bus.h>
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#include <dev/ofw/ofw_bus_subr.h>
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#include <arm/ti/clk/ti_clk_dpll.h>
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#include "clock_common.h"
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#if 0
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#define DPRINTF(dev, msg...) device_printf(dev, msg)
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#else
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#define DPRINTF(dev, msg...)
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#endif
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/*
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* Devicetree description
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* Documentation/devicetree/bindings/clock/ti/dpll.txt
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*/
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struct ti_dpll_softc {
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device_t dev;
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uint8_t dpll_type;
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bool attach_done;
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struct ti_clk_dpll_def dpll_def;
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struct clock_cell_info clock_cell;
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struct clkdom *clkdom;
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};
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static int ti_dpll_probe(device_t dev);
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static int ti_dpll_attach(device_t dev);
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static int ti_dpll_detach(device_t dev);
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#define TI_OMAP3_DPLL_CLOCK 17
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#define TI_OMAP3_DPLL_CORE_CLOCK 16
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#define TI_OMAP3_DPLL_PER_CLOCK 15
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#define TI_OMAP3_DPLL_PER_J_TYPE_CLOCK 14
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#define TI_OMAP4_DPLL_CLOCK 13
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#define TI_OMAP4_DPLL_X2_CLOCK 12
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#define TI_OMAP4_DPLL_CORE_CLOCK 11
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#define TI_OMAP4_DPLL_M4XEN_CLOCK 10
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#define TI_OMAP4_DPLL_J_TYPE_CLOCK 9
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#define TI_OMAP5_MPU_DPLL_CLOCK 8
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#define TI_AM3_DPLL_NO_GATE_CLOCK 7
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#define TI_AM3_DPLL_J_TYPE_CLOCK 6
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#define TI_AM3_DPLL_NO_GATE_J_TYPE_CLOCK 5
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#define TI_AM3_DPLL_CLOCK 4
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#define TI_AM3_DPLL_CORE_CLOCK 3
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#define TI_AM3_DPLL_X2_CLOCK 2
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#define TI_OMAP2_DPLL_CORE_CLOCK 1
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#define TI_DPLL_END 0
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static struct ofw_compat_data compat_data[] = {
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{ "ti,omap3-dpll-clock", TI_OMAP3_DPLL_CLOCK },
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{ "ti,omap3-dpll-core-clock", TI_OMAP3_DPLL_CORE_CLOCK },
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{ "ti,omap3-dpll-per-clock", TI_OMAP3_DPLL_PER_CLOCK },
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{ "ti,omap3-dpll-per-j-type-clock",TI_OMAP3_DPLL_PER_J_TYPE_CLOCK },
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{ "ti,omap4-dpll-clock", TI_OMAP4_DPLL_CLOCK },
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{ "ti,omap4-dpll-x2-clock", TI_OMAP4_DPLL_X2_CLOCK },
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{ "ti,omap4-dpll-core-clock", TI_OMAP4_DPLL_CORE_CLOCK },
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{ "ti,omap4-dpll-m4xen-clock", TI_OMAP4_DPLL_M4XEN_CLOCK },
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{ "ti,omap4-dpll-j-type-clock", TI_OMAP4_DPLL_J_TYPE_CLOCK },
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{ "ti,omap5-mpu-dpll-clock", TI_OMAP5_MPU_DPLL_CLOCK },
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{ "ti,am3-dpll-no-gate-clock", TI_AM3_DPLL_NO_GATE_CLOCK },
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{ "ti,am3-dpll-j-type-clock", TI_AM3_DPLL_J_TYPE_CLOCK },
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{ "ti,am3-dpll-no-gate-j-type-clock",TI_AM3_DPLL_NO_GATE_J_TYPE_CLOCK },
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{ "ti,am3-dpll-clock", TI_AM3_DPLL_CLOCK },
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{ "ti,am3-dpll-core-clock", TI_AM3_DPLL_CORE_CLOCK },
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{ "ti,am3-dpll-x2-clock", TI_AM3_DPLL_X2_CLOCK },
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{ "ti,omap2-dpll-core-clock", TI_OMAP2_DPLL_CORE_CLOCK },
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{ NULL, TI_DPLL_END }
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};
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static int
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register_clk(struct ti_dpll_softc *sc) {
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int err;
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sc->clkdom = clkdom_create(sc->dev);
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if (sc->clkdom == NULL) {
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DPRINTF(sc->dev, "Failed to create clkdom\n");
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return (ENXIO);
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}
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err = ti_clknode_dpll_register(sc->clkdom, &sc->dpll_def);
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if (err) {
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DPRINTF(sc->dev,
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"ti_clknode_dpll_register failed %x\n", err);
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return (ENXIO);
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}
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err = clkdom_finit(sc->clkdom);
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if (err) {
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DPRINTF(sc->dev, "Clk domain finit fails %x.\n", err);
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return (ENXIO);
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}
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return (0);
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}
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static int
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ti_dpll_probe(device_t dev)
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{
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if (!ofw_bus_status_okay(dev))
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return (ENXIO);
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if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0)
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return (ENXIO);
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device_set_desc(dev, "TI DPLL Clock");
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return (BUS_PROBE_DEFAULT);
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}
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static int
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parse_dpll_reg(struct ti_dpll_softc *sc) {
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ssize_t numbytes_regs;
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uint32_t num_regs;
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phandle_t node;
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cell_t reg_cells[4];
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if (sc->dpll_type == TI_AM3_DPLL_X2_CLOCK ||
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sc->dpll_type == TI_OMAP4_DPLL_X2_CLOCK) {
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sc->dpll_def.ti_clksel_mult.value = 2;
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sc->dpll_def.ti_clksel_mult.flags = TI_CLK_FACTOR_FIXED;
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sc->dpll_def.ti_clksel_div.value = 1;
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sc->dpll_def.ti_clksel_div.flags = TI_CLK_FACTOR_FIXED;
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return (0);
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}
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node = ofw_bus_get_node(sc->dev);
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numbytes_regs = OF_getproplen(node, "reg");
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num_regs = numbytes_regs / sizeof(cell_t);
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/* Sanity check */
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if (num_regs > 4)
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return (ENXIO);
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OF_getencprop(node, "reg", reg_cells, numbytes_regs);
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switch (sc->dpll_type) {
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case TI_AM3_DPLL_NO_GATE_CLOCK:
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case TI_AM3_DPLL_J_TYPE_CLOCK:
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case TI_AM3_DPLL_NO_GATE_J_TYPE_CLOCK:
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case TI_AM3_DPLL_CLOCK:
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case TI_AM3_DPLL_CORE_CLOCK:
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case TI_AM3_DPLL_X2_CLOCK:
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if (num_regs != 3)
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return (ENXIO);
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sc->dpll_def.ti_clkmode_offset = reg_cells[0];
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sc->dpll_def.ti_idlest_offset = reg_cells[1];
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sc->dpll_def.ti_clksel_offset = reg_cells[2];
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break;
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case TI_OMAP2_DPLL_CORE_CLOCK:
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if (num_regs != 2)
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return (ENXIO);
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sc->dpll_def.ti_clkmode_offset = reg_cells[0];
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sc->dpll_def.ti_clksel_offset = reg_cells[1];
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break;
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default:
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sc->dpll_def.ti_clkmode_offset = reg_cells[0];
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sc->dpll_def.ti_idlest_offset = reg_cells[1];
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sc->dpll_def.ti_clksel_offset = reg_cells[2];
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sc->dpll_def.ti_autoidle_offset = reg_cells[3];
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break;
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}
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/* AM335x */
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if (sc->dpll_def.ti_clksel_offset == CM_CLKSEL_DPLL_PERIPH) {
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sc->dpll_def.ti_clksel_mult.shift = 8;
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sc->dpll_def.ti_clksel_mult.mask = 0x000FFF00;
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sc->dpll_def.ti_clksel_mult.width = 12;
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sc->dpll_def.ti_clksel_mult.value = 0;
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sc->dpll_def.ti_clksel_mult.min_value = 2;
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sc->dpll_def.ti_clksel_mult.max_value = 4095;
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sc->dpll_def.ti_clksel_mult.flags = TI_CLK_FACTOR_ZERO_BASED |
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TI_CLK_FACTOR_MIN_VALUE |
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TI_CLK_FACTOR_MAX_VALUE;
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sc->dpll_def.ti_clksel_div.shift = 0;
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sc->dpll_def.ti_clksel_div.mask = 0x000000FF;
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sc->dpll_def.ti_clksel_div.width = 8;
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sc->dpll_def.ti_clksel_div.value = 0;
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sc->dpll_def.ti_clksel_div.min_value = 0;
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sc->dpll_def.ti_clksel_div.max_value = 255;
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sc->dpll_def.ti_clksel_div.flags = TI_CLK_FACTOR_MIN_VALUE |
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TI_CLK_FACTOR_MAX_VALUE;
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} else {
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sc->dpll_def.ti_clksel_mult.shift = 8;
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sc->dpll_def.ti_clksel_mult.mask = 0x0007FF00;
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sc->dpll_def.ti_clksel_mult.width = 11;
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sc->dpll_def.ti_clksel_mult.value = 0;
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sc->dpll_def.ti_clksel_mult.min_value = 2;
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sc->dpll_def.ti_clksel_mult.max_value = 2047;
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sc->dpll_def.ti_clksel_mult.flags = TI_CLK_FACTOR_ZERO_BASED |
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TI_CLK_FACTOR_MIN_VALUE |
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TI_CLK_FACTOR_MAX_VALUE;
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sc->dpll_def.ti_clksel_div.shift = 0;
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sc->dpll_def.ti_clksel_div.mask = 0x0000007F;
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sc->dpll_def.ti_clksel_div.width = 7;
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sc->dpll_def.ti_clksel_div.value = 0;
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sc->dpll_def.ti_clksel_div.min_value = 0;
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sc->dpll_def.ti_clksel_div.max_value = 127;
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sc->dpll_def.ti_clksel_div.flags = TI_CLK_FACTOR_MIN_VALUE |
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TI_CLK_FACTOR_MAX_VALUE;
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}
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DPRINTF(sc->dev, "clkmode %x idlest %x clksel %x autoidle %x\n",
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sc->dpll_def.ti_clkmode_offset, sc->dpll_def.ti_idlest_offset,
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sc->dpll_def.ti_clksel_offset,
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sc->dpll_def.ti_autoidle_offset);
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return (0);
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}
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static int
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ti_dpll_attach(device_t dev)
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{
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struct ti_dpll_softc *sc;
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phandle_t node;
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int err;
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sc = device_get_softc(dev);
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sc->dev = dev;
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sc->dpll_type = ofw_bus_search_compatible(dev, compat_data)->ocd_data;
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node = ofw_bus_get_node(dev);
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/* Grab the content of reg properties */
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parse_dpll_reg(sc);
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/* default flags (OMAP4&AM335x) not present in the dts at moment */
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sc->dpll_def.ti_clkmode_flags = MN_BYPASS_MODE_FLAG | LOCK_MODE_FLAG;
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if (OF_hasprop(node, "ti,low-power-stop")) {
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sc->dpll_def.ti_clkmode_flags |= LOW_POWER_STOP_MODE_FLAG;
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}
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if (OF_hasprop(node, "ti,low-power-bypass")) {
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sc->dpll_def.ti_clkmode_flags |= IDLE_BYPASS_LOW_POWER_MODE_FLAG;
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}
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if (OF_hasprop(node, "ti,lock")) {
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sc->dpll_def.ti_clkmode_flags |= LOCK_MODE_FLAG;
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}
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read_clock_cells(sc->dev, &sc->clock_cell);
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create_clkdef(sc->dev, &sc->clock_cell, &sc->dpll_def.clkdef);
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err = find_parent_clock_names(sc->dev, &sc->clock_cell,
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&sc->dpll_def.clkdef);
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if (err) {
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/* free_clkdef will be called in ti_dpll_new_pass */
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DPRINTF(sc->dev, "find_parent_clock_names failed\n");
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return (bus_generic_attach(sc->dev));
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}
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err = register_clk(sc);
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if (err) {
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/* free_clkdef will be called in ti_dpll_new_pass */
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DPRINTF(sc->dev, "register_clk failed\n");
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return (bus_generic_attach(sc->dev));
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}
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sc->attach_done = true;
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free_clkdef(&sc->dpll_def.clkdef);
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return (bus_generic_attach(sc->dev));
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}
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static int
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ti_dpll_detach(device_t dev)
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{
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return (EBUSY);
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}
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static void
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ti_dpll_new_pass(device_t dev)
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{
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struct ti_dpll_softc *sc;
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int err;
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sc = device_get_softc(dev);
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if (sc->attach_done) {
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return;
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}
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err = find_parent_clock_names(sc->dev, &sc->clock_cell,
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&sc->dpll_def.clkdef);
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if (err) {
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/* free_clkdef will be called in a later call to ti_dpll_new_pass */
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DPRINTF(sc->dev,
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"new_pass find_parent_clock_names failed\n");
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return;
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}
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err = register_clk(sc);
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if (err) {
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/* free_clkdef will be called in a later call to ti_dpll_new_pass */
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DPRINTF(sc->dev, "new_pass register_clk failed\n");
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return;
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}
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sc->attach_done = true;
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free_clkdef(&sc->dpll_def.clkdef);
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}
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static device_method_t ti_dpll_methods[] = {
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/* Device interface */
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DEVMETHOD(device_probe, ti_dpll_probe),
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DEVMETHOD(device_attach, ti_dpll_attach),
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DEVMETHOD(device_detach, ti_dpll_detach),
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/* Bus interface */
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DEVMETHOD(bus_new_pass, ti_dpll_new_pass),
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DEVMETHOD_END
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};
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DEFINE_CLASS_0(ti_dpll, ti_dpll_driver, ti_dpll_methods,
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sizeof(struct ti_dpll_softc));
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static devclass_t ti_dpll_devclass;
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EARLY_DRIVER_MODULE(ti_dpll, simplebus, ti_dpll_driver,
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ti_dpll_devclass, 0, 0, BUS_PASS_BUS + BUS_PASS_ORDER_MIDDLE);
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MODULE_VERSION(ti_dpll, 1);
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