freebsd-nq/sbin/cxconfig/cxconfig.8

.\" $FreeBSD$
.Dd December 2, 1994
.Dt CXCONFIG 8
.Os
.Sh NAME
.Nm cxconfig
.Nd channel options management utility for Cronyx-Sigma adapter
.Sh SYNOPSIS
.Nm
.Op Fl a
.Op Ar <channel> Op Ar <option>...
.Sh DESCRIPTION
The 
.Nm
utility is used for configuring the channel options of
the Cronyx-Sigma adapter.
.Pp
To change channel options the channel should be free: the corresponding
network interface in ``down'' state, the asynchronous terminal device 
.Pa /dev/tty*
closed.
Generally, the channel options are set up during the operating
system startup, for example from the 
.Pa /etc/rc
file.
.Pp
Note, that not all options have a sense for every particular
case, and an attempt to set some of them can hang up the channel or
the whole adapter.
.Pp
The following option is available:
.Bl -tag -width indent
.It Fl a
Display full information.
.El
.Sh "Channel options"
.Bl -tag -width 10n
.It ispeed=#
Set the receiver baud rate to the number given.
The maximal value is 256000 bits/sec.
In the synchronous mode the receiver baud rate is significant
only when DPLL mode is used.
.It ospeed=#
Set the transmitter baud rate to the number given.
The maximal value is 256000 bits/sec.
In the synchronous mode the transmitter baud rate is significant
only in the case of the internal clock source.
If receiver and transmitter have equal data rate, then it could
be set by specifying only the numerical argument.
.It async
Set the asynchronous channel mode.
.It "hdlc, bisync, bsc, x.21, x21
Set the synchronous channel mode: HDLC, Bisync (BSC) or X.21.
.It ppp
Set the link-level protocol: PpP/HDLC.  The built-in simplified synchronous PPP
implementation is used (see RFC-1548, RFC-1549).
.It cisco
Set the link-level protocol: Cisco/HDLC (see RFC-1547).
This protocol is intended for compatibility with old models of Cisco routers,
and with early versions of BSD/386 drivers.
The extensive usage of this protocol is not recommended.
.It ext
Use the external link-level protocol suite (for BSD/386 only).
.It "+keepalive, -keepalive"
Enable the automatic line state control sub-protocol.
This setting is not significant when the external link-level protocol is used.
.It "+autorts, -autorts"
Enable the automatic RTS signal control.
When enabled, the RTS signal goes up only when both halves of
the receiver ring buffer are free and ready for receive,
and goes down when one or both buffers are busy.
.It "port=rs232, port=rs449, port=v35
Set the zero channel hardware interface type.
.El
.Sh "Common options"
.Bl -tag -width 10n
.It "nrz, nrzi, manchester"
Set the data line signal encoding.
In the case of 
.Em NRZ
encoding the zero bit is transmitted by the zero signal
level, the one bit - by the positive signal level.
In the case of 
.Em NRZI
encoding the zero bit is transmitted by the change of
the signal level, the one bit - by the constant signal level.
In the case of 
.Em Manchester
encoding the zero bit is encoded as 01 value,
the one bit - as 10 value.
.It "+dpll, -dpll"
Enable the digital phase locked loop mode (DPLL).
When enabled, the receiver timing clock signal
is derived from the received data.
.It "+lloop, -lloop"
Set the local loopback mode.
.It "+extclock, -extclock"
Set the timing clock source of synchronous channels.  There are
two possible variants: 
.Em "external clock"
source or 
.Em "internal clock"
generation.
.Pp
.Em "External clock"
mode is the most common method for connecting
external modem hardware.  In this mode the external timing
signal is received on TXCIN pin of the connector, and it is
used as a synchronization clock for transmitting data (TXD).
.Pp
In the case of 
.Em "internal clock"
mode the transmitted data (TXD)
are synchronized using the internal on-board timing generator,
the internally generated timing signal is driven on the TXCOUT
pin, and the signal on the TXCIN pin is ignored.  This mode
is used for direct terminal-to-terminal communication,
e.g. for connecting two computers together in a synchronous mode
via relatively short cable.  This method should also be used
for testing channels with an external loopback connector.
.It fifo=#
FIFO threshold level setup for receiver and transmitter.
.It rfifo=#
Hardware RTS/CTS flow control FIFO threshold setup.
.It "+ctsup, -ctsup"
Enable/disable interrupts on CTS (Clear To Send) signal setup (0 to 1 transition).
.It "+ctsdown, -ctsdown"
Enable/disable interrupts on CTS (Clear To Send) signal clear (1 to 0 transition).
.It "+cdup, -cdup"
Enable/disable interrupts on CD (Carrier Detect) signal setup (0 to 1 transition).
.It "+cddown, -cddown"
Enable/disable interrupts on CD (Carrier Detect) signal clear (1 to 0 transition).
.It "+dsrup, -dsrup"
Enable/disable interrupts on DSR (Data Set Ready) signal setup (0 to 1 transition).
.It "+dsrdown, -dsrdown"
Enable/disable interrupts on DSR (Data Set Ready) signal clear (1 to 0 transition).
.El
.Sh "Asynchronous mode options"
.Bl -tag -width 10n
.It cs#
Select character size: 5, 6, 7 or 8 bits.
.It "parodd, pareven
Parity mode: odd or even.
.It "+ignpar, -ignpar
Disable/enable parity detection.
.It nopar
Disable parity bit generation.
.It forcepar
Force parity: even - 0, odd - 1.
.It "stopb1, stopb1.5, stopb2
Use 1 or 1.5 or 2 stop bits per character.
.It "+dsr, -dsr"
Use the DSR input signal as receiver enable/disable.
.It "+cts, -cts"
Use the CTS input signal as transmitter enable/disable.
.It "+rts, -rts"
Drive the RTS output signal as transmitter ready.
.It "+rloop, -rloop"
Set the remote loopback mode.
.It "+etc, -etc"
Enable the embedded transmit commands mode.
.It "+ixon, -ixon"
Enable the hardware XON/XOFF flow control support.
.It "+ixany, -ixany"
Use the hardware IXANY mode support.
.It "+sdt, -sdt"
Detect the spec. characters SCHR1 and SCHR2 in the receive data.
.It "+flowct, -flowct"
Receive the flow control spec. characters as data.
.It "+rdt, -rdt"
Detect the spec. characters in range SCRL..SCRH in the receive data.
.It "+exdt, -exdt"
Detect the spec. characters SCHR3 and SCHR4 in the receive data.
.It "parintr, parnull, parign, pardisc, parffnull
Action on parity errors:
.Pp
.Bl -tag -width parffnullxxx -compact
.It Mode
Action
.It parintr
Generate the receiver error interrupt
.It parnull
Input the NUL character
.It parign
Ignore the error, receive as good data
.It pardisc
Ignore the character
.It parffnull
Input the sequence <0xFF, NUL, character>
.El
.It "brkintr, brknull, brkdisc
Line break state action:
.Pp
.Bl -tag -width parffnullxxx -compact
.It Mode
Action
.It brkintr
Generate the receiver error interrupt
.It brknull
Input the NUL character
.It brkdisc
Ignore the line break state
.El
.It "+inlcr, -inlcr"
Translate received NL characters to CR.
.It "+icrnl, -icrnl"
Translate received CR characters to NL.
.It "+igncr, -igncr"
Ignore received CR characters.
.It "+ocrnl, -ocrnl"
Translate transmitted CR characters to NL.
.It "+onlcr, -onlcr"
Translate transmitted NL characters to CR.
.It "+fcerr, -fcerr"
Process (don't process) the characters, received with errors,
for special character/flow control matching.
.It "+lnext, -lnext"
Enable the LNEXT character option: the character following
the LNEXT character is not processed for special character/flow
control matching.
.It "+istrip, -istrip"
Strip input characters to seven bits.
.It schr1=#
The XON flow control character value.
.It schr2=#
The XOFF flow control character value.
.It schr3=#
The SCHR3 spec. character value.
.It schr4=#
The SCHR4 spec. character value.
.It "scrl=#, scrh=#
The spec. character range (inclusive).
.It lnext=#
The LNEXT spec. character value.
.El
.Sh "HDLC mode options"
.Bl -tag -width 10n
.It if#
The minimum number of flags transmitted before a frame is started.
.It noaddr
No frame address recognition.
.It "addrlen1, addrlen2"
Address field length: 1 or 2 bytes.
.It "addr1, addr2"
Addressing mode: 4x1 bytes or 2x2 bytes.
Registers RFAR1..RFAR4 should contain the address to be matched.
.It "+clrdet, -clrdet"
Enable/disable clear detect for X.21 protocol support.
.It "+dsr, -dsr"
Use the DSR input signal as receiver enable/disable.
.It "+cts, -cts"
Use the CTS input signal as transmitter enable/disable.
.It "+rts, -rts"
Drive the RTS output signal as transmitter ready.
.It "+fcs, -fcs"
Enable/disable the frame checksum generation and checking.
.It "crc-16, crc-v.41
Select the CRC polynomial: CRC-16 (x^16+x^15+x^2+1)
or CRC V.41 (x^16+x^12+x^5+1).
.It "fcs-crc-16, fcs-v.41
Frame checksum preset: all zeros (CRC-16) or all ones (CRC V.41).
.It "+crcinv, -crcinv"
Invert (ie. CRC V.41) or don't invert (ie. CRC-16) the transmitted frame checksum.
.It "+fcsapd, -fcsapd"
Pass the received CRC to the host at the end of receiver data buffer.
.It "idlemark, idleflag
Idle mode: idle in mark (transmit all ones) or idle in flag (transmit flag).
.It "+syn, -syn"
Enable/disable sending pad characters before sending flag when coming out
of the idle mode.
.It pad#
The number of synchronous characters sent (0..4).
.It "syn=0xaa, syn=0x00
Send sync pattern.
.It "rfar1=#, rfar2=#, rfar3=#, rfar4=#
Frame address registers for address recognition.
.El
.Sh EXAMPLES
Set up the channel 7 of the adapter Sigma-400 under
.Fx .
Physical 4-wire leased line with Zelax+ M115 short-range modems.
Synchronous mode, 128000 bits/sec, interface RS-232,
protocol PpP/HDLC without keepalive support, NRZI encoding,
DPLL mode, no flow control:
.Bd -literal
cxconfig cx7 128000 hdlc ppp -keepalive nrzi -cts +dpll -extclock
ifconfig cx7 158.250.244.2 158.250.244.1 up
.Ed
.Pp
Set up the channel 0 of the adapter Sigma-100 under
.Fx .
Attachment to the near computer by short cable, internal clock source.
Synchronous mode, 256000 bits/sec, interface RS-232,
protocol Cisco/HDLC with keepalive support:
.Bd -literal
cxconfig cx0 hdlc 256000 cisco +keepalive -extclock
ifconfig cx0 200.1.1.1 200.1.1.2 up
.Ed
.Pp
Set up the channel 1 of the adapter Sigma-840 under BSD/386.
Synchronous 64 kbit/sec leased line, external clock source.
Synchronous mode, interface V.35, external protocol suite:
.Bd -literal
cxconfig cx1 hdlc ext
ifconfig cx1 193.124.254.50 193.124.254.49 multicast up
.Ed
.Pp
Set up the channel 0 of the adapter Sigma-840 under
.Fx .
Attachment to the Cisco-4000 router by null-modem cable, internal clock source.
Synchronous mode, 64000 bits/sec, interface RS-232,
protocol PpP/HDLC with keepalive support and flow control,
LCP and IPCP protocols (see RFC-1548 and RFC-1332) debug tracing enabled:
.Bd -literal
cxconfig cx0 hdlc 64000 port=rs232 ppp +keepalive -extclock +cts
ifconfig cx0 100.0.0.2 100.0.0.1 debug up
.Ed
.Sh FILES
.Bl -tag -width /dev/cronyx -compact
.It Pa /dev/cronyx
the special device file for adapter options management
.El
.Sh SEE ALSO
.Xr cx 4