59 lines
2.3 KiB
C
59 lines
2.3 KiB
C
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/*-
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* Copyright 2021 Intel Corp
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* Copyright 2021 Rubicon Communications, LLC (Netgate)
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* SPDX-License-Identifier: BSD-3-Clause
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*
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* $FreeBSD$
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*/
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#ifndef _IGC_API_H_
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#define _IGC_API_H_
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#include "igc_hw.h"
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extern void igc_init_function_pointers_i225(struct igc_hw *hw);
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s32 igc_set_mac_type(struct igc_hw *hw);
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s32 igc_setup_init_funcs(struct igc_hw *hw, bool init_device);
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s32 igc_init_mac_params(struct igc_hw *hw);
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s32 igc_init_nvm_params(struct igc_hw *hw);
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s32 igc_init_phy_params(struct igc_hw *hw);
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s32 igc_get_bus_info(struct igc_hw *hw);
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void igc_clear_vfta(struct igc_hw *hw);
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void igc_write_vfta(struct igc_hw *hw, u32 offset, u32 value);
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s32 igc_force_mac_fc(struct igc_hw *hw);
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s32 igc_check_for_link(struct igc_hw *hw);
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s32 igc_reset_hw(struct igc_hw *hw);
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s32 igc_init_hw(struct igc_hw *hw);
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s32 igc_setup_link(struct igc_hw *hw);
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s32 igc_get_speed_and_duplex(struct igc_hw *hw, u16 *speed, u16 *duplex);
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s32 igc_disable_pcie_master(struct igc_hw *hw);
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void igc_config_collision_dist(struct igc_hw *hw);
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int igc_rar_set(struct igc_hw *hw, u8 *addr, u32 index);
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u32 igc_hash_mc_addr(struct igc_hw *hw, u8 *mc_addr);
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void igc_update_mc_addr_list(struct igc_hw *hw, u8 *mc_addr_list,
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u32 mc_addr_count);
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s32 igc_check_reset_block(struct igc_hw *hw);
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s32 igc_get_cable_length(struct igc_hw *hw);
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s32 igc_validate_mdi_setting(struct igc_hw *hw);
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s32 igc_read_phy_reg(struct igc_hw *hw, u32 offset, u16 *data);
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s32 igc_write_phy_reg(struct igc_hw *hw, u32 offset, u16 data);
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s32 igc_get_phy_info(struct igc_hw *hw);
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void igc_release_phy(struct igc_hw *hw);
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s32 igc_acquire_phy(struct igc_hw *hw);
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s32 igc_phy_hw_reset(struct igc_hw *hw);
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s32 igc_phy_commit(struct igc_hw *hw);
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void igc_power_up_phy(struct igc_hw *hw);
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void igc_power_down_phy(struct igc_hw *hw);
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s32 igc_read_mac_addr(struct igc_hw *hw);
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s32 igc_read_pba_string(struct igc_hw *hw, u8 *pba_num, u32 pba_num_size);
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void igc_reload_nvm(struct igc_hw *hw);
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s32 igc_update_nvm_checksum(struct igc_hw *hw);
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s32 igc_validate_nvm_checksum(struct igc_hw *hw);
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s32 igc_read_nvm(struct igc_hw *hw, u16 offset, u16 words, u16 *data);
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s32 igc_write_nvm(struct igc_hw *hw, u16 offset, u16 words, u16 *data);
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s32 igc_set_d3_lplu_state(struct igc_hw *hw, bool active);
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s32 igc_set_d0_lplu_state(struct igc_hw *hw, bool active);
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#endif /* _IGC_API_H_ */
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