2011-05-13 04:54:01 +00:00
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/*-
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* Copyright (c) 2011 NetApp, Inc.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY NETAPP, INC ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL NETAPP, INC OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/linker_set.h>
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#include <sys/select.h>
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#include <sys/uio.h>
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#include <sys/ioctl.h>
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#include <errno.h>
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#include <fcntl.h>
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#include <stdio.h>
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#include <stdlib.h>
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#include <stdint.h>
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#include <string.h>
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#include <strings.h>
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#include <unistd.h>
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#include <assert.h>
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#include <md5.h>
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#include <pthread.h>
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2013-04-26 05:13:48 +00:00
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#include <pthread_np.h>
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2011-05-13 04:54:01 +00:00
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2012-12-13 01:58:11 +00:00
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#include "bhyverun.h"
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2011-05-13 04:54:01 +00:00
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#include "pci_emul.h"
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#include "mevent.h"
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#include "virtio.h"
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2013-04-26 05:13:48 +00:00
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#define VTNET_RINGSZ 1024
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2011-05-13 04:54:01 +00:00
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#define VTNET_MAXSEGS 32
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/*
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* PCI config-space register offsets
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*/
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2013-01-30 04:30:36 +00:00
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#define VTNET_R_CFG0 24
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#define VTNET_R_CFG1 25
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#define VTNET_R_CFG2 26
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#define VTNET_R_CFG3 27
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#define VTNET_R_CFG4 28
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#define VTNET_R_CFG5 29
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#define VTNET_R_CFG6 30
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#define VTNET_R_CFG7 31
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#define VTNET_R_MAX 31
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#define VTNET_REGSZ VTNET_R_MAX+1
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2011-05-13 04:54:01 +00:00
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/*
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* Host capabilities
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*/
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#define VTNET_S_HOSTCAPS \
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( 0x00000020 | /* host supplies MAC */ \
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0x00008000 | /* host can merge Rx buffers */ \
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0x00010000 ) /* config status available */
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/*
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* Queue definitions.
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*/
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#define VTNET_RXQ 0
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#define VTNET_TXQ 1
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#define VTNET_CTLQ 2
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#define VTNET_MAXQ 3
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2013-01-30 04:30:36 +00:00
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static int use_msix = 1;
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2011-05-13 04:54:01 +00:00
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struct vring_hqueue {
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/* Internal state */
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uint16_t hq_size;
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uint16_t hq_cur_aidx; /* trails behind 'avail_idx' */
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/* Host-context pointers to the queue */
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struct virtio_desc *hq_dtable;
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uint16_t *hq_avail_flags;
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uint16_t *hq_avail_idx; /* monotonically increasing */
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uint16_t *hq_avail_ring;
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uint16_t *hq_used_flags;
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uint16_t *hq_used_idx; /* monotonically increasing */
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struct virtio_used *hq_used_ring;
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};
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/*
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* Fixed network header size
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*/
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struct virtio_net_rxhdr {
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uint8_t vrh_flags;
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uint8_t vrh_gso_type;
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uint16_t vrh_hdr_len;
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uint16_t vrh_gso_size;
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uint16_t vrh_csum_start;
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uint16_t vrh_csum_offset;
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uint16_t vrh_bufs;
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} __packed;
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/*
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* Debug printf
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*/
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static int pci_vtnet_debug;
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#define DPRINTF(params) if (pci_vtnet_debug) printf params
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#define WPRINTF(params) printf params
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/*
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* Per-device softc
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*/
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struct pci_vtnet_softc {
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struct pci_devinst *vsc_pi;
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pthread_mutex_t vsc_mtx;
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struct mevent *vsc_mevp;
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int vsc_curq;
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int vsc_status;
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int vsc_isr;
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int vsc_tapfd;
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int vsc_rx_ready;
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2013-04-26 05:13:48 +00:00
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int tx_in_progress;
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int resetting;
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2011-05-13 04:54:01 +00:00
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uint32_t vsc_features;
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uint8_t vsc_macaddr[6];
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uint64_t vsc_pfn[VTNET_MAXQ];
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struct vring_hqueue vsc_hq[VTNET_MAXQ];
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2013-01-30 04:30:36 +00:00
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uint16_t vsc_msix_table_idx[VTNET_MAXQ];
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2013-04-26 05:13:48 +00:00
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pthread_t tx_tid;
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pthread_mutex_t tx_mtx;
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pthread_cond_t tx_cond;
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2011-05-13 04:54:01 +00:00
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};
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2013-03-18 22:38:30 +00:00
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#define vtnet_ctx(sc) ((sc)->vsc_pi->pi_vmctx)
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2011-05-13 04:54:01 +00:00
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2013-01-30 04:30:36 +00:00
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/*
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* Return the size of IO BAR that maps virtio header and device specific
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* region. The size would vary depending on whether MSI-X is enabled or
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* not.
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*/
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static uint64_t
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pci_vtnet_iosize(struct pci_devinst *pi)
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{
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if (pci_msix_enabled(pi))
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return (VTNET_REGSZ);
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else
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return (VTNET_REGSZ - (VTCFG_R_CFG1 - VTCFG_R_MSIX));
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}
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2011-05-13 04:54:01 +00:00
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/*
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* Return the number of available descriptors in the vring taking care
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* of the 16-bit index wraparound.
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*/
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static int
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hq_num_avail(struct vring_hqueue *hq)
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{
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2013-03-16 05:40:29 +00:00
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uint16_t ndesc;
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2011-05-13 04:54:01 +00:00
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2013-03-06 07:28:20 +00:00
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/*
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2013-04-26 05:13:48 +00:00
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* We're just computing (a-b) mod 2^16
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2013-03-06 07:28:20 +00:00
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*
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* The only glitch here is that in standard C,
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* uint16_t promotes to (signed) int when int has
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* more than 16 bits (pretty much always now), so
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* we have to force it back to unsigned.
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*/
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ndesc = (unsigned)*hq->hq_avail_idx - (unsigned)hq->hq_cur_aidx;
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assert(ndesc <= hq->hq_size);
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2011-05-13 04:54:01 +00:00
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return (ndesc);
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}
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static uint16_t
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pci_vtnet_qsize(int qnum)
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{
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/* XXX no ctl queue currently */
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if (qnum == VTNET_CTLQ) {
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return (0);
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}
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/* XXX fixed currently. Maybe different for tx/rx/ctl */
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return (VTNET_RINGSZ);
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}
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2012-12-12 19:45:36 +00:00
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static void
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pci_vtnet_ring_reset(struct pci_vtnet_softc *sc, int ring)
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{
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struct vring_hqueue *hq;
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assert(ring < VTNET_MAXQ);
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hq = &sc->vsc_hq[ring];
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/*
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* Reset all soft state
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*/
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hq->hq_cur_aidx = 0;
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}
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2011-05-13 04:54:01 +00:00
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static void
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pci_vtnet_update_status(struct pci_vtnet_softc *sc, uint32_t value)
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{
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2012-12-12 19:45:36 +00:00
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2011-05-13 04:54:01 +00:00
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if (value == 0) {
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DPRINTF(("vtnet: device reset requested !\n"));
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2013-04-26 05:13:48 +00:00
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/* Wait for TX thread to complete pending desc processing */
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sc->resetting = 1;
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pthread_mutex_lock(&sc->tx_mtx);
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while (sc->tx_in_progress) {
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pthread_mutex_unlock(&sc->tx_mtx);
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usleep(10000);
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pthread_mutex_lock(&sc->tx_mtx);
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}
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pthread_mutex_unlock(&sc->tx_mtx);
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2012-12-12 19:45:36 +00:00
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pci_vtnet_ring_reset(sc, VTNET_RXQ);
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pci_vtnet_ring_reset(sc, VTNET_TXQ);
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sc->vsc_rx_ready = 0;
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2013-04-26 05:13:48 +00:00
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sc->resetting = 0;
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2011-05-13 04:54:01 +00:00
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}
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sc->vsc_status = value;
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}
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/*
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* Called to send a buffer chain out to the tap device
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*/
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static void
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pci_vtnet_tap_tx(struct pci_vtnet_softc *sc, struct iovec *iov, int iovcnt,
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int len)
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{
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char pad[60];
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if (sc->vsc_tapfd == -1)
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return;
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/*
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* If the length is < 60, pad out to that and add the
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* extra zero'd segment to the iov. It is guaranteed that
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* there is always an extra iov available by the caller.
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*/
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if (len < 60) {
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memset(pad, 0, 60 - len);
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iov[iovcnt].iov_base = pad;
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iov[iovcnt].iov_len = 60 - len;
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iovcnt++;
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}
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(void) writev(sc->vsc_tapfd, iov, iovcnt);
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}
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/*
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* Called when there is read activity on the tap file descriptor.
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* Each buffer posted by the guest is assumed to be able to contain
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* an entire ethernet frame + rx header.
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* MP note: the dummybuf is only used for discarding frames, so there
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* is no need for it to be per-vtnet or locked.
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*/
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static uint8_t dummybuf[2048];
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static void
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pci_vtnet_tap_rx(struct pci_vtnet_softc *sc)
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{
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struct virtio_desc *vd;
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struct virtio_used *vu;
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struct vring_hqueue *hq;
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struct virtio_net_rxhdr *vrx;
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uint8_t *buf;
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int i;
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int len;
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int ndescs;
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int didx, uidx, aidx; /* descriptor, avail and used index */
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/*
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* Should never be called without a valid tap fd
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*/
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assert(sc->vsc_tapfd != -1);
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/*
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* But, will be called when the rx ring hasn't yet
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* been set up.
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*/
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if (sc->vsc_rx_ready == 0) {
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/*
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* Drop the packet and try later.
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*/
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(void) read(sc->vsc_tapfd, dummybuf, sizeof(dummybuf));
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return;
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}
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/*
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* Calculate the number of available rx buffers
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*/
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hq = &sc->vsc_hq[VTNET_RXQ];
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ndescs = hq_num_avail(hq);
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if (ndescs == 0) {
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/*
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* Drop the packet and try later
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*/
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(void) read(sc->vsc_tapfd, dummybuf, sizeof(dummybuf));
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return;
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}
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aidx = hq->hq_cur_aidx;
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uidx = *hq->hq_used_idx;
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for (i = 0; i < ndescs; i++) {
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/*
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* 'aidx' indexes into the an array of descriptor indexes
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*/
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didx = hq->hq_avail_ring[aidx % hq->hq_size];
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assert(didx >= 0 && didx < hq->hq_size);
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vd = &hq->hq_dtable[didx];
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/*
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* Get a pointer to the rx header, and use the
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* data immediately following it for the packet buffer.
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*/
|
2013-03-18 22:38:30 +00:00
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vrx = paddr_guest2host(vtnet_ctx(sc), vd->vd_addr, vd->vd_len);
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2011-05-13 04:54:01 +00:00
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buf = (uint8_t *)(vrx + 1);
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len = read(sc->vsc_tapfd, buf,
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vd->vd_len - sizeof(struct virtio_net_rxhdr));
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if (len < 0 && errno == EWOULDBLOCK) {
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break;
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}
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/*
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* The only valid field in the rx packet header is the
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* number of buffers, which is always 1 without TSO
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* support.
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*/
|
|
|
|
memset(vrx, 0, sizeof(struct virtio_net_rxhdr));
|
|
|
|
vrx->vrh_bufs = 1;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Write this descriptor into the used ring
|
|
|
|
*/
|
|
|
|
vu = &hq->hq_used_ring[uidx % hq->hq_size];
|
|
|
|
vu->vu_idx = didx;
|
|
|
|
vu->vu_tlen = len + sizeof(struct virtio_net_rxhdr);
|
|
|
|
uidx++;
|
|
|
|
aidx++;
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Update the used pointer, and signal an interrupt if allowed
|
|
|
|
*/
|
|
|
|
*hq->hq_used_idx = uidx;
|
|
|
|
hq->hq_cur_aidx = aidx;
|
|
|
|
|
|
|
|
if ((*hq->hq_avail_flags & VRING_AVAIL_F_NO_INTERRUPT) == 0) {
|
2013-01-30 04:30:36 +00:00
|
|
|
if (use_msix) {
|
|
|
|
pci_generate_msix(sc->vsc_pi,
|
|
|
|
sc->vsc_msix_table_idx[VTNET_RXQ]);
|
|
|
|
} else {
|
|
|
|
sc->vsc_isr |= 1;
|
|
|
|
pci_generate_msi(sc->vsc_pi, 0);
|
|
|
|
}
|
2011-05-13 04:54:01 +00:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
static void
|
|
|
|
pci_vtnet_tap_callback(int fd, enum ev_type type, void *param)
|
|
|
|
{
|
|
|
|
struct pci_vtnet_softc *sc = param;
|
|
|
|
|
|
|
|
pthread_mutex_lock(&sc->vsc_mtx);
|
|
|
|
pci_vtnet_tap_rx(sc);
|
|
|
|
pthread_mutex_unlock(&sc->vsc_mtx);
|
|
|
|
|
|
|
|
}
|
|
|
|
|
|
|
|
static void
|
|
|
|
pci_vtnet_ping_rxq(struct pci_vtnet_softc *sc)
|
|
|
|
{
|
|
|
|
/*
|
|
|
|
* A qnotify means that the rx process can now begin
|
|
|
|
*/
|
|
|
|
if (sc->vsc_rx_ready == 0) {
|
|
|
|
sc->vsc_rx_ready = 1;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
static void
|
|
|
|
pci_vtnet_proctx(struct pci_vtnet_softc *sc, struct vring_hqueue *hq)
|
|
|
|
{
|
|
|
|
struct iovec iov[VTNET_MAXSEGS + 1];
|
|
|
|
struct virtio_desc *vd;
|
|
|
|
struct virtio_used *vu;
|
|
|
|
int i;
|
|
|
|
int plen;
|
|
|
|
int tlen;
|
|
|
|
int uidx, aidx, didx;
|
|
|
|
|
|
|
|
uidx = *hq->hq_used_idx;
|
|
|
|
aidx = hq->hq_cur_aidx;
|
|
|
|
didx = hq->hq_avail_ring[aidx % hq->hq_size];
|
|
|
|
assert(didx >= 0 && didx < hq->hq_size);
|
|
|
|
|
|
|
|
vd = &hq->hq_dtable[didx];
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Run through the chain of descriptors, ignoring the
|
|
|
|
* first header descriptor. However, include the header
|
|
|
|
* length in the total length that will be put into the
|
|
|
|
* used queue.
|
|
|
|
*/
|
|
|
|
tlen = vd->vd_len;
|
|
|
|
vd = &hq->hq_dtable[vd->vd_next];
|
|
|
|
|
|
|
|
for (i = 0, plen = 0;
|
|
|
|
i < VTNET_MAXSEGS;
|
|
|
|
i++, vd = &hq->hq_dtable[vd->vd_next]) {
|
2013-03-18 22:38:30 +00:00
|
|
|
iov[i].iov_base = paddr_guest2host(vtnet_ctx(sc),
|
|
|
|
vd->vd_addr, vd->vd_len);
|
2011-05-13 04:54:01 +00:00
|
|
|
iov[i].iov_len = vd->vd_len;
|
|
|
|
plen += vd->vd_len;
|
|
|
|
tlen += vd->vd_len;
|
|
|
|
|
|
|
|
if ((vd->vd_flags & VRING_DESC_F_NEXT) == 0)
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
assert(i < VTNET_MAXSEGS);
|
|
|
|
|
|
|
|
DPRINTF(("virtio: packet send, %d bytes, %d segs\n\r", plen, i + 1));
|
|
|
|
pci_vtnet_tap_tx(sc, iov, i + 1, plen);
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Return this chain back to the host
|
|
|
|
*/
|
|
|
|
vu = &hq->hq_used_ring[uidx % hq->hq_size];
|
|
|
|
vu->vu_idx = didx;
|
|
|
|
vu->vu_tlen = tlen;
|
|
|
|
hq->hq_cur_aidx = aidx + 1;
|
|
|
|
*hq->hq_used_idx = uidx + 1;
|
|
|
|
|
|
|
|
}
|
|
|
|
|
|
|
|
static void
|
|
|
|
pci_vtnet_ping_txq(struct pci_vtnet_softc *sc)
|
|
|
|
{
|
|
|
|
struct vring_hqueue *hq = &sc->vsc_hq[VTNET_TXQ];
|
|
|
|
int ndescs;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Calculate number of ring entries to process
|
|
|
|
*/
|
|
|
|
ndescs = hq_num_avail(hq);
|
|
|
|
|
|
|
|
if (ndescs == 0)
|
|
|
|
return;
|
|
|
|
|
2013-04-26 05:13:48 +00:00
|
|
|
/* Signal the tx thread for processing */
|
|
|
|
pthread_mutex_lock(&sc->tx_mtx);
|
|
|
|
if (sc->tx_in_progress == 0)
|
|
|
|
pthread_cond_signal(&sc->tx_cond);
|
|
|
|
pthread_mutex_unlock(&sc->tx_mtx);
|
2011-05-13 04:54:01 +00:00
|
|
|
}
|
|
|
|
|
2013-04-26 05:13:48 +00:00
|
|
|
/*
|
|
|
|
* Thread which will handle processing of TX desc
|
|
|
|
*/
|
|
|
|
static void *
|
|
|
|
pci_vtnet_tx_thread(void *param)
|
|
|
|
{
|
|
|
|
struct pci_vtnet_softc *sc = (struct pci_vtnet_softc *) param;
|
|
|
|
struct vring_hqueue *hq;
|
|
|
|
int i, ndescs, needintr,error;
|
|
|
|
|
|
|
|
needintr = 0;
|
|
|
|
hq = &sc->vsc_hq[VTNET_TXQ];
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Let us wait till the tx queue pointers get initialised &
|
|
|
|
* first tx signaled
|
|
|
|
*/
|
|
|
|
pthread_mutex_lock(&sc->tx_mtx);
|
|
|
|
error = pthread_cond_wait(&sc->tx_cond, &sc->tx_mtx);
|
|
|
|
assert(error == 0);
|
|
|
|
|
|
|
|
for (;;) {
|
|
|
|
pthread_mutex_lock(&sc->tx_mtx);
|
|
|
|
for (;;) {
|
|
|
|
if (sc->resetting) {
|
|
|
|
ndescs = 0;
|
|
|
|
needintr = 0;
|
|
|
|
} else
|
|
|
|
ndescs = hq_num_avail(hq);
|
|
|
|
|
|
|
|
if (ndescs != 0)
|
|
|
|
break;
|
|
|
|
|
|
|
|
if (needintr) {
|
|
|
|
/*
|
|
|
|
* Generate an interrupt if able
|
|
|
|
*/
|
|
|
|
if ((*hq->hq_avail_flags &
|
|
|
|
VRING_AVAIL_F_NO_INTERRUPT) == 0) {
|
|
|
|
if (use_msix) {
|
|
|
|
pci_generate_msix(sc->vsc_pi,
|
|
|
|
sc->vsc_msix_table_idx[VTNET_TXQ]);
|
|
|
|
} else {
|
|
|
|
sc->vsc_isr |= 1;
|
|
|
|
pci_generate_msi(sc->vsc_pi, 0);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
needintr = 0;
|
|
|
|
sc->tx_in_progress = 0;
|
|
|
|
error = pthread_cond_wait(&sc->tx_cond, &sc->tx_mtx);
|
|
|
|
assert(error == 0);
|
|
|
|
}
|
|
|
|
sc->tx_in_progress = 1;
|
|
|
|
pthread_mutex_unlock(&sc->tx_mtx);
|
|
|
|
|
|
|
|
while (ndescs > 0) {
|
|
|
|
/*
|
|
|
|
* Run through all the entries, placing them into
|
|
|
|
* iovecs and sending when an end-of-packet is found
|
|
|
|
*/
|
|
|
|
for (i = 0; i < ndescs; i++)
|
|
|
|
pci_vtnet_proctx(sc, hq);
|
|
|
|
needintr = 1;
|
|
|
|
ndescs = hq_num_avail(hq);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2011-05-13 04:54:01 +00:00
|
|
|
static void
|
|
|
|
pci_vtnet_ping_ctlq(struct pci_vtnet_softc *sc)
|
|
|
|
{
|
|
|
|
|
|
|
|
DPRINTF(("vtnet: control qnotify!\n\r"));
|
|
|
|
}
|
|
|
|
|
|
|
|
static void
|
|
|
|
pci_vtnet_ring_init(struct pci_vtnet_softc *sc, uint64_t pfn)
|
|
|
|
{
|
|
|
|
struct vring_hqueue *hq;
|
|
|
|
int qnum = sc->vsc_curq;
|
|
|
|
|
|
|
|
assert(qnum < VTNET_MAXQ);
|
|
|
|
|
|
|
|
sc->vsc_pfn[qnum] = pfn << VRING_PFN;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Set up host pointers to the various parts of the
|
|
|
|
* queue
|
|
|
|
*/
|
|
|
|
hq = &sc->vsc_hq[qnum];
|
|
|
|
hq->hq_size = pci_vtnet_qsize(qnum);
|
|
|
|
|
2013-03-18 22:38:30 +00:00
|
|
|
hq->hq_dtable = paddr_guest2host(vtnet_ctx(sc), pfn << VRING_PFN,
|
2013-03-01 02:26:28 +00:00
|
|
|
vring_size(hq->hq_size));
|
2011-05-13 04:54:01 +00:00
|
|
|
hq->hq_avail_flags = (uint16_t *)(hq->hq_dtable + hq->hq_size);
|
|
|
|
hq->hq_avail_idx = hq->hq_avail_flags + 1;
|
|
|
|
hq->hq_avail_ring = hq->hq_avail_flags + 2;
|
|
|
|
hq->hq_used_flags = (uint16_t *)roundup2((uintptr_t)hq->hq_avail_ring,
|
|
|
|
VRING_ALIGN);
|
|
|
|
hq->hq_used_idx = hq->hq_used_flags + 1;
|
|
|
|
hq->hq_used_ring = (struct virtio_used *)(hq->hq_used_flags + 2);
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Initialize queue indexes
|
|
|
|
*/
|
|
|
|
hq->hq_cur_aidx = 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int
|
|
|
|
pci_vtnet_init(struct vmctx *ctx, struct pci_devinst *pi, char *opts)
|
|
|
|
{
|
|
|
|
MD5_CTX mdctx;
|
|
|
|
unsigned char digest[16];
|
|
|
|
char nstr[80];
|
2013-04-26 05:13:48 +00:00
|
|
|
char tname[MAXCOMLEN + 1];
|
2011-05-13 04:54:01 +00:00
|
|
|
struct pci_vtnet_softc *sc;
|
2013-01-30 04:30:36 +00:00
|
|
|
const char *env_msi;
|
2011-05-13 04:54:01 +00:00
|
|
|
|
|
|
|
sc = malloc(sizeof(struct pci_vtnet_softc));
|
|
|
|
memset(sc, 0, sizeof(struct pci_vtnet_softc));
|
|
|
|
|
|
|
|
pi->pi_arg = sc;
|
|
|
|
sc->vsc_pi = pi;
|
|
|
|
|
|
|
|
pthread_mutex_init(&sc->vsc_mtx, NULL);
|
2013-01-30 04:30:36 +00:00
|
|
|
|
|
|
|
/*
|
|
|
|
* Use MSI if set by user
|
|
|
|
*/
|
|
|
|
if ((env_msi = getenv("BHYVE_USE_MSI")) != NULL) {
|
|
|
|
if (strcasecmp(env_msi, "yes") == 0)
|
|
|
|
use_msix = 0;
|
|
|
|
}
|
2011-05-13 04:54:01 +00:00
|
|
|
|
|
|
|
/*
|
|
|
|
* Attempt to open the tap device
|
|
|
|
*/
|
|
|
|
sc->vsc_tapfd = -1;
|
|
|
|
if (opts != NULL) {
|
|
|
|
char tbuf[80];
|
|
|
|
|
|
|
|
strcpy(tbuf, "/dev/");
|
2012-11-11 03:26:14 +00:00
|
|
|
strlcat(tbuf, opts, sizeof(tbuf));
|
2011-05-13 04:54:01 +00:00
|
|
|
|
|
|
|
sc->vsc_tapfd = open(tbuf, O_RDWR);
|
|
|
|
if (sc->vsc_tapfd == -1) {
|
|
|
|
WPRINTF(("open of tap device %s failed\n", tbuf));
|
|
|
|
} else {
|
|
|
|
/*
|
|
|
|
* Set non-blocking and register for read
|
|
|
|
* notifications with the event loop
|
|
|
|
*/
|
|
|
|
int opt = 1;
|
|
|
|
if (ioctl(sc->vsc_tapfd, FIONBIO, &opt) < 0) {
|
|
|
|
WPRINTF(("tap device O_NONBLOCK failed\n"));
|
|
|
|
close(sc->vsc_tapfd);
|
|
|
|
sc->vsc_tapfd = -1;
|
|
|
|
}
|
|
|
|
|
|
|
|
sc->vsc_mevp = mevent_add(sc->vsc_tapfd,
|
|
|
|
EVF_READ,
|
|
|
|
pci_vtnet_tap_callback,
|
|
|
|
sc);
|
|
|
|
if (sc->vsc_mevp == NULL) {
|
|
|
|
WPRINTF(("Could not register event\n"));
|
|
|
|
close(sc->vsc_tapfd);
|
|
|
|
sc->vsc_tapfd = -1;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* The MAC address is the standard NetApp OUI of 00-a0-98,
|
2012-12-12 19:25:48 +00:00
|
|
|
* followed by an MD5 of the vm name. The slot/func number is
|
|
|
|
* prepended to this for slots other than 1:0, so that
|
|
|
|
* a bootloader can netboot from the equivalent of slot 1.
|
2011-05-13 04:54:01 +00:00
|
|
|
*/
|
2012-12-12 19:25:48 +00:00
|
|
|
if (pi->pi_slot == 1 && pi->pi_func == 0) {
|
2011-05-13 04:54:01 +00:00
|
|
|
strncpy(nstr, vmname, sizeof(nstr));
|
|
|
|
} else {
|
2012-12-12 19:25:48 +00:00
|
|
|
snprintf(nstr, sizeof(nstr), "%d-%d-%s", pi->pi_slot,
|
|
|
|
pi->pi_func, vmname);
|
2011-05-13 04:54:01 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
MD5Init(&mdctx);
|
|
|
|
MD5Update(&mdctx, nstr, strlen(nstr));
|
|
|
|
MD5Final(digest, &mdctx);
|
|
|
|
|
|
|
|
sc->vsc_macaddr[0] = 0x00;
|
|
|
|
sc->vsc_macaddr[1] = 0xa0;
|
|
|
|
sc->vsc_macaddr[2] = 0x98;
|
|
|
|
sc->vsc_macaddr[3] = digest[0];
|
|
|
|
sc->vsc_macaddr[4] = digest[1];
|
|
|
|
sc->vsc_macaddr[5] = digest[2];
|
|
|
|
|
|
|
|
/* initialize config space */
|
|
|
|
pci_set_cfgdata16(pi, PCIR_DEVICE, VIRTIO_DEV_NET);
|
|
|
|
pci_set_cfgdata16(pi, PCIR_VENDOR, VIRTIO_VENDOR);
|
|
|
|
pci_set_cfgdata8(pi, PCIR_CLASS, PCIC_NETWORK);
|
|
|
|
pci_set_cfgdata16(pi, PCIR_SUBDEV_0, VIRTIO_TYPE_NET);
|
2013-01-30 04:30:36 +00:00
|
|
|
|
|
|
|
if (use_msix) {
|
|
|
|
/* MSI-X support */
|
|
|
|
int i;
|
|
|
|
|
|
|
|
for (i = 0; i < VTNET_MAXQ; i++)
|
|
|
|
sc->vsc_msix_table_idx[i] = VIRTIO_MSI_NO_VECTOR;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* BAR 1 used to map MSI-X table and PBA
|
|
|
|
*/
|
|
|
|
if (pci_emul_add_msixcap(pi, VTNET_MAXQ, 1))
|
|
|
|
return (1);
|
|
|
|
} else {
|
|
|
|
/* MSI support */
|
|
|
|
pci_emul_add_msicap(pi, 1);
|
|
|
|
}
|
|
|
|
|
2012-10-19 18:11:17 +00:00
|
|
|
pci_emul_alloc_bar(pi, 0, PCIBAR_IO, VTNET_REGSZ);
|
2013-04-26 05:13:48 +00:00
|
|
|
|
|
|
|
/*
|
|
|
|
* Initialize tx semaphore & spawn TX processing thread
|
|
|
|
* As of now, only one thread for TX desc processing is
|
|
|
|
* spawned.
|
|
|
|
*/
|
|
|
|
sc->tx_in_progress = 0;
|
|
|
|
sc->resetting = 0;
|
|
|
|
pthread_mutex_init(&sc->tx_mtx, NULL);
|
|
|
|
pthread_cond_init(&sc->tx_cond, NULL);
|
|
|
|
pthread_create(&sc->tx_tid, NULL, pci_vtnet_tx_thread, (void *)sc);
|
|
|
|
snprintf(tname, sizeof(tname), "%s vtnet%d tx", vmname, pi->pi_slot);
|
|
|
|
pthread_set_name_np(sc->tx_tid, tname);
|
2011-05-13 04:54:01 +00:00
|
|
|
|
2013-04-26 05:13:48 +00:00
|
|
|
|
2011-05-13 04:54:01 +00:00
|
|
|
return (0);
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Function pointer array to handle queue notifications
|
|
|
|
*/
|
|
|
|
static void (*pci_vtnet_qnotify[VTNET_MAXQ])(struct pci_vtnet_softc *) = {
|
|
|
|
pci_vtnet_ping_rxq,
|
|
|
|
pci_vtnet_ping_txq,
|
|
|
|
pci_vtnet_ping_ctlq
|
|
|
|
};
|
|
|
|
|
2013-01-30 04:30:36 +00:00
|
|
|
static uint64_t
|
|
|
|
vtnet_adjust_offset(struct pci_devinst *pi, uint64_t offset)
|
|
|
|
{
|
|
|
|
/*
|
|
|
|
* Device specific offsets used by guest would change based on
|
|
|
|
* whether MSI-X capability is enabled or not
|
|
|
|
*/
|
|
|
|
if (!pci_msix_enabled(pi)) {
|
|
|
|
if (offset >= VTCFG_R_MSIX)
|
|
|
|
return (offset + (VTCFG_R_CFG1 - VTCFG_R_MSIX));
|
|
|
|
}
|
|
|
|
|
|
|
|
return (offset);
|
|
|
|
}
|
|
|
|
|
2011-05-13 04:54:01 +00:00
|
|
|
static void
|
2012-10-19 18:11:17 +00:00
|
|
|
pci_vtnet_write(struct vmctx *ctx, int vcpu, struct pci_devinst *pi,
|
|
|
|
int baridx, uint64_t offset, int size, uint64_t value)
|
2011-05-13 04:54:01 +00:00
|
|
|
{
|
|
|
|
struct pci_vtnet_softc *sc = pi->pi_arg;
|
2011-06-07 18:35:45 +00:00
|
|
|
void *ptr;
|
|
|
|
|
2013-01-30 04:30:36 +00:00
|
|
|
if (use_msix) {
|
2013-02-01 02:41:47 +00:00
|
|
|
if (baridx == pci_msix_table_bar(pi) ||
|
|
|
|
baridx == pci_msix_pba_bar(pi)) {
|
2013-01-30 04:30:36 +00:00
|
|
|
pci_emul_msix_twrite(pi, offset, size, value);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2012-10-19 18:11:17 +00:00
|
|
|
assert(baridx == 0);
|
|
|
|
|
2013-01-30 04:30:36 +00:00
|
|
|
if (offset + size > pci_vtnet_iosize(pi)) {
|
2012-10-19 18:11:17 +00:00
|
|
|
DPRINTF(("vtnet_write: 2big, offset %ld size %d\n",
|
2011-05-13 04:54:01 +00:00
|
|
|
offset, size));
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
pthread_mutex_lock(&sc->vsc_mtx);
|
|
|
|
|
2013-01-30 04:30:36 +00:00
|
|
|
offset = vtnet_adjust_offset(pi, offset);
|
|
|
|
|
2011-05-13 04:54:01 +00:00
|
|
|
switch (offset) {
|
|
|
|
case VTCFG_R_GUESTCAP:
|
|
|
|
assert(size == 4);
|
|
|
|
sc->vsc_features = value & VTNET_S_HOSTCAPS;
|
|
|
|
break;
|
|
|
|
case VTCFG_R_PFN:
|
|
|
|
assert(size == 4);
|
|
|
|
pci_vtnet_ring_init(sc, value);
|
|
|
|
break;
|
|
|
|
case VTCFG_R_QSEL:
|
|
|
|
assert(size == 2);
|
|
|
|
assert(value < VTNET_MAXQ);
|
|
|
|
sc->vsc_curq = value;
|
|
|
|
break;
|
|
|
|
case VTCFG_R_QNOTIFY:
|
|
|
|
assert(size == 2);
|
|
|
|
assert(value < VTNET_MAXQ);
|
|
|
|
(*pci_vtnet_qnotify[value])(sc);
|
|
|
|
break;
|
|
|
|
case VTCFG_R_STATUS:
|
|
|
|
assert(size == 1);
|
|
|
|
pci_vtnet_update_status(sc, value);
|
|
|
|
break;
|
2013-01-30 04:30:36 +00:00
|
|
|
case VTCFG_R_CFGVEC:
|
|
|
|
assert(size == 2);
|
|
|
|
sc->vsc_msix_table_idx[VTNET_CTLQ] = value;
|
|
|
|
break;
|
|
|
|
case VTCFG_R_QVEC:
|
|
|
|
assert(size == 2);
|
|
|
|
assert(sc->vsc_curq != VTNET_CTLQ);
|
|
|
|
sc->vsc_msix_table_idx[sc->vsc_curq] = value;
|
|
|
|
break;
|
2011-05-13 04:54:01 +00:00
|
|
|
case VTNET_R_CFG0:
|
|
|
|
case VTNET_R_CFG1:
|
|
|
|
case VTNET_R_CFG2:
|
|
|
|
case VTNET_R_CFG3:
|
|
|
|
case VTNET_R_CFG4:
|
|
|
|
case VTNET_R_CFG5:
|
2011-06-07 18:35:45 +00:00
|
|
|
assert((size + offset) <= (VTNET_R_CFG5 + 1));
|
|
|
|
ptr = &sc->vsc_macaddr[offset - VTNET_R_CFG0];
|
2011-05-13 04:54:01 +00:00
|
|
|
/*
|
|
|
|
* The driver is allowed to change the MAC address
|
|
|
|
*/
|
|
|
|
sc->vsc_macaddr[offset - VTNET_R_CFG0] = value;
|
2011-06-07 18:35:45 +00:00
|
|
|
if (size == 1) {
|
|
|
|
*(uint8_t *) ptr = value;
|
|
|
|
} else if (size == 2) {
|
|
|
|
*(uint16_t *) ptr = value;
|
|
|
|
} else {
|
|
|
|
*(uint32_t *) ptr = value;
|
|
|
|
}
|
2011-05-13 04:54:01 +00:00
|
|
|
break;
|
|
|
|
case VTCFG_R_HOSTCAP:
|
|
|
|
case VTCFG_R_QNUM:
|
|
|
|
case VTCFG_R_ISR:
|
|
|
|
case VTNET_R_CFG6:
|
|
|
|
case VTNET_R_CFG7:
|
2012-10-19 18:11:17 +00:00
|
|
|
DPRINTF(("vtnet: write to readonly reg %ld\n\r", offset));
|
2011-05-13 04:54:01 +00:00
|
|
|
break;
|
|
|
|
default:
|
2012-10-19 18:11:17 +00:00
|
|
|
DPRINTF(("vtnet: unknown i/o write offset %ld\n\r", offset));
|
2011-05-13 04:54:01 +00:00
|
|
|
value = 0;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
pthread_mutex_unlock(&sc->vsc_mtx);
|
|
|
|
}
|
|
|
|
|
2012-10-19 18:11:17 +00:00
|
|
|
uint64_t
|
|
|
|
pci_vtnet_read(struct vmctx *ctx, int vcpu, struct pci_devinst *pi,
|
|
|
|
int baridx, uint64_t offset, int size)
|
2011-05-13 04:54:01 +00:00
|
|
|
{
|
|
|
|
struct pci_vtnet_softc *sc = pi->pi_arg;
|
2011-06-07 18:35:45 +00:00
|
|
|
void *ptr;
|
2012-10-19 18:11:17 +00:00
|
|
|
uint64_t value;
|
|
|
|
|
2013-01-30 04:30:36 +00:00
|
|
|
if (use_msix) {
|
2013-02-01 02:41:47 +00:00
|
|
|
if (baridx == pci_msix_table_bar(pi) ||
|
|
|
|
baridx == pci_msix_pba_bar(pi)) {
|
2013-01-30 04:30:36 +00:00
|
|
|
return (pci_emul_msix_tread(pi, offset, size));
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2012-10-19 18:11:17 +00:00
|
|
|
assert(baridx == 0);
|
2011-05-13 04:54:01 +00:00
|
|
|
|
2013-01-30 04:30:36 +00:00
|
|
|
if (offset + size > pci_vtnet_iosize(pi)) {
|
2012-10-19 18:11:17 +00:00
|
|
|
DPRINTF(("vtnet_read: 2big, offset %ld size %d\n",
|
2011-05-13 04:54:01 +00:00
|
|
|
offset, size));
|
|
|
|
return (0);
|
|
|
|
}
|
|
|
|
|
|
|
|
pthread_mutex_lock(&sc->vsc_mtx);
|
|
|
|
|
2013-01-30 04:30:36 +00:00
|
|
|
offset = vtnet_adjust_offset(pi, offset);
|
|
|
|
|
2011-05-13 04:54:01 +00:00
|
|
|
switch (offset) {
|
|
|
|
case VTCFG_R_HOSTCAP:
|
|
|
|
assert(size == 4);
|
|
|
|
value = VTNET_S_HOSTCAPS;
|
|
|
|
break;
|
|
|
|
case VTCFG_R_GUESTCAP:
|
|
|
|
assert(size == 4);
|
|
|
|
value = sc->vsc_features; /* XXX never read ? */
|
|
|
|
break;
|
|
|
|
case VTCFG_R_PFN:
|
|
|
|
assert(size == 4);
|
|
|
|
value = sc->vsc_pfn[sc->vsc_curq] >> VRING_PFN;
|
|
|
|
break;
|
|
|
|
case VTCFG_R_QNUM:
|
|
|
|
assert(size == 2);
|
|
|
|
value = pci_vtnet_qsize(sc->vsc_curq);
|
|
|
|
break;
|
|
|
|
case VTCFG_R_QSEL:
|
|
|
|
assert(size == 2);
|
|
|
|
value = sc->vsc_curq; /* XXX never read ? */
|
|
|
|
break;
|
|
|
|
case VTCFG_R_QNOTIFY:
|
|
|
|
assert(size == 2);
|
|
|
|
value = sc->vsc_curq; /* XXX never read ? */
|
|
|
|
break;
|
|
|
|
case VTCFG_R_STATUS:
|
|
|
|
assert(size == 1);
|
|
|
|
value = sc->vsc_status;
|
|
|
|
break;
|
|
|
|
case VTCFG_R_ISR:
|
|
|
|
assert(size == 1);
|
|
|
|
value = sc->vsc_isr;
|
|
|
|
sc->vsc_isr = 0; /* a read clears this flag */
|
|
|
|
break;
|
2013-01-30 04:30:36 +00:00
|
|
|
case VTCFG_R_CFGVEC:
|
|
|
|
assert(size == 2);
|
|
|
|
value = sc->vsc_msix_table_idx[VTNET_CTLQ];
|
|
|
|
break;
|
|
|
|
case VTCFG_R_QVEC:
|
|
|
|
assert(size == 2);
|
|
|
|
assert(sc->vsc_curq != VTNET_CTLQ);
|
|
|
|
value = sc->vsc_msix_table_idx[sc->vsc_curq];
|
|
|
|
break;
|
2011-05-13 04:54:01 +00:00
|
|
|
case VTNET_R_CFG0:
|
|
|
|
case VTNET_R_CFG1:
|
|
|
|
case VTNET_R_CFG2:
|
|
|
|
case VTNET_R_CFG3:
|
|
|
|
case VTNET_R_CFG4:
|
|
|
|
case VTNET_R_CFG5:
|
2013-01-30 04:30:36 +00:00
|
|
|
assert((size + offset) <= (VTNET_R_CFG5 + 1));
|
|
|
|
ptr = &sc->vsc_macaddr[offset - VTNET_R_CFG0];
|
|
|
|
if (size == 1) {
|
|
|
|
value = *(uint8_t *) ptr;
|
|
|
|
} else if (size == 2) {
|
|
|
|
value = *(uint16_t *) ptr;
|
|
|
|
} else {
|
|
|
|
value = *(uint32_t *) ptr;
|
|
|
|
}
|
2011-05-13 04:54:01 +00:00
|
|
|
break;
|
|
|
|
case VTNET_R_CFG6:
|
2011-06-07 18:35:45 +00:00
|
|
|
assert(size != 4);
|
|
|
|
value = 0x01; /* XXX link always up */
|
2011-05-13 04:54:01 +00:00
|
|
|
break;
|
|
|
|
case VTNET_R_CFG7:
|
|
|
|
assert(size == 1);
|
2011-06-07 18:35:45 +00:00
|
|
|
value = 0; /* XXX link status in LSB */
|
2011-05-13 04:54:01 +00:00
|
|
|
break;
|
|
|
|
default:
|
2012-10-19 18:11:17 +00:00
|
|
|
DPRINTF(("vtnet: unknown i/o read offset %ld\n\r", offset));
|
2011-05-13 04:54:01 +00:00
|
|
|
value = 0;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
pthread_mutex_unlock(&sc->vsc_mtx);
|
|
|
|
|
|
|
|
return (value);
|
|
|
|
}
|
|
|
|
|
|
|
|
struct pci_devemu pci_de_vnet = {
|
2012-10-19 18:11:17 +00:00
|
|
|
.pe_emu = "virtio-net",
|
|
|
|
.pe_init = pci_vtnet_init,
|
|
|
|
.pe_barwrite = pci_vtnet_write,
|
|
|
|
.pe_barread = pci_vtnet_read
|
2011-05-13 04:54:01 +00:00
|
|
|
};
|
|
|
|
PCI_EMUL_SET(pci_de_vnet);
|