freebsd-nq/usr.sbin/bhyve/Makefile

#
# $FreeBSD$
#

PROG=	bhyve

DEBUG_FLAGS= -g -O0

MAN=	bhyve.8

SRCS=	\
	atkbdc.c		\
	acpi.c			\
	bhyverun.c		\
	block_if.c		\
	bootrom.c		\
	consport.c		\
	dbgport.c		\
	fwctl.c			\
	inout.c			\
	ioapic.c		\
	mem.c			\
	mevent.c		\
	mptbl.c			\
	pci_ahci.c		\
	pci_emul.c		\
	pci_hostbridge.c	\
	pci_irq.c		\
	pci_lpc.c		\
	pci_passthru.c		\
	pci_virtio_block.c	\
	pci_virtio_net.c	\
	pci_virtio_rnd.c	\
	pci_uart.c		\
	pm.c			\
	post.c			\
	rtc.c			\
	smbiostbl.c		\
	task_switch.c		\
	uart_emul.c		\
	virtio.c		\
	xmsr.c			\
	spinup_ap.c

.PATH:	${.CURDIR}/../../sys/amd64/vmm
SRCS+=	vmm_instruction_emul.c

LIBADD=	vmmapi md pthread

WARNS?=	2

.include <bsd.prog.mk>
Import of bhyve hypervisor and utilities, part 1. vmm.ko - kernel module for VT-x, VT-d and hypervisor control bhyve - user-space sequencer and i/o emulation vmmctl - dump of hypervisor register state libvmm - front-end to vmm.ko chardev interface bhyve was designed and implemented by Neel Natu. Thanks to the following folk from NetApp who helped to make this available: Joe CaraDonna Peter Snyder Jeff Heller Sandeep Mann Steve Miller Brian Pawlowski 2011-05-13 04:54:01 +00:00			`#`
			`# $FreeBSD$`
			`#`

			`PROG= bhyve`

Convert usr.sbin to LIBADD Reduce overlinking 2014-11-25 16:57:27 +00:00			`DEBUG_FLAGS= -g -O0`
ACPI support for bhyve. The -A option will create the minimal set of required ACPI tables in guest memory. Since ACPI mandates an IOAPIC, the -I option must also be used. Template ASL files are created, and then passed to the iasl compiler to generate AML files. These are then loaded into guest physical mem. In support of this, the ACPI PM timer is implemented, in 32-bit mode. Tested on 7.4/8./9./10-CURRENT. Reviewed by: neel Obtained from: NetApp Discussed with: jhb (a long while back) 2012-11-20 07:01:26 +00:00
bhyve(8) man page. mdoc formatting and much input and review from Warren Block (wblock@). Reviewed by: many MFC after: 3 days 2013-12-13 08:31:13 +00:00			`MAN= bhyve.8`
Cosmetic change - switch over to vertical SRCS to make it easier to keep files in alpha order. Reviewed by: neel 2014-01-03 19:31:40 +00:00
			`SRCS= \`
Provide a very basic stub for the 8042 PS/2 keyboard controller. Reviewed by: jhb Approved by: neel (co-mentor) 2014-04-25 13:38:18 +00:00			`atkbdc.c \`
Cosmetic change - switch over to vertical SRCS to make it easier to keep files in alpha order. Reviewed by: neel 2014-01-03 19:31:40 +00:00			`acpi.c \`
			`bhyverun.c \`
			`block_if.c \`
Restructure memory allocation in bhyve to support "devmem". devmem is used to represent MMIO devices like the boot ROM or a VESA framebuffer where doing a trap-and-emulate for every access is impractical. devmem is a hybrid of system memory (sysmem) and emulated device models. devmem is mapped in the guest address space via nested page tables similar to sysmem. However the address range where devmem is mapped may be changed by the guest at runtime (e.g. by reprogramming a PCI BAR). Also devmem is usually mapped RO or RW as compared to RWX mappings for sysmem. Each devmem segment is named (e.g. "bootrom") and this name is used to create a device node for the devmem segment (e.g. /dev/vmm/testvm.bootrom). The device node supports mmap(2) and this decouples the host mapping of devmem from its mapping in the guest address space (which can change). Reviewed by: tychon Discussed with: grehan Differential Revision: https://reviews.freebsd.org/D2762 MFC after: 4 weeks 2015-06-18 06:00:17 +00:00			`bootrom.c \`
Cosmetic change - switch over to vertical SRCS to make it easier to keep files in alpha order. Reviewed by: neel 2014-01-03 19:31:40 +00:00			`consport.c \`
			`dbgport.c \`
Simple sysctl-like firmware query interface. Similar in operation to the qemu one, and uses the same i/o ports but with different messaging. Requires the 'bootrom' option to be enabled. This is used by UEFI (and potentially other BIOSs/firmware) to request information from bhyve. Currently, only the number of vCPUs is made available, with more to follow. A very large thankyou to Ben Perrault who helped out testing an earlier version of this, and bhyve/Windows in general. Reviewed by: tychon Discussed with: neel Sponsored by: Nahanni Systems 2015-10-02 21:09:49 +00:00			`fwctl.c \`
Cosmetic change - switch over to vertical SRCS to make it easier to keep files in alpha order. Reviewed by: neel 2014-01-03 19:31:40 +00:00			`inout.c \`
Enhance the support for PCI legacy INTx interrupts and enable them in the virtio backends. - Add a new ioctl to export the count of pins on the I/O APIC from vmm to the hypervisor. - Use pins on the I/O APIC >= 16 for PCI interrupts leaving 0-15 for ISA interrupts. - Populate the MP Table with I/O interrupt entries for any PCI INTx interrupts. - Create a _PRT table under the PCI root bridge in ACPI to route any PCI INTx interrupts appropriately. - Track which INTx interrupts are in use per-slot so that functions that share a slot attempt to distribute their INTx interrupts across the four available pins. - Implicitly mask INTx interrupts if either MSI or MSI-X is enabled and when the INTx DIS bit is set in a function's PCI command register. Either assert or deassert the associated I/O APIC pin when the state of one of those conditions changes. - Add INTx support to the virtio backends. - Always advertise the MSI capability in the virtio backends. Submitted by: neel (7) Reviewed by: neel MFC after: 2 weeks 2014-01-29 14:56:48 +00:00			`ioapic.c \`
Cosmetic change - switch over to vertical SRCS to make it easier to keep files in alpha order. Reviewed by: neel 2014-01-03 19:31:40 +00:00			`mem.c \`
			`mevent.c \`
			`mptbl.c \`
			`pci_ahci.c \`
			`pci_emul.c \`
			`pci_hostbridge.c \`
Implement a PCI interrupt router to route PCI legacy INTx interrupts to the legacy 8259A PICs. - Implement an ICH-comptabile PCI interrupt router on the lpc device with 8 steerable pins configured via config space access to byte-wide registers at 0x60-63 and 0x68-6b. - For each configured PCI INTx interrupt, route it to both an I/O APIC pin and a PCI interrupt router pin. When a PCI INTx interrupt is asserted, ensure that both pins are asserted. - Provide an initial routing of PCI interrupt router (PIRQ) pins to 8259A pins (ISA IRQs) and initialize the interrupt line config register for the corresponding PCI function with the ISA IRQ as this matches existing hardware. - Add a global _PIC method for OSPM to select the desired interrupt routing configuration. - Update the _PRT methods for PCI bridges to provide both APIC and legacy PRT tables and return the appropriate table based on the configured routing configuration. Note that if the lpc device is not configured, no routing information is provided. - When the lpc device is enabled, provide ACPI PCI link devices corresponding to each PIRQ pin. - Add a VMM ioctl to adjust the trigger mode (edge vs level) for 8259A pins via the ELCR. - Mark the power management SCI as level triggered. - Don't hardcode the number of elements in Packages in the source for the DSDT. iasl(8) will fill in the actual number of elements, and this makes it simpler to generate a Package with a variable number of elements. Reviewed by: tycho 2014-05-15 14:16:55 +00:00			`pci_irq.c \`
Cosmetic change - switch over to vertical SRCS to make it easier to keep files in alpha order. Reviewed by: neel 2014-01-03 19:31:40 +00:00			`pci_lpc.c \`
			`pci_passthru.c \`
			`pci_virtio_block.c \`
			`pci_virtio_net.c \`
Add support for the virtio RNG entropy-source device. Call through to /dev/random synchronously to fill virtio buffers with RNG data. Tested with FreeBSD-CURRENT and Ubuntu guests. Submitted by: Leon Dang Discussed with: markm MFC after: 3 weeks Sponsored by: Nahanni Systems 2014-04-02 20:18:17 +00:00			`pci_virtio_rnd.c \`
Cosmetic change - switch over to vertical SRCS to make it easier to keep files in alpha order. Reviewed by: neel 2014-01-03 19:31:40 +00:00			`pci_uart.c \`
			`pm.c \`
			`post.c \`
			`rtc.c \`
Add SMBIOS support. A new option, -U, can be used to set the UUID in the System Information (Type 1) structure. Manpage fix to follow. Approved by: grehan (co-mentor) 2014-03-04 17:12:06 +00:00			`smbiostbl.c \`
Add emulation for legacy x86 task switching mechanism. FreeBSD/i386 uses task switching to handle double fault exceptions and this change enables that to work. Reported by: glebius 2014-07-16 21:26:26 +00:00			`task_switch.c \`
Cosmetic change - switch over to vertical SRCS to make it easier to keep files in alpha order. Reviewed by: neel 2014-01-03 19:31:40 +00:00			`uart_emul.c \`
			`virtio.c \`
			`xmsr.c \`
			`spinup_ap.c`
Import of bhyve hypervisor and utilities, part 1. vmm.ko - kernel module for VT-x, VT-d and hypervisor control bhyve - user-space sequencer and i/o emulation vmmctl - dump of hypervisor register state libvmm - front-end to vmm.ko chardev interface bhyve was designed and implemented by Neel Natu. Thanks to the following folk from NetApp who helped to make this available: Joe CaraDonna Peter Snyder Jeff Heller Sandeep Mann Steve Miller Brian Pawlowski 2011-05-13 04:54:01 +00:00
Revamp the x86 instruction emulation in bhyve. On a nested page table fault the hypervisor will: - fetch the instruction using the guest %rip and %cr3 - decode the instruction in 'struct vie' - emulate the instruction in host kernel context for local apic accesses - any other type of mmio access is punted up to user-space (e.g. ioapic) The decoded instruction is passed as collateral to the user-space process that is handling the PAGING exit. The emulation code is fleshed out to include more addressing modes (e.g. SIB) and more types of operands (e.g. imm8). The source code is unified into a single file (vmm_instruction_emul.c) that is compiled into vmm.ko as well as /usr/sbin/bhyve. Reviewed by: grehan Obtained from: NetApp 2012-11-28 00:02:17 +00:00			`.PATH: ${.CURDIR}/../../sys/amd64/vmm`
			`SRCS+= vmm_instruction_emul.c`

Fix overlinking in bhyve: libvmmapi is actually needed to be linked to libutil, not bhyve nor bhyveload 2015-04-09 21:38:40 +00:00			`LIBADD= vmmapi md pthread`
Import of bhyve hypervisor and utilities, part 1. vmm.ko - kernel module for VT-x, VT-d and hypervisor control bhyve - user-space sequencer and i/o emulation vmmctl - dump of hypervisor register state libvmm - front-end to vmm.ko chardev interface bhyve was designed and implemented by Neel Natu. Thanks to the following folk from NetApp who helped to make this available: Joe CaraDonna Peter Snyder Jeff Heller Sandeep Mann Steve Miller Brian Pawlowski 2011-05-13 04:54:01 +00:00
First cut to port bhyve, vmmctl, and libvmmapi to HEAD. 2011-05-15 04:03:11 +00:00			`WARNS?= 2`

Import of bhyve hypervisor and utilities, part 1. vmm.ko - kernel module for VT-x, VT-d and hypervisor control bhyve - user-space sequencer and i/o emulation vmmctl - dump of hypervisor register state libvmm - front-end to vmm.ko chardev interface bhyve was designed and implemented by Neel Natu. Thanks to the following folk from NetApp who helped to make this available: Joe CaraDonna Peter Snyder Jeff Heller Sandeep Mann Steve Miller Brian Pawlowski 2011-05-13 04:54:01 +00:00			`.include <bsd.prog.mk>`