1997-08-14 13:57:45 +00:00
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/*-
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1998-01-02 09:30:39 +00:00
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* Copyright (c) 1997, 1998 Nicolas Souchu, Michael Smith
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1997-08-14 13:57:45 +00:00
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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1999-05-30 16:53:49 +00:00
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* $Id: ppi.c,v 1.13 1999/04/28 10:51:39 dt Exp $
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1997-08-14 13:57:45 +00:00
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*
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*/
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1997-08-16 14:05:38 +00:00
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#include "ppi.h"
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#if NPPI > 0
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1997-08-14 13:57:45 +00:00
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/conf.h>
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#include <sys/kernel.h>
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1999-01-10 12:04:56 +00:00
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#include <sys/uio.h>
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1997-08-14 13:57:45 +00:00
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#include <sys/malloc.h>
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1998-01-02 09:30:39 +00:00
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#include <sys/fcntl.h>
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1997-08-14 13:57:45 +00:00
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1999-01-10 12:04:56 +00:00
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#include <machine/clock.h>
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1997-08-14 13:57:45 +00:00
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#include <dev/ppbus/ppbconf.h>
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1999-01-10 12:04:56 +00:00
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#include <dev/ppbus/ppb_msq.h>
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#include "opt_ppb_1284.h"
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#ifdef PERIPH_1284
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#include <dev/ppbus/ppb_1284.h>
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#endif
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1998-01-02 09:30:39 +00:00
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#include <dev/ppbus/ppi.h>
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1999-01-10 12:04:56 +00:00
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#define BUFSIZE 512
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1997-08-14 13:57:45 +00:00
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1997-08-16 14:05:38 +00:00
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struct ppi_data {
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1998-01-02 09:30:39 +00:00
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int ppi_unit;
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int ppi_flags;
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#define HAVE_PPBUS (1<<0)
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1999-01-10 12:04:56 +00:00
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#define HAD_PPBUS (1<<1)
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int ppi_count;
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int ppi_mode; /* IEEE1284 mode */
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char ppi_buffer[BUFSIZE];
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1997-08-16 14:05:38 +00:00
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1998-01-02 09:30:39 +00:00
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struct ppb_device ppi_dev;
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1997-08-16 14:05:38 +00:00
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};
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1998-01-02 09:30:39 +00:00
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#define MAXPPI 8 /* XXX not much better! */
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static int nppi = 0;
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static struct ppi_data *ppidata[MAXPPI];
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1997-08-14 13:57:45 +00:00
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/*
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* Make ourselves visible as a ppbus driver
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*/
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static struct ppb_device *ppiprobe(struct ppb_data *ppb);
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static int ppiattach(struct ppb_device *dev);
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static void ppiintr(int unit);
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static struct ppb_driver ppidriver = {
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ppiprobe, ppiattach, "ppi"
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};
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DATA_SET(ppbdriver_set, ppidriver);
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static d_open_t ppiopen;
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static d_close_t ppiclose;
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static d_ioctl_t ppiioctl;
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1999-01-10 12:04:56 +00:00
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static d_write_t ppiwrite;
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static d_read_t ppiread;
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1997-08-14 13:57:45 +00:00
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1997-08-16 14:16:58 +00:00
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#define CDEV_MAJOR 82
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1999-05-30 16:53:49 +00:00
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static struct cdevsw ppi_cdevsw = {
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/* open */ ppiopen,
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/* close */ ppiclose,
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/* read */ ppiread,
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/* write */ ppiwrite,
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/* ioctl */ ppiioctl,
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/* stop */ nostop,
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/* reset */ noreset,
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/* devtotty */ nodevtotty,
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/* poll */ nopoll,
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/* mmap */ nommap,
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/* strategy */ nostrategy,
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/* name */ "ppi",
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/* parms */ noparms,
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/* maj */ CDEV_MAJOR,
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/* dump */ nodump,
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/* psize */ nopsize,
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/* flags */ 0,
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/* maxio */ 0,
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/* bmaj */ -1
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};
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1997-08-14 13:57:45 +00:00
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1999-01-10 12:04:56 +00:00
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#ifdef PERIPH_1284
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static void
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ppi_enable_intr(struct ppi_data *ppi)
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{
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char r;
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r = ppb_rctr(&ppi->ppi_dev);
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ppb_wctr(&ppi->ppi_dev, r | IRQENABLE);
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return;
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}
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static void
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ppi_disable_intr(struct ppi_data *ppi)
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{
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char r;
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r = ppb_rctr(&ppi->ppi_dev);
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ppb_wctr(&ppi->ppi_dev, r & ~IRQENABLE);
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return;
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}
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#endif /* PERIPH_1284 */
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1997-08-14 13:57:45 +00:00
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/*
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* ppiprobe()
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*/
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static struct ppb_device *
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ppiprobe(struct ppb_data *ppb)
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{
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struct ppi_data *ppi;
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ppi = (struct ppi_data *) malloc(sizeof(struct ppi_data),
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M_TEMP, M_NOWAIT);
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if (!ppi) {
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printf("ppi: cannot malloc!\n");
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return 0;
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}
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bzero(ppi, sizeof(struct ppi_data));
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ppidata[nppi] = ppi;
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/*
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* ppi dependent initialisation.
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*/
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ppi->ppi_unit = nppi;
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/*
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* ppbus dependent initialisation.
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*/
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ppi->ppi_dev.id_unit = ppi->ppi_unit;
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ppi->ppi_dev.ppb = ppb;
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ppi->ppi_dev.intr = ppiintr;
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/* Ok, go to next device on next probe */
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nppi ++;
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return &ppi->ppi_dev;
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}
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static int
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ppiattach(struct ppb_device *dev)
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{
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/*
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* Report ourselves
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*/
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printf("ppi%d: <generic parallel i/o> on ppbus %d\n",
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dev->id_unit, dev->ppb->ppb_link->adapter_unit);
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return (1);
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}
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1999-01-10 12:04:56 +00:00
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/*
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* Cable
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* -----
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*
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* Use an IEEE1284 compliant (DB25/DB25) cable with the following tricks:
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*
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* nStrobe <-> nAck 1 <-> 10
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* nAutofd <-> Busy 11 <-> 14
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* nSelectin <-> Select 17 <-> 13
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* nInit <-> nFault 15 <-> 16
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*
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*/
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1997-08-14 13:57:45 +00:00
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static void
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ppiintr(int unit)
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{
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1999-01-10 12:04:56 +00:00
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#ifdef PERIPH_1284
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struct ppi_data *ppi = ppidata[unit];
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ppi_disable_intr(ppi);
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switch (ppi->ppi_dev.ppb->state) {
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/* accept IEEE1284 negociation then wakeup an waiting process to
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* continue negociation at process level */
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case PPB_FORWARD_IDLE:
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/* Event 1 */
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if ((ppb_rstr(&ppi->ppi_dev) & (SELECT | nBUSY)) ==
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(SELECT | nBUSY)) {
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/* IEEE1284 negociation */
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#ifdef DEBUG_1284
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printf("N");
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#endif
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/* Event 2 - prepare for reading the ext. value */
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ppb_wctr(&ppi->ppi_dev, (PCD | STROBE | nINIT) & ~SELECTIN);
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ppi->ppi_dev.ppb->state = PPB_NEGOCIATION;
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} else {
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#ifdef DEBUG_1284
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printf("0x%x", ppb_rstr(&ppi->ppi_dev));
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#endif
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ppb_peripheral_terminate(&ppi->ppi_dev, PPB_DONTWAIT);
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break;
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}
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/* wake up any process waiting for negociation from
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* remote master host */
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/* XXX should set a variable to warn the process about
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* the interrupt */
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wakeup(ppi);
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break;
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default:
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#ifdef DEBUG_1284
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printf("?%d", ppi->ppi_dev.ppb->state);
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#endif
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ppi->ppi_dev.ppb->state = PPB_FORWARD_IDLE;
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ppb_set_mode(&ppi->ppi_dev, PPB_COMPATIBLE);
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break;
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}
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ppi_enable_intr(ppi);
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#endif /* PERIPH_1284 */
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1997-08-14 13:57:45 +00:00
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return;
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}
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static int
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ppiopen(dev_t dev, int flags, int fmt, struct proc *p)
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{
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1997-08-16 14:05:38 +00:00
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u_int unit = minor(dev);
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1998-01-02 09:30:39 +00:00
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struct ppi_data *ppi = ppidata[unit];
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int res;
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1997-08-16 14:05:38 +00:00
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if (unit >= nppi)
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return (ENXIO);
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1999-01-10 12:04:56 +00:00
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if (!(ppi->ppi_flags & HAVE_PPBUS)) {
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if ((res = ppb_request_bus(&ppi->ppi_dev,
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(flags & O_NONBLOCK) ? PPB_DONTWAIT :
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(PPB_WAIT | PPB_INTR))))
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1998-01-02 09:30:39 +00:00
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return (res);
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1997-08-16 14:05:38 +00:00
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1999-01-10 12:04:56 +00:00
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ppi->ppi_flags |= HAVE_PPBUS;
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}
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ppi->ppi_count += 1;
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1998-01-02 09:30:39 +00:00
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return (0);
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1997-08-14 13:57:45 +00:00
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}
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static int
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ppiclose(dev_t dev, int flags, int fmt, struct proc *p)
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{
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1998-01-02 09:30:39 +00:00
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u_int unit = minor(dev);
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struct ppi_data *ppi = ppidata[unit];
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1999-01-10 12:04:56 +00:00
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ppi->ppi_count --;
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if (!ppi->ppi_count) {
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#ifdef PERIPH_1284
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switch (ppi->ppi_dev.ppb->state) {
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case PPB_PERIPHERAL_IDLE:
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ppb_peripheral_terminate(&ppi->ppi_dev, 0);
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break;
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case PPB_REVERSE_IDLE:
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case PPB_EPP_IDLE:
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case PPB_ECP_FORWARD_IDLE:
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default:
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ppb_1284_terminate(&ppi->ppi_dev);
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break;
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}
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#endif /* PERIPH_1284 */
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1998-01-02 09:30:39 +00:00
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ppb_release_bus(&ppi->ppi_dev);
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1999-01-10 12:04:56 +00:00
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ppi->ppi_flags &= ~HAVE_PPBUS;
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}
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1998-01-02 09:30:39 +00:00
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return (0);
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1997-08-14 13:57:45 +00:00
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}
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1999-01-10 12:04:56 +00:00
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/*
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* ppiread()
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*
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* IEEE1284 compliant read.
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*
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* First, try negociation to BYTE then NIBBLE mode
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* If no data is available, wait for it otherwise transfer as much as possible
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*/
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static int
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ppiread(dev_t dev, struct uio *uio, int ioflag)
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{
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#ifdef PERIPH_1284
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u_int unit = minor(dev);
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struct ppi_data *ppi = ppidata[unit];
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int len, error = 0;
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switch (ppi->ppi_dev.ppb->state) {
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case PPB_PERIPHERAL_IDLE:
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ppb_peripheral_terminate(&ppi->ppi_dev, 0);
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/* fall throught */
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case PPB_FORWARD_IDLE:
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/* if can't negociate NIBBLE mode then try BYTE mode,
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* the peripheral may be a computer
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*/
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if ((ppb_1284_negociate(&ppi->ppi_dev,
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ppi->ppi_mode = PPB_NIBBLE, 0))) {
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/* XXX Wait 2 seconds to let the remote host some
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* time to terminate its interrupt
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*/
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tsleep(ppi, PPBPRI, "ppiread", 2*hz);
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if ((error = ppb_1284_negociate(&ppi->ppi_dev,
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ppi->ppi_mode = PPB_BYTE, 0)))
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return (error);
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}
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break;
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case PPB_REVERSE_IDLE:
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case PPB_EPP_IDLE:
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|
|
case PPB_ECP_FORWARD_IDLE:
|
|
|
|
default:
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
#ifdef DEBUG_1284
|
|
|
|
printf("N");
|
|
|
|
#endif
|
|
|
|
/* read data */
|
|
|
|
len = 0;
|
|
|
|
while (uio->uio_resid) {
|
|
|
|
if ((error = ppb_1284_read(&ppi->ppi_dev, ppi->ppi_mode,
|
|
|
|
ppi->ppi_buffer, min(BUFSIZE, uio->uio_resid),
|
|
|
|
&len))) {
|
|
|
|
goto error;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (!len)
|
|
|
|
goto error; /* no more data */
|
|
|
|
|
|
|
|
#ifdef DEBUG_1284
|
|
|
|
printf("d");
|
|
|
|
#endif
|
|
|
|
if ((error = uiomove(ppi->ppi_buffer, len, uio)))
|
|
|
|
goto error;
|
|
|
|
}
|
|
|
|
|
|
|
|
error:
|
|
|
|
|
|
|
|
#else /* PERIPH_1284 */
|
|
|
|
int error = ENODEV;
|
|
|
|
#endif
|
|
|
|
|
|
|
|
return (error);
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* ppiwrite()
|
|
|
|
*
|
|
|
|
* IEEE1284 compliant write
|
|
|
|
*
|
|
|
|
* Actually, this is the peripheral side of a remote IEEE1284 read
|
|
|
|
*
|
|
|
|
* The first part of the negociation (IEEE1284 device detection) is
|
|
|
|
* done at interrupt level, then the remaining is done by the writing
|
|
|
|
* process
|
|
|
|
*
|
|
|
|
* Once negociation done, transfer data
|
|
|
|
*/
|
|
|
|
static int
|
|
|
|
ppiwrite(dev_t dev, struct uio *uio, int ioflag)
|
|
|
|
{
|
|
|
|
#ifdef PERIPH_1284
|
|
|
|
u_int unit = minor(dev);
|
|
|
|
struct ppi_data *ppi = ppidata[unit];
|
|
|
|
struct ppb_data *ppb = ppi->ppi_dev.ppb;
|
|
|
|
int len, error = 0, sent;
|
|
|
|
|
|
|
|
#if 0
|
|
|
|
int ret;
|
|
|
|
|
|
|
|
#define ADDRESS MS_PARAM(0, 0, MS_TYP_PTR)
|
|
|
|
#define LENGTH MS_PARAM(0, 1, MS_TYP_INT)
|
|
|
|
|
|
|
|
struct ppb_microseq msq[] = {
|
|
|
|
{ MS_OP_PUT, { MS_UNKNOWN, MS_UNKNOWN, MS_UNKNOWN } },
|
|
|
|
MS_RET(0)
|
|
|
|
};
|
|
|
|
|
|
|
|
/* negociate ECP mode */
|
|
|
|
if (ppb_1284_negociate(&ppi->ppi_dev, PPB_ECP, 0)) {
|
|
|
|
printf("ppiwrite: ECP negociation failed\n");
|
|
|
|
}
|
|
|
|
|
|
|
|
while (!error && (len = min(uio->uio_resid, BUFSIZE))) {
|
|
|
|
uiomove(ppi->ppi_buffer, len, uio);
|
|
|
|
|
|
|
|
ppb_MS_init_msq(msq, 2, ADDRESS, ppi->ppi_buffer, LENGTH, len);
|
|
|
|
|
|
|
|
error = ppb_MS_microseq(&ppi->ppi_dev, msq, &ret);
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
|
|
|
/* we have to be peripheral to be able to send data, so
|
|
|
|
* wait for the appropriate state
|
|
|
|
*/
|
|
|
|
if (ppb->state < PPB_PERIPHERAL_NEGOCIATION)
|
|
|
|
ppb_1284_terminate(&ppi->ppi_dev);
|
|
|
|
|
|
|
|
while (ppb->state != PPB_PERIPHERAL_IDLE) {
|
|
|
|
/* XXX should check a variable before sleeping */
|
|
|
|
#ifdef DEBUG_1284
|
|
|
|
printf("s");
|
|
|
|
#endif
|
|
|
|
|
|
|
|
ppi_enable_intr(ppi);
|
|
|
|
|
|
|
|
/* sleep until IEEE1284 negociation starts */
|
|
|
|
error = tsleep(ppi, PCATCH | PPBPRI, "ppiwrite", 0);
|
|
|
|
|
|
|
|
switch (error) {
|
|
|
|
case 0:
|
|
|
|
/* negociate peripheral side with BYTE mode */
|
|
|
|
ppb_peripheral_negociate(&ppi->ppi_dev, PPB_BYTE, 0);
|
|
|
|
break;
|
|
|
|
case EWOULDBLOCK:
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
goto error;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
#ifdef DEBUG_1284
|
|
|
|
printf("N");
|
|
|
|
#endif
|
|
|
|
|
|
|
|
/* negociation done, write bytes to master host */
|
1999-01-27 21:50:00 +00:00
|
|
|
while ((len = min(uio->uio_resid, BUFSIZE)) != 0) {
|
1999-01-10 12:04:56 +00:00
|
|
|
uiomove(ppi->ppi_buffer, len, uio);
|
|
|
|
if ((error = byte_peripheral_write(&ppi->ppi_dev,
|
|
|
|
ppi->ppi_buffer, len, &sent)))
|
|
|
|
goto error;
|
|
|
|
#ifdef DEBUG_1284
|
|
|
|
printf("d");
|
|
|
|
#endif
|
|
|
|
}
|
|
|
|
|
|
|
|
error:
|
|
|
|
|
|
|
|
#else /* PERIPH_1284 */
|
|
|
|
int error = ENODEV;
|
|
|
|
#endif
|
|
|
|
|
|
|
|
return (error);
|
|
|
|
}
|
|
|
|
|
1997-08-14 13:57:45 +00:00
|
|
|
static int
|
1998-06-07 17:13:14 +00:00
|
|
|
ppiioctl(dev_t dev, u_long cmd, caddr_t data, int flags, struct proc *p)
|
1997-08-14 13:57:45 +00:00
|
|
|
{
|
1998-01-02 09:30:39 +00:00
|
|
|
u_int unit = minor(dev);
|
|
|
|
struct ppi_data *ppi = ppidata[unit];
|
|
|
|
int error = 0;
|
|
|
|
u_int8_t *val = (u_int8_t *)data;
|
|
|
|
|
|
|
|
switch (cmd) {
|
|
|
|
|
|
|
|
case PPIGDATA: /* get data register */
|
|
|
|
*val = ppb_rdtr(&ppi->ppi_dev);
|
|
|
|
break;
|
|
|
|
case PPIGSTATUS: /* get status bits */
|
|
|
|
*val = ppb_rstr(&ppi->ppi_dev);
|
|
|
|
break;
|
|
|
|
case PPIGCTRL: /* get control bits */
|
|
|
|
*val = ppb_rctr(&ppi->ppi_dev);
|
|
|
|
break;
|
1999-01-30 15:35:39 +00:00
|
|
|
case PPIGEPPD: /* get EPP data bits */
|
|
|
|
*val = ppb_repp_D(&ppi->ppi_dev);
|
1998-01-02 09:30:39 +00:00
|
|
|
break;
|
|
|
|
case PPIGECR: /* get ECP bits */
|
|
|
|
*val = ppb_recr(&ppi->ppi_dev);
|
|
|
|
break;
|
|
|
|
case PPIGFIFO: /* read FIFO */
|
|
|
|
*val = ppb_rfifo(&ppi->ppi_dev);
|
|
|
|
break;
|
|
|
|
|
|
|
|
case PPISDATA: /* set data register */
|
|
|
|
ppb_wdtr(&ppi->ppi_dev, *val);
|
|
|
|
break;
|
|
|
|
case PPISSTATUS: /* set status bits */
|
|
|
|
ppb_wstr(&ppi->ppi_dev, *val);
|
|
|
|
break;
|
|
|
|
case PPISCTRL: /* set control bits */
|
|
|
|
ppb_wctr(&ppi->ppi_dev, *val);
|
|
|
|
break;
|
1999-01-30 15:35:39 +00:00
|
|
|
case PPISEPPD: /* set EPP data bits */
|
|
|
|
ppb_wepp_D(&ppi->ppi_dev, *val);
|
1998-01-02 09:30:39 +00:00
|
|
|
break;
|
|
|
|
case PPISECR: /* set ECP bits */
|
|
|
|
ppb_wecr(&ppi->ppi_dev, *val);
|
|
|
|
break;
|
|
|
|
case PPISFIFO: /* write FIFO */
|
|
|
|
ppb_wfifo(&ppi->ppi_dev, *val);
|
|
|
|
break;
|
1999-01-30 15:35:39 +00:00
|
|
|
|
|
|
|
case PPIGEPPA: /* get EPP address bits */
|
|
|
|
*val = ppb_repp_A(&ppi->ppi_dev);
|
|
|
|
break;
|
|
|
|
case PPISEPPA: /* set EPP address bits */
|
|
|
|
ppb_wepp_A(&ppi->ppi_dev, *val);
|
|
|
|
break;
|
1998-01-02 09:30:39 +00:00
|
|
|
default:
|
|
|
|
error = ENOTTY;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
return (error);
|
1997-08-14 13:57:45 +00:00
|
|
|
}
|
|
|
|
|
1999-04-28 10:54:24 +00:00
|
|
|
static int ppi_devsw_installed;
|
1997-08-14 13:57:45 +00:00
|
|
|
|
1997-08-16 14:05:38 +00:00
|
|
|
static void ppi_drvinit(void *unused)
|
1997-08-14 13:57:45 +00:00
|
|
|
{
|
|
|
|
dev_t dev;
|
|
|
|
|
1997-08-16 14:05:38 +00:00
|
|
|
if (!ppi_devsw_installed ) {
|
1997-08-14 13:57:45 +00:00
|
|
|
dev = makedev(CDEV_MAJOR, 0);
|
|
|
|
cdevsw_add(&dev, &ppi_cdevsw, NULL);
|
|
|
|
ppi_devsw_installed = 1;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
1997-08-16 14:05:38 +00:00
|
|
|
SYSINIT(ppidev,SI_SUB_DRIVERS,SI_ORDER_MIDDLE+CDEV_MAJOR,ppi_drvinit,NULL)
|
|
|
|
|
|
|
|
#endif /* NPPI */
|