2000-10-28 06:59:48 +00:00
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/*-
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* Copyright (c) 2000 Michael Smith
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* Copyright (c) 2000 BSDi
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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2005-03-02 09:22:34 +00:00
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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2000-10-28 06:59:48 +00:00
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#include "opt_acpi.h"
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#include <sys/param.h>
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#include <sys/bus.h>
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2001-07-05 07:20:51 +00:00
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#include <sys/kernel.h>
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2011-07-15 21:08:58 +00:00
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#include <sys/limits.h>
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2004-05-28 16:38:37 +00:00
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#include <sys/malloc.h>
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2004-05-30 20:08:47 +00:00
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#include <sys/module.h>
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2011-05-03 17:37:24 +00:00
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#include <sys/rman.h>
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2004-10-11 21:10:23 +00:00
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#include <sys/sysctl.h>
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2000-10-28 06:59:48 +00:00
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2009-06-05 18:44:36 +00:00
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#include <contrib/dev/acpica/include/acpi.h>
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#include <contrib/dev/acpica/include/accommon.h>
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2000-10-28 06:59:48 +00:00
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#include <dev/acpica/acpivar.h>
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#include <machine/pci_cfgreg.h>
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2003-08-22 06:06:16 +00:00
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#include <dev/pci/pcivar.h>
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#include <dev/pci/pcib_private.h>
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2000-10-28 06:59:48 +00:00
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#include "pcib_if.h"
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2002-08-26 18:30:27 +00:00
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#include <dev/acpica/acpi_pcibvar.h>
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2004-05-28 16:38:37 +00:00
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/* Hooks for the ACPI CA debugging infrastructure. */
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2001-06-29 20:32:29 +00:00
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#define _COMPONENT ACPI_BUS
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2002-08-26 18:30:27 +00:00
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ACPI_MODULE_NAME("PCI_ACPI")
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2000-12-08 09:16:20 +00:00
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2002-08-26 18:30:27 +00:00
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struct acpi_hpcib_softc {
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2000-10-28 06:59:48 +00:00
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device_t ap_dev;
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ACPI_HANDLE ap_handle;
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2004-06-30 16:08:03 +00:00
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int ap_flags;
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2000-10-28 06:59:48 +00:00
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2012-03-29 19:03:22 +00:00
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int ap_segment; /* PCI domain */
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2000-10-28 06:59:48 +00:00
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int ap_bus; /* bios-assigned bus number */
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2012-03-29 19:03:22 +00:00
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int ap_addr; /* device/func of PCI-Host bridge */
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2001-07-05 07:20:51 +00:00
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ACPI_BUFFER ap_prt; /* interrupt routing table */
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2011-07-15 21:08:58 +00:00
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#ifdef NEW_PCIB
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struct pcib_host_resources ap_host_res;
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#endif
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2000-10-28 06:59:48 +00:00
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};
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2002-08-26 18:30:27 +00:00
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static int acpi_pcib_acpi_probe(device_t bus);
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static int acpi_pcib_acpi_attach(device_t bus);
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2004-05-28 16:38:37 +00:00
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static int acpi_pcib_read_ivar(device_t dev, device_t child,
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int which, uintptr_t *result);
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static int acpi_pcib_write_ivar(device_t dev, device_t child,
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int which, uintptr_t value);
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2009-02-05 18:40:42 +00:00
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static uint32_t acpi_pcib_read_config(device_t dev, u_int bus,
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u_int slot, u_int func, u_int reg, int bytes);
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static void acpi_pcib_write_config(device_t dev, u_int bus,
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u_int slot, u_int func, u_int reg, uint32_t data,
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int bytes);
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2002-08-26 18:30:27 +00:00
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static int acpi_pcib_acpi_route_interrupt(device_t pcib,
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2004-05-28 16:38:37 +00:00
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device_t dev, int pin);
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2006-12-12 19:27:01 +00:00
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static int acpi_pcib_alloc_msi(device_t pcib, device_t dev,
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int count, int maxcount, int *irqs);
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2007-05-02 17:50:36 +00:00
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static int acpi_pcib_map_msi(device_t pcib, device_t dev,
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int irq, uint64_t *addr, uint32_t *data);
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2006-12-12 19:27:01 +00:00
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static int acpi_pcib_alloc_msix(device_t pcib, device_t dev,
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2007-05-02 17:50:36 +00:00
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int *irq);
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2004-04-09 15:44:34 +00:00
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static struct resource *acpi_pcib_acpi_alloc_resource(device_t dev,
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2004-10-31 15:02:53 +00:00
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device_t child, int type, int *rid,
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2004-04-09 15:44:34 +00:00
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u_long start, u_long end, u_long count,
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u_int flags);
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2011-07-15 21:08:58 +00:00
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#ifdef NEW_PCIB
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static int acpi_pcib_acpi_adjust_resource(device_t dev,
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device_t child, int type, struct resource *r,
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u_long start, u_long end);
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#endif
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2000-10-28 06:59:48 +00:00
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2002-08-26 18:30:27 +00:00
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static device_method_t acpi_pcib_acpi_methods[] = {
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2000-10-28 06:59:48 +00:00
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/* Device interface */
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2002-08-26 18:30:27 +00:00
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DEVMETHOD(device_probe, acpi_pcib_acpi_probe),
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DEVMETHOD(device_attach, acpi_pcib_acpi_attach),
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2000-10-28 06:59:48 +00:00
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DEVMETHOD(device_shutdown, bus_generic_shutdown),
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DEVMETHOD(device_suspend, bus_generic_suspend),
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2010-08-05 16:10:12 +00:00
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DEVMETHOD(device_resume, bus_generic_resume),
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2000-10-28 06:59:48 +00:00
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/* Bus interface */
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DEVMETHOD(bus_read_ivar, acpi_pcib_read_ivar),
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DEVMETHOD(bus_write_ivar, acpi_pcib_write_ivar),
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2004-04-09 15:44:34 +00:00
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DEVMETHOD(bus_alloc_resource, acpi_pcib_acpi_alloc_resource),
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2011-07-15 21:08:58 +00:00
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#ifdef NEW_PCIB
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DEVMETHOD(bus_adjust_resource, acpi_pcib_acpi_adjust_resource),
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#else
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2011-05-02 14:13:12 +00:00
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DEVMETHOD(bus_adjust_resource, bus_generic_adjust_resource),
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2011-07-15 21:08:58 +00:00
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#endif
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2000-10-28 06:59:48 +00:00
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DEVMETHOD(bus_release_resource, bus_generic_release_resource),
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DEVMETHOD(bus_activate_resource, bus_generic_activate_resource),
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2004-10-31 15:02:53 +00:00
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DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource),
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2000-10-28 06:59:48 +00:00
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DEVMETHOD(bus_setup_intr, bus_generic_setup_intr),
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DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr),
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/* pcib interface */
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2002-08-26 18:30:27 +00:00
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DEVMETHOD(pcib_maxslots, pcib_maxslots),
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2000-10-28 06:59:48 +00:00
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DEVMETHOD(pcib_read_config, acpi_pcib_read_config),
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DEVMETHOD(pcib_write_config, acpi_pcib_write_config),
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2002-08-26 18:30:27 +00:00
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DEVMETHOD(pcib_route_interrupt, acpi_pcib_acpi_route_interrupt),
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2006-12-12 19:27:01 +00:00
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DEVMETHOD(pcib_alloc_msi, acpi_pcib_alloc_msi),
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First cut at MI support for PCI Message Signalled Interrupts (MSI):
- Add 3 new functions to the pci_if interface along with suitable wrappers
to provide the device driver visible API:
- pci_alloc_msi(dev, int *count) backed by PCI_ALLOC_MSI(). '*count'
here is an in and out parameter. The driver stores the desired number
of messages in '*count' before calling the function. On success,
'*count' holds the number of messages allocated to the device. Also on
success, the driver can access the messages as SYS_RES_IRQ resources
starting at rid 1. Note that the legacy INTx interrupt resource will
not be available when using MSI. Note that this function will allocate
either MSI or MSI-X messages depending on the devices capabilities and
the 'hw.pci.enable_msix' and 'hw.pci.enable_msi' tunables. Also note
that the driver should activate the memory resource that holds the
MSI-X table and pending bit array (PBA) before calling this function
if the device supports MSI-X.
- pci_release_msi(dev) backed by PCI_RELEASE_MSI(). This function
releases the messages allocated for this device. All of the
SYS_RES_IRQ resources need to be released for this function to succeed.
- pci_msi_count(dev) backed by PCI_MSI_COUNT(). This function returns
the maximum number of MSI or MSI-X messages supported by this device.
MSI-X is preferred if present, but this function will honor the
'hw.pci.enable_msix' and 'hw.pci.enable_msi' tunables. This function
should return the largest value that pci_alloc_msi() can return
(assuming the MD code is able to allocate sufficient backing resources
for all of the messages).
- Add default implementations for these 3 methods to the pci_driver generic
PCI bus driver. (The various other PCI bus drivers such as for ACPI and
OFW will inherit these default implementations.) This default
implementation depends on 4 new pcib_if methods that bubble up through
the PCI bridges to the MD code to allocate IRQ values and perform any
needed MD setup code needed:
- PCIB_ALLOC_MSI() attempts to allocate a group of MSI messages.
- PCIB_RELEASE_MSI() releases a group of MSI messages.
- PCIB_ALLOC_MSIX() attempts to allocate a single MSI-X message.
- PCIB_RELEASE_MSIX() releases a single MSI-X message.
- Add default implementations for these 4 methods that just pass the
request up to the parent bus's parent bridge driver and use the
default implementation in the various MI PCI bridge drivers.
- Add MI functions for use by MD code when managing MSI and MSI-X
interrupts:
- pci_enable_msi(dev, address, data) programs the MSI capability address
and data registers for a group of MSI messages
- pci_enable_msix(dev, index, address, data) initializes a single MSI-X
message in the MSI-X table
- pci_mask_msix(dev, index) masks a single MSI-X message
- pci_unmask_msix(dev, index) unmasks a single MSI-X message
- pci_pending_msix(dev, index) returns true if the specified MSI-X
message is currently pending
- Save the MSI capability address and data registers in the pci_cfgreg
block in a PCI devices ivars and restore the values when a device is
resumed. Note that the MSI-X table is not currently restored during
resume.
- Add constants for MSI-X register offsets and fields.
- Record interesting data about any MSI-X capability blocks we come
across in the pci_cfgreg block in the ivars for PCI devices.
Tested on: em (i386, MSI), bce (amd64/i386, MSI), mpt (amd64, MSI-X)
Reviewed by: scottl, grehan, jfv
MFC after: 2 months
2006-11-13 21:47:30 +00:00
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DEVMETHOD(pcib_release_msi, pcib_release_msi),
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2006-12-12 19:27:01 +00:00
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DEVMETHOD(pcib_alloc_msix, acpi_pcib_alloc_msix),
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First cut at MI support for PCI Message Signalled Interrupts (MSI):
- Add 3 new functions to the pci_if interface along with suitable wrappers
to provide the device driver visible API:
- pci_alloc_msi(dev, int *count) backed by PCI_ALLOC_MSI(). '*count'
here is an in and out parameter. The driver stores the desired number
of messages in '*count' before calling the function. On success,
'*count' holds the number of messages allocated to the device. Also on
success, the driver can access the messages as SYS_RES_IRQ resources
starting at rid 1. Note that the legacy INTx interrupt resource will
not be available when using MSI. Note that this function will allocate
either MSI or MSI-X messages depending on the devices capabilities and
the 'hw.pci.enable_msix' and 'hw.pci.enable_msi' tunables. Also note
that the driver should activate the memory resource that holds the
MSI-X table and pending bit array (PBA) before calling this function
if the device supports MSI-X.
- pci_release_msi(dev) backed by PCI_RELEASE_MSI(). This function
releases the messages allocated for this device. All of the
SYS_RES_IRQ resources need to be released for this function to succeed.
- pci_msi_count(dev) backed by PCI_MSI_COUNT(). This function returns
the maximum number of MSI or MSI-X messages supported by this device.
MSI-X is preferred if present, but this function will honor the
'hw.pci.enable_msix' and 'hw.pci.enable_msi' tunables. This function
should return the largest value that pci_alloc_msi() can return
(assuming the MD code is able to allocate sufficient backing resources
for all of the messages).
- Add default implementations for these 3 methods to the pci_driver generic
PCI bus driver. (The various other PCI bus drivers such as for ACPI and
OFW will inherit these default implementations.) This default
implementation depends on 4 new pcib_if methods that bubble up through
the PCI bridges to the MD code to allocate IRQ values and perform any
needed MD setup code needed:
- PCIB_ALLOC_MSI() attempts to allocate a group of MSI messages.
- PCIB_RELEASE_MSI() releases a group of MSI messages.
- PCIB_ALLOC_MSIX() attempts to allocate a single MSI-X message.
- PCIB_RELEASE_MSIX() releases a single MSI-X message.
- Add default implementations for these 4 methods that just pass the
request up to the parent bus's parent bridge driver and use the
default implementation in the various MI PCI bridge drivers.
- Add MI functions for use by MD code when managing MSI and MSI-X
interrupts:
- pci_enable_msi(dev, address, data) programs the MSI capability address
and data registers for a group of MSI messages
- pci_enable_msix(dev, index, address, data) initializes a single MSI-X
message in the MSI-X table
- pci_mask_msix(dev, index) masks a single MSI-X message
- pci_unmask_msix(dev, index) unmasks a single MSI-X message
- pci_pending_msix(dev, index) returns true if the specified MSI-X
message is currently pending
- Save the MSI capability address and data registers in the pci_cfgreg
block in a PCI devices ivars and restore the values when a device is
resumed. Note that the MSI-X table is not currently restored during
resume.
- Add constants for MSI-X register offsets and fields.
- Record interesting data about any MSI-X capability blocks we come
across in the pci_cfgreg block in the ivars for PCI devices.
Tested on: em (i386, MSI), bce (amd64/i386, MSI), mpt (amd64, MSI-X)
Reviewed by: scottl, grehan, jfv
MFC after: 2 months
2006-11-13 21:47:30 +00:00
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DEVMETHOD(pcib_release_msix, pcib_release_msix),
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2007-05-02 17:50:36 +00:00
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DEVMETHOD(pcib_map_msi, acpi_pcib_map_msi),
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2010-08-17 15:44:52 +00:00
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DEVMETHOD(pcib_power_for_sleep, acpi_pcib_power_for_sleep),
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2000-10-28 06:59:48 +00:00
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2011-11-22 21:28:20 +00:00
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DEVMETHOD_END
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2000-10-28 06:59:48 +00:00
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};
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2006-01-06 19:22:19 +00:00
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static devclass_t pcib_devclass;
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2000-10-28 06:59:48 +00:00
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2006-01-06 19:22:19 +00:00
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DEFINE_CLASS_0(pcib, acpi_pcib_acpi_driver, acpi_pcib_acpi_methods,
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sizeof(struct acpi_hpcib_softc));
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2002-08-26 18:30:27 +00:00
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DRIVER_MODULE(acpi_pcib, acpi, acpi_pcib_acpi_driver, pcib_devclass, 0, 0);
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2004-04-09 18:14:32 +00:00
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MODULE_DEPEND(acpi_pcib, acpi, 1, 1, 1);
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2000-10-28 06:59:48 +00:00
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static int
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2002-08-26 18:30:27 +00:00
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acpi_pcib_acpi_probe(device_t dev)
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2000-10-28 06:59:48 +00:00
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{
|
2009-09-11 22:49:34 +00:00
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ACPI_DEVICE_INFO *devinfo;
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ACPI_HANDLE h;
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int root;
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2000-10-28 06:59:48 +00:00
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2009-09-11 22:49:34 +00:00
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if (acpi_disabled("pcib") || (h = acpi_get_handle(dev)) == NULL ||
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ACPI_FAILURE(AcpiGetObjectInfo(h, &devinfo)))
|
2004-06-29 19:02:27 +00:00
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return (ENXIO);
|
2009-09-11 22:49:34 +00:00
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root = (devinfo->Flags & ACPI_PCI_ROOT_BRIDGE) != 0;
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AcpiOsFree(devinfo);
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if (!root || pci_cfgregopen() == 0)
|
2004-06-29 19:02:27 +00:00
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return (ENXIO);
|
2009-09-11 22:49:34 +00:00
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2004-06-29 19:02:27 +00:00
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device_set_desc(dev, "ACPI Host-PCI bridge");
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return (0);
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2000-10-28 06:59:48 +00:00
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}
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|
2011-07-15 21:08:58 +00:00
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#ifdef NEW_PCIB
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static ACPI_STATUS
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acpi_pcib_producer_handler(ACPI_RESOURCE *res, void *context)
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{
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struct acpi_hpcib_softc *sc;
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UINT64 length, min, max;
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u_int flags;
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int error, type;
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sc = context;
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switch (res->Type) {
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case ACPI_RESOURCE_TYPE_START_DEPENDENT:
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case ACPI_RESOURCE_TYPE_END_DEPENDENT:
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panic("host bridge has depenedent resources");
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case ACPI_RESOURCE_TYPE_ADDRESS16:
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case ACPI_RESOURCE_TYPE_ADDRESS32:
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case ACPI_RESOURCE_TYPE_ADDRESS64:
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case ACPI_RESOURCE_TYPE_EXTENDED_ADDRESS64:
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if (res->Data.Address.ProducerConsumer != ACPI_PRODUCER)
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break;
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switch (res->Type) {
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case ACPI_RESOURCE_TYPE_ADDRESS16:
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min = res->Data.Address16.Minimum;
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max = res->Data.Address16.Maximum;
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length = res->Data.Address16.AddressLength;
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break;
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case ACPI_RESOURCE_TYPE_ADDRESS32:
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|
|
min = res->Data.Address32.Minimum;
|
|
|
|
max = res->Data.Address32.Maximum;
|
|
|
|
length = res->Data.Address32.AddressLength;
|
|
|
|
break;
|
|
|
|
case ACPI_RESOURCE_TYPE_ADDRESS64:
|
|
|
|
min = res->Data.Address64.Minimum;
|
|
|
|
max = res->Data.Address64.Maximum;
|
|
|
|
length = res->Data.Address64.AddressLength;
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
KASSERT(res->Type ==
|
|
|
|
ACPI_RESOURCE_TYPE_EXTENDED_ADDRESS64,
|
|
|
|
("should never happen"));
|
|
|
|
min = res->Data.ExtAddress64.Minimum;
|
|
|
|
max = res->Data.ExtAddress64.Maximum;
|
|
|
|
length = res->Data.ExtAddress64.AddressLength;
|
|
|
|
break;
|
|
|
|
}
|
2011-07-21 20:43:43 +00:00
|
|
|
if (length == 0)
|
|
|
|
break;
|
|
|
|
if (min + length - 1 != max &&
|
|
|
|
(res->Data.Address.MinAddressFixed != ACPI_ADDRESS_FIXED ||
|
|
|
|
res->Data.Address.MaxAddressFixed != ACPI_ADDRESS_FIXED))
|
2011-07-15 21:08:58 +00:00
|
|
|
break;
|
|
|
|
flags = 0;
|
|
|
|
switch (res->Data.Address.ResourceType) {
|
|
|
|
case ACPI_MEMORY_RANGE:
|
|
|
|
type = SYS_RES_MEMORY;
|
|
|
|
if (res->Type != ACPI_RESOURCE_TYPE_EXTENDED_ADDRESS64) {
|
|
|
|
if (res->Data.Address.Info.Mem.Caching ==
|
|
|
|
ACPI_PREFETCHABLE_MEMORY)
|
|
|
|
flags |= RF_PREFETCHABLE;
|
|
|
|
} else {
|
|
|
|
/*
|
|
|
|
* XXX: Parse prefetch flag out of
|
|
|
|
* TypeSpecific.
|
|
|
|
*/
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
case ACPI_IO_RANGE:
|
|
|
|
type = SYS_RES_IOPORT;
|
|
|
|
break;
|
|
|
|
#ifdef PCI_RES_BUS
|
|
|
|
case ACPI_BUS_NUMBER_RANGE:
|
|
|
|
type = PCI_RES_BUS;
|
|
|
|
break;
|
|
|
|
#endif
|
|
|
|
default:
|
|
|
|
return (AE_OK);
|
|
|
|
}
|
|
|
|
|
|
|
|
if (min + length - 1 != max)
|
|
|
|
device_printf(sc->ap_dev,
|
|
|
|
"Length mismatch for %d range: %jx vs %jx\n", type,
|
|
|
|
(uintmax_t)max - min + 1, (uintmax_t)length);
|
|
|
|
#ifdef __i386__
|
|
|
|
if (min > ULONG_MAX) {
|
|
|
|
device_printf(sc->ap_dev,
|
|
|
|
"Ignoring %d range above 4GB (%#jx-%#jx)\n",
|
|
|
|
type, (uintmax_t)min, (uintmax_t)max);
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
if (max > ULONG_MAX) {
|
|
|
|
device_printf(sc->ap_dev,
|
|
|
|
"Truncating end of %d range above 4GB (%#jx-%#jx)\n",
|
|
|
|
type, (uintmax_t)min, (uintmax_t)max);
|
|
|
|
max = ULONG_MAX;
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
error = pcib_host_res_decodes(&sc->ap_host_res, type, min, max,
|
|
|
|
flags);
|
|
|
|
if (error)
|
|
|
|
panic("Failed to manage %d range (%#jx-%#jx): %d",
|
|
|
|
type, (uintmax_t)min, (uintmax_t)max, error);
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
return (AE_OK);
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
2000-10-28 06:59:48 +00:00
|
|
|
static int
|
2002-08-26 18:30:27 +00:00
|
|
|
acpi_pcib_acpi_attach(device_t dev)
|
2000-10-28 06:59:48 +00:00
|
|
|
{
|
2002-08-26 18:30:27 +00:00
|
|
|
struct acpi_hpcib_softc *sc;
|
2000-10-28 06:59:48 +00:00
|
|
|
ACPI_STATUS status;
|
2009-06-09 13:44:17 +00:00
|
|
|
static int bus0_seen = 0;
|
2012-03-29 19:03:22 +00:00
|
|
|
u_int slot, func, busok;
|
2002-11-22 18:11:13 +00:00
|
|
|
uint8_t busno;
|
2000-12-08 09:16:20 +00:00
|
|
|
|
2002-05-19 06:16:47 +00:00
|
|
|
ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__);
|
2000-10-28 06:59:48 +00:00
|
|
|
|
|
|
|
sc = device_get_softc(dev);
|
|
|
|
sc->ap_dev = dev;
|
|
|
|
sc->ap_handle = acpi_get_handle(dev);
|
|
|
|
|
2009-06-09 13:44:17 +00:00
|
|
|
/*
|
2012-03-29 19:03:22 +00:00
|
|
|
* Get our segment number by evaluating _SEG.
|
2009-06-09 13:44:17 +00:00
|
|
|
* It's OK for this to not exist.
|
|
|
|
*/
|
|
|
|
status = acpi_GetInteger(sc->ap_handle, "_SEG", &sc->ap_segment);
|
|
|
|
if (ACPI_FAILURE(status)) {
|
|
|
|
if (status != AE_NOT_FOUND) {
|
|
|
|
device_printf(dev, "could not evaluate _SEG - %s\n",
|
|
|
|
AcpiFormatException(status));
|
|
|
|
return_VALUE (ENXIO);
|
|
|
|
}
|
|
|
|
/* If it's not found, assume 0. */
|
|
|
|
sc->ap_segment = 0;
|
|
|
|
}
|
|
|
|
|
2012-03-29 19:03:22 +00:00
|
|
|
/*
|
|
|
|
* Get the address (device and function) of the associated
|
|
|
|
* PCI-Host bridge device from _ADR. Assume we don't have one if
|
|
|
|
* it doesn't exist.
|
|
|
|
*/
|
|
|
|
status = acpi_GetInteger(sc->ap_handle, "_ADR", &sc->ap_addr);
|
|
|
|
if (ACPI_FAILURE(status)) {
|
|
|
|
device_printf(dev, "could not evaluate _ADR - %s\n",
|
|
|
|
AcpiFormatException(status));
|
|
|
|
sc->ap_addr = -1;
|
|
|
|
}
|
|
|
|
|
2011-07-15 21:08:58 +00:00
|
|
|
#ifdef NEW_PCIB
|
|
|
|
/*
|
|
|
|
* Determine which address ranges this bridge decodes and setup
|
|
|
|
* resource managers for those ranges.
|
|
|
|
*/
|
|
|
|
if (pcib_host_res_init(sc->ap_dev, &sc->ap_host_res) != 0)
|
|
|
|
panic("failed to init hostb resources");
|
|
|
|
if (!acpi_disabled("hostres")) {
|
|
|
|
status = AcpiWalkResources(sc->ap_handle, "_CRS",
|
|
|
|
acpi_pcib_producer_handler, sc);
|
|
|
|
if (ACPI_FAILURE(status) && status != AE_NOT_FOUND)
|
|
|
|
device_printf(sc->ap_dev, "failed to parse resources: %s\n",
|
|
|
|
AcpiFormatException(status));
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
2000-10-28 06:59:48 +00:00
|
|
|
/*
|
2002-11-22 18:11:13 +00:00
|
|
|
* Get our base bus number by evaluating _BBN.
|
2002-02-23 05:27:49 +00:00
|
|
|
* If this doesn't work, we assume we're bus number 0.
|
2000-10-28 06:59:48 +00:00
|
|
|
*
|
2004-10-31 15:02:53 +00:00
|
|
|
* XXX note that it may also not exist in the case where we are
|
2000-10-28 06:59:48 +00:00
|
|
|
* meant to use a private configuration space mechanism for this bus,
|
|
|
|
* so we should dig out our resources and check to see if we have
|
|
|
|
* anything like that. How do we do this?
|
2000-12-01 10:18:57 +00:00
|
|
|
* XXX If we have the requisite information, and if we don't think the
|
|
|
|
* default PCI configuration space handlers can deal with this bus,
|
|
|
|
* we should attach our own handler.
|
|
|
|
* XXX invoke _REG on this for the PCI config space address space?
|
2002-11-22 18:11:13 +00:00
|
|
|
* XXX It seems many BIOS's with multiple Host-PCI bridges do not set
|
|
|
|
* _BBN correctly. They set _BBN to zero for all bridges. Thus,
|
2009-06-09 13:44:17 +00:00
|
|
|
* if _BBN is zero and PCI bus 0 already exists, we try to read our
|
2002-11-22 18:11:13 +00:00
|
|
|
* bus number from the configuration registers at address _ADR.
|
2009-06-09 13:44:17 +00:00
|
|
|
* We only do this for domain/segment 0 in the hopes that this is
|
|
|
|
* only needed for old single-domain machines.
|
2000-10-28 06:59:48 +00:00
|
|
|
*/
|
2004-03-03 18:34:42 +00:00
|
|
|
status = acpi_GetInteger(sc->ap_handle, "_BBN", &sc->ap_bus);
|
2002-11-22 18:11:13 +00:00
|
|
|
if (ACPI_FAILURE(status)) {
|
2000-10-28 06:59:48 +00:00
|
|
|
if (status != AE_NOT_FOUND) {
|
2002-11-22 18:11:13 +00:00
|
|
|
device_printf(dev, "could not evaluate _BBN - %s\n",
|
|
|
|
AcpiFormatException(status));
|
2004-05-28 16:38:37 +00:00
|
|
|
return_VALUE (ENXIO);
|
2002-11-25 21:55:04 +00:00
|
|
|
} else {
|
2004-05-28 16:38:37 +00:00
|
|
|
/* If it's not found, assume 0. */
|
2002-11-25 21:55:04 +00:00
|
|
|
sc->ap_bus = 0;
|
2000-10-28 06:59:48 +00:00
|
|
|
}
|
2002-11-22 18:11:13 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
2009-06-09 13:44:17 +00:00
|
|
|
* If this is segment 0, the bus is zero, and PCI bus 0 already
|
|
|
|
* exists, read the bus number via PCI config space.
|
2002-11-22 18:11:13 +00:00
|
|
|
*/
|
|
|
|
busok = 1;
|
2009-06-09 13:44:17 +00:00
|
|
|
if (sc->ap_segment == 0 && sc->ap_bus == 0 && bus0_seen) {
|
2002-11-25 21:55:04 +00:00
|
|
|
busok = 0;
|
2012-03-29 19:03:22 +00:00
|
|
|
if (sc->ap_addr != -1) {
|
2002-11-22 18:11:13 +00:00
|
|
|
/* XXX: We assume bus 0. */
|
2012-03-29 19:03:22 +00:00
|
|
|
slot = ACPI_ADR_PCI_SLOT(sc->ap_addr);
|
|
|
|
func = ACPI_ADR_PCI_FUNC(sc->ap_addr);
|
2002-11-22 18:11:13 +00:00
|
|
|
if (bootverbose)
|
|
|
|
device_printf(dev, "reading config registers from 0:%d:%d\n",
|
|
|
|
slot, func);
|
2002-11-25 21:55:04 +00:00
|
|
|
if (host_pcib_get_busno(pci_cfgregread, 0, slot, func, &busno) == 0)
|
2004-05-28 16:38:37 +00:00
|
|
|
device_printf(dev, "couldn't read bus number from cfg space\n");
|
2002-11-25 21:55:04 +00:00
|
|
|
else {
|
2002-11-22 18:11:13 +00:00
|
|
|
sc->ap_bus = busno;
|
2002-11-25 21:55:04 +00:00
|
|
|
busok = 1;
|
2002-11-22 18:11:13 +00:00
|
|
|
}
|
2002-02-23 05:27:49 +00:00
|
|
|
}
|
2000-10-28 06:59:48 +00:00
|
|
|
}
|
|
|
|
|
2002-11-22 18:11:13 +00:00
|
|
|
/*
|
|
|
|
* If nothing else worked, hope that ACPI at least lays out the
|
|
|
|
* host-PCI bridges in order and that as a result our unit number
|
|
|
|
* is actually our bus number. There are several reasons this
|
|
|
|
* might not be true.
|
|
|
|
*/
|
|
|
|
if (busok == 0) {
|
|
|
|
sc->ap_bus = device_get_unit(dev);
|
|
|
|
device_printf(dev, "trying bus number %d\n", sc->ap_bus);
|
|
|
|
}
|
|
|
|
|
2009-06-09 13:44:17 +00:00
|
|
|
/* If this is bus 0 on segment 0, note that it has been seen already. */
|
|
|
|
if (sc->ap_segment == 0 && sc->ap_bus == 0)
|
|
|
|
bus0_seen = 1;
|
2000-10-28 06:59:48 +00:00
|
|
|
|
2002-08-26 18:30:27 +00:00
|
|
|
return (acpi_pcib_attach(dev, &sc->ap_prt, sc->ap_bus));
|
2000-10-28 06:59:48 +00:00
|
|
|
}
|
|
|
|
|
2001-07-05 07:20:51 +00:00
|
|
|
/*
|
|
|
|
* Support for standard PCI bridge ivars.
|
|
|
|
*/
|
2000-10-28 06:59:48 +00:00
|
|
|
static int
|
|
|
|
acpi_pcib_read_ivar(device_t dev, device_t child, int which, uintptr_t *result)
|
|
|
|
{
|
2002-08-26 18:30:27 +00:00
|
|
|
struct acpi_hpcib_softc *sc = device_get_softc(dev);
|
2000-10-28 06:59:48 +00:00
|
|
|
|
|
|
|
switch (which) {
|
2007-09-30 11:05:18 +00:00
|
|
|
case PCIB_IVAR_DOMAIN:
|
2011-05-02 19:02:30 +00:00
|
|
|
*result = sc->ap_segment;
|
2007-09-30 11:05:18 +00:00
|
|
|
return (0);
|
2004-05-28 16:38:37 +00:00
|
|
|
case PCIB_IVAR_BUS:
|
2000-10-28 06:59:48 +00:00
|
|
|
*result = sc->ap_bus;
|
2004-05-28 16:38:37 +00:00
|
|
|
return (0);
|
|
|
|
case ACPI_IVAR_HANDLE:
|
2002-08-26 18:30:27 +00:00
|
|
|
*result = (uintptr_t)sc->ap_handle;
|
2004-05-28 16:38:37 +00:00
|
|
|
return (0);
|
2004-06-30 16:08:03 +00:00
|
|
|
case ACPI_IVAR_FLAGS:
|
|
|
|
*result = (uintptr_t)sc->ap_flags;
|
|
|
|
return (0);
|
2000-10-28 06:59:48 +00:00
|
|
|
}
|
2004-05-28 16:38:37 +00:00
|
|
|
return (ENOENT);
|
2000-10-28 06:59:48 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
static int
|
|
|
|
acpi_pcib_write_ivar(device_t dev, device_t child, int which, uintptr_t value)
|
|
|
|
{
|
2004-10-31 15:02:53 +00:00
|
|
|
struct acpi_hpcib_softc *sc = device_get_softc(dev);
|
2000-10-28 06:59:48 +00:00
|
|
|
|
|
|
|
switch (which) {
|
2007-09-30 11:05:18 +00:00
|
|
|
case PCIB_IVAR_DOMAIN:
|
|
|
|
return (EINVAL);
|
2004-05-28 16:38:37 +00:00
|
|
|
case PCIB_IVAR_BUS:
|
2000-10-28 06:59:48 +00:00
|
|
|
sc->ap_bus = value;
|
2004-05-28 16:38:37 +00:00
|
|
|
return (0);
|
2004-06-30 16:08:03 +00:00
|
|
|
case ACPI_IVAR_HANDLE:
|
|
|
|
sc->ap_handle = (ACPI_HANDLE)value;
|
|
|
|
return (0);
|
|
|
|
case ACPI_IVAR_FLAGS:
|
|
|
|
sc->ap_flags = (int)value;
|
|
|
|
return (0);
|
2000-10-28 06:59:48 +00:00
|
|
|
}
|
2004-05-28 16:38:37 +00:00
|
|
|
return (ENOENT);
|
2000-10-28 06:59:48 +00:00
|
|
|
}
|
|
|
|
|
2004-05-28 16:38:37 +00:00
|
|
|
static uint32_t
|
2009-02-05 18:40:42 +00:00
|
|
|
acpi_pcib_read_config(device_t dev, u_int bus, u_int slot, u_int func,
|
|
|
|
u_int reg, int bytes)
|
2000-10-28 06:59:48 +00:00
|
|
|
{
|
2004-05-28 16:38:37 +00:00
|
|
|
return (pci_cfgregread(bus, slot, func, reg, bytes));
|
2000-10-28 06:59:48 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
static void
|
2009-02-05 18:40:42 +00:00
|
|
|
acpi_pcib_write_config(device_t dev, u_int bus, u_int slot, u_int func,
|
|
|
|
u_int reg, uint32_t data, int bytes)
|
2000-10-28 06:59:48 +00:00
|
|
|
{
|
|
|
|
pci_cfgregwrite(bus, slot, func, reg, data, bytes);
|
|
|
|
}
|
|
|
|
|
|
|
|
static int
|
2002-08-26 18:30:27 +00:00
|
|
|
acpi_pcib_acpi_route_interrupt(device_t pcib, device_t dev, int pin)
|
2000-10-28 06:59:48 +00:00
|
|
|
{
|
Rework the ACPI PCI link code.
- Use a new-bus device driver for the ACPI PCI link devices. The devices
are called pci_linkX. The driver includes suspend/resume support so that
the ACPI bridge drivers no longer have to poke the links to get them
to handle suspend/resume. Also, the code to handle which IRQs a link is
routed to and choosing an IRQ when a link is not already routed is all
contained in the link driver. The PCI bridge drivers now ask the link
driver which IRQ to use once they determine that a _PRT entry does not
use a hardwired interrupt number.
- The new link driver includes support for multiple IRQ resources per
link device as well as preserving any non-IRQ resources when adjusting
the IRQ that a link is routed to.
- The entire approach to routing when using a link device is now
link-centric rather than pci bus/device/pin specific. Thus, when
using a tunable to override the default IRQ settings, one now uses
a single tunable to route an entire link rather than routing a single
device that uses the link (which has great foot-shooting potential if
the user tries to route the same link to two different IRQs using two
different pci bus/device/pin hints). For example, to adjust the IRQ
that \_SB_.LNKA uses, one would set 'hw.pci.link.LNKA.irq=10' from the
loader.
- As a side effect of having the link driver, unused link devices will now
be disabled when they are probed.
- The algorithm for choosing an IRQ for a link that doesn't already have an
IRQ assigned is now much closer to the one used in $PIR routing. When a
link is routed via an ISA IRQ, only known-good IRQs that the BIOS has
already used are used for routing instead of using probabilities to
guess at which IRQs are probably not used by an ISA device. One change
from $PIR is that the SCI is always considered a viable ISA IRQ, so that
if the BIOS does not setup any IRQs the kernel will degenerate to routing
all interrupts over the SCI. For non ISA IRQs, interrupts are picked
from the possible pool using a simplistic weighting algorithm.
Tested by: ru, scottl, others on acpi@
Reviewed by: njl
2004-11-23 22:26:44 +00:00
|
|
|
struct acpi_hpcib_softc *sc = device_get_softc(pcib);
|
2001-07-05 07:20:51 +00:00
|
|
|
|
Rework the ACPI PCI link code.
- Use a new-bus device driver for the ACPI PCI link devices. The devices
are called pci_linkX. The driver includes suspend/resume support so that
the ACPI bridge drivers no longer have to poke the links to get them
to handle suspend/resume. Also, the code to handle which IRQs a link is
routed to and choosing an IRQ when a link is not already routed is all
contained in the link driver. The PCI bridge drivers now ask the link
driver which IRQ to use once they determine that a _PRT entry does not
use a hardwired interrupt number.
- The new link driver includes support for multiple IRQ resources per
link device as well as preserving any non-IRQ resources when adjusting
the IRQ that a link is routed to.
- The entire approach to routing when using a link device is now
link-centric rather than pci bus/device/pin specific. Thus, when
using a tunable to override the default IRQ settings, one now uses
a single tunable to route an entire link rather than routing a single
device that uses the link (which has great foot-shooting potential if
the user tries to route the same link to two different IRQs using two
different pci bus/device/pin hints). For example, to adjust the IRQ
that \_SB_.LNKA uses, one would set 'hw.pci.link.LNKA.irq=10' from the
loader.
- As a side effect of having the link driver, unused link devices will now
be disabled when they are probed.
- The algorithm for choosing an IRQ for a link that doesn't already have an
IRQ assigned is now much closer to the one used in $PIR routing. When a
link is routed via an ISA IRQ, only known-good IRQs that the BIOS has
already used are used for routing instead of using probabilities to
guess at which IRQs are probably not used by an ISA device. One change
from $PIR is that the SCI is always considered a viable ISA IRQ, so that
if the BIOS does not setup any IRQs the kernel will degenerate to routing
all interrupts over the SCI. For non ISA IRQs, interrupts are picked
from the possible pool using a simplistic weighting algorithm.
Tested by: ru, scottl, others on acpi@
Reviewed by: njl
2004-11-23 22:26:44 +00:00
|
|
|
return (acpi_pcib_route_interrupt(pcib, dev, pin, &sc->ap_prt));
|
2000-10-28 06:59:48 +00:00
|
|
|
}
|
2004-04-09 15:44:34 +00:00
|
|
|
|
2006-12-12 19:27:01 +00:00
|
|
|
static int
|
|
|
|
acpi_pcib_alloc_msi(device_t pcib, device_t dev, int count, int maxcount,
|
|
|
|
int *irqs)
|
|
|
|
{
|
|
|
|
device_t bus;
|
|
|
|
|
|
|
|
bus = device_get_parent(pcib);
|
|
|
|
return (PCIB_ALLOC_MSI(device_get_parent(bus), dev, count, maxcount,
|
|
|
|
irqs));
|
|
|
|
}
|
|
|
|
|
|
|
|
static int
|
2007-05-02 17:50:36 +00:00
|
|
|
acpi_pcib_alloc_msix(device_t pcib, device_t dev, int *irq)
|
2006-12-12 19:27:01 +00:00
|
|
|
{
|
|
|
|
device_t bus;
|
|
|
|
|
|
|
|
bus = device_get_parent(pcib);
|
2007-05-02 17:50:36 +00:00
|
|
|
return (PCIB_ALLOC_MSIX(device_get_parent(bus), dev, irq));
|
|
|
|
}
|
|
|
|
|
|
|
|
static int
|
|
|
|
acpi_pcib_map_msi(device_t pcib, device_t dev, int irq, uint64_t *addr,
|
|
|
|
uint32_t *data)
|
|
|
|
{
|
2012-03-29 19:03:22 +00:00
|
|
|
struct acpi_hpcib_softc *sc;
|
|
|
|
device_t bus, hostb;
|
|
|
|
int error;
|
2007-05-02 17:50:36 +00:00
|
|
|
|
|
|
|
bus = device_get_parent(pcib);
|
2012-03-29 19:03:22 +00:00
|
|
|
error = PCIB_MAP_MSI(device_get_parent(bus), dev, irq, addr, data);
|
|
|
|
if (error)
|
|
|
|
return (error);
|
|
|
|
|
2012-10-10 00:06:31 +00:00
|
|
|
sc = device_get_softc(pcib);
|
2012-03-29 19:03:22 +00:00
|
|
|
if (sc->ap_addr == -1)
|
|
|
|
return (0);
|
|
|
|
/* XXX: Assumes all bridges are on bus 0. */
|
|
|
|
hostb = pci_find_dbsf(sc->ap_segment, 0, ACPI_ADR_PCI_SLOT(sc->ap_addr),
|
|
|
|
ACPI_ADR_PCI_FUNC(sc->ap_addr));
|
|
|
|
if (hostb != NULL)
|
|
|
|
pci_ht_map_msi(hostb, *addr);
|
|
|
|
return (0);
|
2006-12-12 19:27:01 +00:00
|
|
|
}
|
|
|
|
|
2004-04-09 15:44:34 +00:00
|
|
|
struct resource *
|
|
|
|
acpi_pcib_acpi_alloc_resource(device_t dev, device_t child, int type, int *rid,
|
2004-05-28 16:38:37 +00:00
|
|
|
u_long start, u_long end, u_long count, u_int flags)
|
2004-04-09 15:44:34 +00:00
|
|
|
{
|
2011-07-15 21:08:58 +00:00
|
|
|
#ifdef NEW_PCIB
|
|
|
|
struct acpi_hpcib_softc *sc;
|
2011-10-12 14:13:32 +00:00
|
|
|
struct resource *res;
|
2011-07-15 21:08:58 +00:00
|
|
|
#endif
|
2011-06-22 16:15:15 +00:00
|
|
|
|
|
|
|
#if defined(__i386__) || defined(__amd64__)
|
|
|
|
start = hostb_alloc_start(type, start, end, count);
|
|
|
|
#endif
|
2011-07-15 21:08:58 +00:00
|
|
|
|
|
|
|
#ifdef NEW_PCIB
|
|
|
|
sc = device_get_softc(dev);
|
2011-10-12 14:13:32 +00:00
|
|
|
res = pcib_host_res_alloc(&sc->ap_host_res, child, type, rid, start, end,
|
|
|
|
count, flags);
|
2011-12-29 16:23:14 +00:00
|
|
|
|
|
|
|
/*
|
|
|
|
* XXX: If this is a request for a specific range, assume it is
|
|
|
|
* correct and pass it up to the parent. What we probably want to
|
|
|
|
* do long-term is explicitly trust any firmware-configured
|
|
|
|
* resources during the initial bus scan on boot and then disable
|
|
|
|
* this after that.
|
|
|
|
*/
|
2011-10-12 14:13:32 +00:00
|
|
|
if (res == NULL && start + count - 1 == end)
|
2011-12-29 16:23:14 +00:00
|
|
|
res = bus_generic_alloc_resource(dev, child, type, rid, start, end,
|
|
|
|
count, flags);
|
2011-10-12 14:13:32 +00:00
|
|
|
return (res);
|
2011-07-15 21:08:58 +00:00
|
|
|
#else
|
2004-05-28 16:38:37 +00:00
|
|
|
return (bus_generic_alloc_resource(dev, child, type, rid, start, end,
|
|
|
|
count, flags));
|
2011-07-15 21:08:58 +00:00
|
|
|
#endif
|
|
|
|
}
|
|
|
|
|
|
|
|
#ifdef NEW_PCIB
|
|
|
|
int
|
|
|
|
acpi_pcib_acpi_adjust_resource(device_t dev, device_t child, int type,
|
|
|
|
struct resource *r, u_long start, u_long end)
|
|
|
|
{
|
|
|
|
struct acpi_hpcib_softc *sc;
|
|
|
|
|
|
|
|
sc = device_get_softc(dev);
|
|
|
|
return (pcib_host_res_adjust(&sc->ap_host_res, child, type, r, start,
|
|
|
|
end));
|
2004-04-09 15:44:34 +00:00
|
|
|
}
|
2011-07-15 21:08:58 +00:00
|
|
|
#endif
|