61 lines
2.5 KiB
C
61 lines
2.5 KiB
C
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/* $NetBSD: sa11x0_ppcreg.h,v 1.2 2001/07/30 12:19:04 rjs Exp $ */
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/*-
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* Copyright (c) 2001, The NetBSD Foundation, Inc. All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by IWAMOTO Toshihiro.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*
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*/
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/* SA11[01]0 PPC (peripheral pin controller) */
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/* size of I/O space */
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#define SAPPC_NPORTS 13
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#define SAPPC_PDR 0x00 /* pin direction register */
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#define SAPPC_PSR 0x04 /* pin state register */
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#define SAPPC_PAR 0x08 /* pin assignment register */
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#define PAR_UPR 0x01000 /* UART pin assignment */
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#define PAR_SPR 0x40000 /* SSP pin assignment */
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#define SAPPC_SDR 0x0C /* sleep mode direction register */
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#define SAPPC_PFR 0x10 /* pin flag register */
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#define PFR_LCD 0x00001 /* LCD controller flag */
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#define PFR_SP1TX 0x01000 /* serial port 1 Tx flag */
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#define PFR_SP1RX 0x02000 /* serial port 1 Rx flag */
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#define PFR_SP2TX 0x04000 /* serial port 2 Tx flag */
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#define PFR_SP2RX 0x08000 /* serial port 2 Rx flag */
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#define PFR_SP3TX 0x10000 /* serial port 3 Tx flag */
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#define PFR_SP3RX 0x20000 /* serial port 3 Rx flag */
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#define PFR_SP4 0x40000 /* serial port 4 flag */
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/* MCP control register 1 */
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#define SAMCP_CR1 0x30 /* MCP control register 1 */
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