137 lines
3.4 KiB
C
137 lines
3.4 KiB
C
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/*-
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* Copyright (c) 2014, Neel Natu (neel@freebsd.org)
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice unmodified, this list of conditions, and the following
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* disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/types.h>
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#include <sys/errno.h>
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#include <machine/cpufunc.h>
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#include <machine/specialreg.h>
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#include "svm_msr.h"
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#ifndef MSR_AMDK8_IPM
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#define MSR_AMDK8_IPM 0xc0010055
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#endif
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enum {
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IDX_MSR_LSTAR,
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IDX_MSR_CSTAR,
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IDX_MSR_STAR,
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IDX_MSR_SF_MASK,
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HOST_MSR_NUM /* must be the last enumeration */
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};
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static uint64_t host_msrs[HOST_MSR_NUM];
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void
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svm_msr_init(void)
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{
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/*
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* It is safe to cache the values of the following MSRs because they
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* don't change based on curcpu, curproc or curthread.
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*/
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host_msrs[IDX_MSR_LSTAR] = rdmsr(MSR_LSTAR);
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host_msrs[IDX_MSR_CSTAR] = rdmsr(MSR_CSTAR);
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host_msrs[IDX_MSR_STAR] = rdmsr(MSR_STAR);
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host_msrs[IDX_MSR_SF_MASK] = rdmsr(MSR_SF_MASK);
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}
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void
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svm_msr_guest_init(struct svm_softc *sc, int vcpu)
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{
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/*
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* All the MSRs accessible to the guest are either saved/restored by
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* hardware on every #VMEXIT/VMRUN (e.g., G_PAT) or are saved/restored
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* by VMSAVE/VMLOAD (e.g., MSR_GSBASE).
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*
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* There are no guest MSRs that are saved/restored "by hand" so nothing
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* more to do here.
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*/
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return;
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}
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void
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svm_msr_guest_enter(struct svm_softc *sc, int vcpu)
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{
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/*
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* Save host MSRs (if any) and restore guest MSRs (if any).
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*/
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}
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void
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svm_msr_guest_exit(struct svm_softc *sc, int vcpu)
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{
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/*
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* Save guest MSRs (if any) and restore host MSRs.
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*/
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wrmsr(MSR_LSTAR, host_msrs[IDX_MSR_LSTAR]);
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wrmsr(MSR_CSTAR, host_msrs[IDX_MSR_CSTAR]);
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wrmsr(MSR_STAR, host_msrs[IDX_MSR_STAR]);
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wrmsr(MSR_SF_MASK, host_msrs[IDX_MSR_SF_MASK]);
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/* MSR_KGSBASE will be restored on the way back to userspace */
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}
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int
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svm_rdmsr(struct svm_softc *sc, int vcpu, u_int num, uint64_t *result,
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bool *retu)
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{
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int error = 0;
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switch (num) {
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case MSR_AMDK8_IPM:
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*result = 0;
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break;
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default:
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error = EINVAL;
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break;
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}
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return (error);
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}
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int
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svm_wrmsr(struct svm_softc *sc, int vcpu, u_int num, uint64_t val, bool *retu)
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{
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int error = 0;
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switch (num) {
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case MSR_AMDK8_IPM:
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/*
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* Ignore writes to the "Interrupt Pending Message" MSR.
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*/
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break;
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default:
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error = EINVAL;
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break;
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}
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return (error);
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}
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