74 lines
2.7 KiB
C
74 lines
2.7 KiB
C
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/*-
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* Copyright (c) 2007 Bruce M. Simpson.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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/*
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* TODO: sprom
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* TODO: implement dma translation bits (if needed for system bus)
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*/
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#ifndef _SIBA_SIBAREG_H_
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#define _SIBA_SIBAREG_H_
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#define SIBA_CORE_LEN 0x00001000 /* Size of cfg per core */
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#define SIBA_CFG_END 0x00010000 /* Upper bound of cfg space */
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#define SIBA_MAX_CORES (SIBA_CFG_END/SIBA_CORE_LEN) /* #max cores */
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/* offset of high ID register */
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#define SIBA_CORE_IDLO 0x00000ff8
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#define SIBA_CORE_IDHI 0x00000ffc
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/*
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* Offsets of ChipCommon core registers.
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* XXX: move to siba_cc
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*/
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#define SIBA_CC_UART0 0x00000300 /* offset of UART0 */
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#define SIBA_CC_UART1 0x00000400 /* offset of UART1 */
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#define SIBA_CC_CCID 0x0000
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#define SIBA_CC_IDMASK 0x0000FFFF
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#define SIBA_CC_REVMASK 0x000F0000
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#define SIBA_CC_REVSHIFT 16
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#define SIBA_CC_PACKMASK 0x00F00000
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#define SIBA_CC_PACKSHIFT 20
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#define SIBA_CC_NRCORESMASK 0x0F000000
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#define SIBA_CC_NRCORESSHIFT 24
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#define SIBA_IDHIGH_RCLO 0x0000000F /* Revision Code (low part) */
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#define SIBA_IDHIGH_CC 0x00008FF0 /* Core Code */
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#define SIBA_IDHIGH_CC_SHIFT 4
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#define SIBA_IDHIGH_RCHI 0x00007000 /* Revision Code (high part) */
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#define SIBA_IDHIGH_RCHI_SHIFT 8
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#define SIBA_IDHIGH_VC 0xFFFF0000 /* Vendor Code */
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#define SIBA_IDHIGH_VC_SHIFT 16
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#define SIBA_CCID_BCM4710 0x4710
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#define SIBA_CCID_BCM4704 0x4704
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#define SIBA_CCID_SENTRY5 0x5365
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#endif /* _SIBA_SIBAREG_H_ */
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