2015-03-01 00:40:09 +00:00
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/*-
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2016-03-14 17:41:17 +00:00
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* Copyright (c) 2013-2015 Sandvine Inc.
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2015-03-01 00:40:09 +00:00
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include "opt_bus.h"
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#include <sys/param.h>
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#include <sys/conf.h>
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#include <sys/kernel.h>
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#include <sys/systm.h>
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#include <sys/bus.h>
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#include <sys/fcntl.h>
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#include <sys/ioccom.h>
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#include <sys/iov.h>
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#include <sys/linker.h>
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Extract eventfilter declarations to sys/_eventfilter.h
This allows replacing "sys/eventfilter.h" includes with "sys/_eventfilter.h"
in other header files (e.g., sys/{bus,conf,cpu}.h) and reduces header
pollution substantially.
EVENTHANDLER_DECLARE and EVENTHANDLER_LIST_DECLAREs were moved out of .c
files into appropriate headers (e.g., sys/proc.h, powernv/opal.h).
As a side effect of reduced header pollution, many .c files and headers no
longer contain needed definitions. The remainder of the patch addresses
adding appropriate includes to fix those files.
LOCK_DEBUG and LOCK_FILE_LINE_ARG are moved to sys/_lock.h, as required by
sys/mutex.h since r326106 (but silently protected by header pollution prior
to this change).
No functional change (intended). Of course, any out of tree modules that
relied on header pollution for sys/eventhandler.h, sys/lock.h, or
sys/mutex.h inclusion need to be fixed. __FreeBSD_version has been bumped.
2019-05-20 00:38:23 +00:00
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#include <sys/lock.h>
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2015-03-01 00:40:09 +00:00
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#include <sys/malloc.h>
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#include <sys/module.h>
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Extract eventfilter declarations to sys/_eventfilter.h
This allows replacing "sys/eventfilter.h" includes with "sys/_eventfilter.h"
in other header files (e.g., sys/{bus,conf,cpu}.h) and reduces header
pollution substantially.
EVENTHANDLER_DECLARE and EVENTHANDLER_LIST_DECLAREs were moved out of .c
files into appropriate headers (e.g., sys/proc.h, powernv/opal.h).
As a side effect of reduced header pollution, many .c files and headers no
longer contain needed definitions. The remainder of the patch addresses
adding appropriate includes to fix those files.
LOCK_DEBUG and LOCK_FILE_LINE_ARG are moved to sys/_lock.h, as required by
sys/mutex.h since r326106 (but silently protected by header pollution prior
to this change).
No functional change (intended). Of course, any out of tree modules that
relied on header pollution for sys/eventhandler.h, sys/lock.h, or
sys/mutex.h inclusion need to be fixed. __FreeBSD_version has been bumped.
2019-05-20 00:38:23 +00:00
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#include <sys/mutex.h>
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2015-03-01 00:40:09 +00:00
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#include <sys/pciio.h>
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#include <sys/queue.h>
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#include <sys/rman.h>
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#include <sys/sysctl.h>
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#include <machine/bus.h>
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2015-03-01 00:40:42 +00:00
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#include <machine/stdarg.h>
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#include <sys/nv.h>
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#include <sys/iov_schema.h>
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2015-03-01 00:40:09 +00:00
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#include <dev/pci/pcireg.h>
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#include <dev/pci/pcivar.h>
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2015-05-28 22:01:50 +00:00
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#include <dev/pci/pci_iov.h>
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2015-03-01 00:40:09 +00:00
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#include <dev/pci/pci_private.h>
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#include <dev/pci/pci_iov_private.h>
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2015-03-01 00:40:42 +00:00
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#include <dev/pci/schema_private.h>
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2015-03-01 00:40:09 +00:00
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#include "pcib_if.h"
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static MALLOC_DEFINE(M_SRIOV, "sr_iov", "PCI SR-IOV allocations");
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static d_ioctl_t pci_iov_ioctl;
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static struct cdevsw iov_cdevsw = {
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.d_version = D_VERSION,
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.d_name = "iov",
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.d_ioctl = pci_iov_ioctl
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};
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2015-03-01 00:40:57 +00:00
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SYSCTL_DECL(_hw_pci);
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/*
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* The maximum amount of memory we will allocate for user configuration of an
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* SR-IOV device. 1MB ought to be enough for anyone, but leave this
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* configurable just in case.
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*/
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static u_long pci_iov_max_config = 1024 * 1024;
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SYSCTL_ULONG(_hw_pci, OID_AUTO, iov_max_config, CTLFLAG_RWTUN,
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&pci_iov_max_config, 0, "Maximum allowed size of SR-IOV configuration.");
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2015-03-01 00:40:09 +00:00
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#define IOV_READ(d, r, w) \
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pci_read_config((d)->cfg.dev, (d)->cfg.iov->iov_pos + r, w)
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#define IOV_WRITE(d, r, v, w) \
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pci_write_config((d)->cfg.dev, (d)->cfg.iov->iov_pos + r, v, w)
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2015-03-01 00:40:42 +00:00
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static nvlist_t *pci_iov_build_schema(nvlist_t **pf_schema,
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nvlist_t **vf_schema);
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static void pci_iov_build_pf_schema(nvlist_t *schema,
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nvlist_t **driver_schema);
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static void pci_iov_build_vf_schema(nvlist_t *schema,
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nvlist_t **driver_schema);
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static nvlist_t *pci_iov_get_pf_subsystem_schema(void);
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static nvlist_t *pci_iov_get_vf_subsystem_schema(void);
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2016-08-03 17:09:12 +00:00
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int
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pci_iov_attach_name(device_t dev, struct nvlist *pf_schema,
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struct nvlist *vf_schema, const char *fmt, ...)
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{
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char buf[NAME_MAX + 1];
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va_list ap;
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va_start(ap, fmt);
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vsnprintf(buf, sizeof(buf), fmt, ap);
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va_end(ap);
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return (PCI_IOV_ATTACH(device_get_parent(dev), dev, pf_schema,
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vf_schema, buf));
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}
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2015-03-01 00:40:09 +00:00
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int
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2015-03-01 00:40:42 +00:00
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pci_iov_attach_method(device_t bus, device_t dev, nvlist_t *pf_schema,
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2016-08-03 17:09:12 +00:00
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nvlist_t *vf_schema, const char *name)
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2015-03-01 00:40:09 +00:00
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{
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device_t pcib;
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struct pci_devinfo *dinfo;
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struct pcicfg_iov *iov;
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2015-03-01 00:40:42 +00:00
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nvlist_t *schema;
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2015-03-01 00:40:09 +00:00
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uint32_t version;
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int error;
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int iov_pos;
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dinfo = device_get_ivars(dev);
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pcib = device_get_parent(bus);
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2015-03-01 00:40:42 +00:00
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schema = NULL;
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2015-03-01 00:40:09 +00:00
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error = pci_find_extcap(dev, PCIZ_SRIOV, &iov_pos);
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if (error != 0)
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return (error);
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version = pci_read_config(dev, iov_pos, 4);
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if (PCI_EXTCAP_VER(version) != 1) {
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if (bootverbose)
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device_printf(dev,
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"Unsupported version of SR-IOV (%d) detected\n",
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PCI_EXTCAP_VER(version));
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return (ENXIO);
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}
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iov = malloc(sizeof(*dinfo->cfg.iov), M_SRIOV, M_WAITOK | M_ZERO);
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mtx_lock(&Giant);
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if (dinfo->cfg.iov != NULL) {
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error = EBUSY;
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goto cleanup;
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}
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iov->iov_pos = iov_pos;
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2015-03-01 00:40:42 +00:00
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schema = pci_iov_build_schema(&pf_schema, &vf_schema);
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if (schema == NULL) {
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error = ENOMEM;
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goto cleanup;
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}
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2015-03-01 00:59:28 +00:00
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error = pci_iov_validate_schema(schema);
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if (error != 0)
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goto cleanup;
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2015-03-01 00:40:42 +00:00
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iov->iov_schema = schema;
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2015-03-01 00:40:09 +00:00
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iov->iov_cdev = make_dev(&iov_cdevsw, device_get_unit(dev),
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2016-08-03 17:09:12 +00:00
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UID_ROOT, GID_WHEEL, 0600, "iov/%s", name);
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2015-03-01 00:40:09 +00:00
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if (iov->iov_cdev == NULL) {
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error = ENOMEM;
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goto cleanup;
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}
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dinfo->cfg.iov = iov;
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iov->iov_cdev->si_drv1 = dinfo;
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mtx_unlock(&Giant);
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return (0);
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cleanup:
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2015-03-01 00:40:42 +00:00
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nvlist_destroy(schema);
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nvlist_destroy(pf_schema);
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nvlist_destroy(vf_schema);
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2015-03-01 00:40:09 +00:00
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free(iov, M_SRIOV);
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mtx_unlock(&Giant);
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return (error);
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}
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int
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pci_iov_detach_method(device_t bus, device_t dev)
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{
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struct pci_devinfo *dinfo;
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struct pcicfg_iov *iov;
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mtx_lock(&Giant);
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dinfo = device_get_ivars(dev);
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iov = dinfo->cfg.iov;
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if (iov == NULL) {
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mtx_unlock(&Giant);
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return (0);
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}
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2015-03-01 00:40:34 +00:00
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if (iov->iov_num_vfs != 0 || iov->iov_flags & IOV_BUSY) {
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2015-03-01 00:40:09 +00:00
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mtx_unlock(&Giant);
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return (EBUSY);
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}
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dinfo->cfg.iov = NULL;
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if (iov->iov_cdev) {
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destroy_dev(iov->iov_cdev);
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iov->iov_cdev = NULL;
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}
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2015-03-01 00:40:42 +00:00
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nvlist_destroy(iov->iov_schema);
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2015-03-01 00:40:09 +00:00
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free(iov, M_SRIOV);
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mtx_unlock(&Giant);
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return (0);
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}
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2015-03-01 00:40:42 +00:00
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static nvlist_t *
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pci_iov_build_schema(nvlist_t **pf, nvlist_t **vf)
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{
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nvlist_t *schema, *pf_driver, *vf_driver;
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/* We always take ownership of the schemas. */
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pf_driver = *pf;
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*pf = NULL;
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vf_driver = *vf;
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*vf = NULL;
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schema = pci_iov_schema_alloc_node();
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if (schema == NULL)
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goto cleanup;
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pci_iov_build_pf_schema(schema, &pf_driver);
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pci_iov_build_vf_schema(schema, &vf_driver);
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if (nvlist_error(schema) != 0)
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goto cleanup;
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return (schema);
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cleanup:
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nvlist_destroy(schema);
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nvlist_destroy(pf_driver);
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nvlist_destroy(vf_driver);
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return (NULL);
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}
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static void
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pci_iov_build_pf_schema(nvlist_t *schema, nvlist_t **driver_schema)
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{
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nvlist_t *pf_schema, *iov_schema;
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pf_schema = pci_iov_schema_alloc_node();
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if (pf_schema == NULL) {
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nvlist_set_error(schema, ENOMEM);
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return;
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}
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iov_schema = pci_iov_get_pf_subsystem_schema();
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/*
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* Note that if either *driver_schema or iov_schema is NULL, then
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* nvlist_move_nvlist will put the schema in the error state and
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* SR-IOV will fail to initialize later, so we don't have to explicitly
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* handle that case.
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*/
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nvlist_move_nvlist(pf_schema, DRIVER_CONFIG_NAME, *driver_schema);
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nvlist_move_nvlist(pf_schema, IOV_CONFIG_NAME, iov_schema);
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nvlist_move_nvlist(schema, PF_CONFIG_NAME, pf_schema);
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*driver_schema = NULL;
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}
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static void
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pci_iov_build_vf_schema(nvlist_t *schema, nvlist_t **driver_schema)
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{
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nvlist_t *vf_schema, *iov_schema;
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vf_schema = pci_iov_schema_alloc_node();
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if (vf_schema == NULL) {
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nvlist_set_error(schema, ENOMEM);
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return;
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}
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iov_schema = pci_iov_get_vf_subsystem_schema();
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/*
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* Note that if either *driver_schema or iov_schema is NULL, then
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* nvlist_move_nvlist will put the schema in the error state and
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* SR-IOV will fail to initialize later, so we don't have to explicitly
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* handle that case.
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*/
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nvlist_move_nvlist(vf_schema, DRIVER_CONFIG_NAME, *driver_schema);
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nvlist_move_nvlist(vf_schema, IOV_CONFIG_NAME, iov_schema);
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nvlist_move_nvlist(schema, VF_SCHEMA_NAME, vf_schema);
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*driver_schema = NULL;
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}
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static nvlist_t *
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pci_iov_get_pf_subsystem_schema(void)
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{
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nvlist_t *pf;
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pf = pci_iov_schema_alloc_node();
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if (pf == NULL)
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return (NULL);
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pci_iov_schema_add_uint16(pf, "num_vfs", IOV_SCHEMA_REQUIRED, -1);
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pci_iov_schema_add_string(pf, "device", IOV_SCHEMA_REQUIRED, NULL);
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return (pf);
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}
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|
|
|
|
|
|
|
static nvlist_t *
|
|
|
|
pci_iov_get_vf_subsystem_schema(void)
|
|
|
|
{
|
|
|
|
nvlist_t *vf;
|
|
|
|
|
|
|
|
vf = pci_iov_schema_alloc_node();
|
|
|
|
if (vf == NULL)
|
|
|
|
return (NULL);
|
|
|
|
|
|
|
|
pci_iov_schema_add_bool(vf, "passthrough", IOV_SCHEMA_HASDEFAULT, 0);
|
|
|
|
|
|
|
|
return (vf);
|
|
|
|
}
|
|
|
|
|
2015-03-01 00:40:26 +00:00
|
|
|
static int
|
|
|
|
pci_iov_alloc_bar(struct pci_devinfo *dinfo, int bar, pci_addr_t bar_shift)
|
|
|
|
{
|
|
|
|
struct resource *res;
|
|
|
|
struct pcicfg_iov *iov;
|
|
|
|
device_t dev, bus;
|
2016-01-27 02:23:54 +00:00
|
|
|
rman_res_t start, end;
|
2015-03-01 00:40:26 +00:00
|
|
|
pci_addr_t bar_size;
|
|
|
|
int rid;
|
|
|
|
|
|
|
|
iov = dinfo->cfg.iov;
|
|
|
|
dev = dinfo->cfg.dev;
|
|
|
|
bus = device_get_parent(dev);
|
|
|
|
rid = iov->iov_pos + PCIR_SRIOV_BAR(bar);
|
|
|
|
bar_size = 1 << bar_shift;
|
|
|
|
|
2016-03-03 05:07:35 +00:00
|
|
|
res = pci_alloc_multi_resource(bus, dev, SYS_RES_MEMORY, &rid, 0,
|
|
|
|
~0, 1, iov->iov_num_vfs, RF_ACTIVE);
|
2015-03-01 00:40:26 +00:00
|
|
|
|
|
|
|
if (res == NULL)
|
|
|
|
return (ENXIO);
|
|
|
|
|
|
|
|
iov->iov_bar[bar].res = res;
|
|
|
|
iov->iov_bar[bar].bar_size = bar_size;
|
|
|
|
iov->iov_bar[bar].bar_shift = bar_shift;
|
|
|
|
|
|
|
|
start = rman_get_start(res);
|
|
|
|
end = rman_get_end(res);
|
|
|
|
return (rman_manage_region(&iov->rman, start, end));
|
|
|
|
}
|
|
|
|
|
|
|
|
static void
|
|
|
|
pci_iov_add_bars(struct pcicfg_iov *iov, struct pci_devinfo *dinfo)
|
|
|
|
{
|
|
|
|
struct pci_iov_bar *bar;
|
|
|
|
uint64_t bar_start;
|
|
|
|
int i;
|
|
|
|
|
|
|
|
for (i = 0; i <= PCIR_MAX_BAR_0; i++) {
|
|
|
|
bar = &iov->iov_bar[i];
|
|
|
|
if (bar->res != NULL) {
|
|
|
|
bar_start = rman_get_start(bar->res) +
|
|
|
|
dinfo->cfg.vf.index * bar->bar_size;
|
|
|
|
|
|
|
|
pci_add_bar(dinfo->cfg.dev, PCIR_BAR(i), bar_start,
|
|
|
|
bar->bar_shift);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2015-03-01 00:40:57 +00:00
|
|
|
static int
|
|
|
|
pci_iov_parse_config(struct pcicfg_iov *iov, struct pci_iov_arg *arg,
|
|
|
|
nvlist_t **ret)
|
|
|
|
{
|
|
|
|
void *packed_config;
|
|
|
|
nvlist_t *config;
|
|
|
|
int error;
|
|
|
|
|
|
|
|
config = NULL;
|
|
|
|
packed_config = NULL;
|
|
|
|
|
|
|
|
if (arg->len > pci_iov_max_config) {
|
|
|
|
error = EMSGSIZE;
|
|
|
|
goto out;
|
|
|
|
}
|
|
|
|
|
|
|
|
packed_config = malloc(arg->len, M_SRIOV, M_WAITOK);
|
|
|
|
|
|
|
|
error = copyin(arg->config, packed_config, arg->len);
|
|
|
|
if (error != 0)
|
|
|
|
goto out;
|
|
|
|
|
2015-05-02 17:45:52 +00:00
|
|
|
config = nvlist_unpack(packed_config, arg->len, NV_FLAG_IGNORE_CASE);
|
2015-03-01 00:40:57 +00:00
|
|
|
if (config == NULL) {
|
|
|
|
error = EINVAL;
|
|
|
|
goto out;
|
|
|
|
}
|
|
|
|
|
|
|
|
error = pci_iov_schema_validate_config(iov->iov_schema, config);
|
|
|
|
if (error != 0)
|
|
|
|
goto out;
|
|
|
|
|
|
|
|
error = nvlist_error(config);
|
|
|
|
if (error != 0)
|
|
|
|
goto out;
|
|
|
|
|
|
|
|
*ret = config;
|
|
|
|
config = NULL;
|
|
|
|
|
|
|
|
out:
|
|
|
|
nvlist_destroy(config);
|
|
|
|
free(packed_config, M_SRIOV);
|
|
|
|
return (error);
|
|
|
|
}
|
|
|
|
|
2015-03-01 00:40:09 +00:00
|
|
|
/*
|
|
|
|
* Set the ARI_EN bit in the lowest-numbered PCI function with the SR-IOV
|
|
|
|
* capability. This bit is only writeable on the lowest-numbered PF but
|
|
|
|
* affects all PFs on the device.
|
|
|
|
*/
|
|
|
|
static int
|
|
|
|
pci_iov_set_ari(device_t bus)
|
|
|
|
{
|
|
|
|
device_t lowest;
|
|
|
|
device_t *devlist;
|
|
|
|
int i, error, devcount, lowest_func, lowest_pos, iov_pos, dev_func;
|
|
|
|
uint16_t iov_ctl;
|
|
|
|
|
|
|
|
/* If ARI is disabled on the downstream port there is nothing to do. */
|
|
|
|
if (!PCIB_ARI_ENABLED(device_get_parent(bus)))
|
|
|
|
return (0);
|
|
|
|
|
|
|
|
error = device_get_children(bus, &devlist, &devcount);
|
|
|
|
|
|
|
|
if (error != 0)
|
|
|
|
return (error);
|
|
|
|
|
|
|
|
lowest = NULL;
|
|
|
|
for (i = 0; i < devcount; i++) {
|
|
|
|
if (pci_find_extcap(devlist[i], PCIZ_SRIOV, &iov_pos) == 0) {
|
|
|
|
dev_func = pci_get_function(devlist[i]);
|
|
|
|
if (lowest == NULL || dev_func < lowest_func) {
|
|
|
|
lowest = devlist[i];
|
|
|
|
lowest_func = dev_func;
|
|
|
|
lowest_pos = iov_pos;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
2016-05-03 19:37:25 +00:00
|
|
|
free(devlist, M_TEMP);
|
2015-03-01 00:40:09 +00:00
|
|
|
|
|
|
|
/*
|
|
|
|
* If we called this function some device must have the SR-IOV
|
|
|
|
* capability.
|
|
|
|
*/
|
|
|
|
KASSERT(lowest != NULL,
|
|
|
|
("Could not find child of %s with SR-IOV capability",
|
|
|
|
device_get_nameunit(bus)));
|
|
|
|
|
2016-05-03 19:37:25 +00:00
|
|
|
iov_ctl = pci_read_config(lowest, lowest_pos + PCIR_SRIOV_CTL, 2);
|
2015-03-01 00:40:09 +00:00
|
|
|
iov_ctl |= PCIM_SRIOV_ARI_EN;
|
2016-05-03 19:37:25 +00:00
|
|
|
pci_write_config(lowest, lowest_pos + PCIR_SRIOV_CTL, iov_ctl, 2);
|
|
|
|
if ((pci_read_config(lowest, lowest_pos + PCIR_SRIOV_CTL, 2) &
|
|
|
|
PCIM_SRIOV_ARI_EN) == 0) {
|
|
|
|
device_printf(lowest, "failed to enable ARI\n");
|
|
|
|
return (ENXIO);
|
|
|
|
}
|
2015-03-01 00:40:09 +00:00
|
|
|
return (0);
|
|
|
|
}
|
|
|
|
|
|
|
|
static int
|
|
|
|
pci_iov_config_page_size(struct pci_devinfo *dinfo)
|
|
|
|
{
|
|
|
|
uint32_t page_cap, page_size;
|
|
|
|
|
|
|
|
page_cap = IOV_READ(dinfo, PCIR_SRIOV_PAGE_CAP, 4);
|
|
|
|
|
|
|
|
/*
|
|
|
|
* If the system page size is less than the smallest SR-IOV page size
|
|
|
|
* then round up to the smallest SR-IOV page size.
|
|
|
|
*/
|
|
|
|
if (PAGE_SHIFT < PCI_SRIOV_BASE_PAGE_SHIFT)
|
|
|
|
page_size = (1 << 0);
|
|
|
|
else
|
|
|
|
page_size = (1 << (PAGE_SHIFT - PCI_SRIOV_BASE_PAGE_SHIFT));
|
|
|
|
|
|
|
|
/* Check that the device supports the system page size. */
|
|
|
|
if (!(page_size & page_cap))
|
|
|
|
return (ENXIO);
|
|
|
|
|
|
|
|
IOV_WRITE(dinfo, PCIR_SRIOV_PAGE_SIZE, page_size, 4);
|
|
|
|
return (0);
|
|
|
|
}
|
|
|
|
|
2015-03-01 00:40:57 +00:00
|
|
|
static int
|
2015-05-28 22:01:50 +00:00
|
|
|
pci_iov_init(device_t dev, uint16_t num_vfs, const nvlist_t *config)
|
2015-03-01 00:40:57 +00:00
|
|
|
{
|
|
|
|
const nvlist_t *device, *driver_config;
|
|
|
|
|
|
|
|
device = nvlist_get_nvlist(config, PF_CONFIG_NAME);
|
|
|
|
driver_config = nvlist_get_nvlist(device, DRIVER_CONFIG_NAME);
|
2015-05-28 22:01:50 +00:00
|
|
|
return (PCI_IOV_INIT(dev, num_vfs, driver_config));
|
2015-03-01 00:40:57 +00:00
|
|
|
}
|
|
|
|
|
2015-03-01 00:40:26 +00:00
|
|
|
static int
|
|
|
|
pci_iov_init_rman(device_t pf, struct pcicfg_iov *iov)
|
|
|
|
{
|
|
|
|
int error;
|
|
|
|
|
|
|
|
iov->rman.rm_start = 0;
|
2016-03-03 05:07:35 +00:00
|
|
|
iov->rman.rm_end = ~0;
|
2015-03-01 00:40:26 +00:00
|
|
|
iov->rman.rm_type = RMAN_ARRAY;
|
|
|
|
snprintf(iov->rman_name, sizeof(iov->rman_name), "%s VF I/O memory",
|
|
|
|
device_get_nameunit(pf));
|
|
|
|
iov->rman.rm_descr = iov->rman_name;
|
|
|
|
|
|
|
|
error = rman_init(&iov->rman);
|
|
|
|
if (error != 0)
|
|
|
|
return (error);
|
|
|
|
|
|
|
|
iov->iov_flags |= IOV_RMAN_INITED;
|
|
|
|
return (0);
|
|
|
|
}
|
|
|
|
|
2016-03-02 09:54:58 +00:00
|
|
|
static int
|
|
|
|
pci_iov_alloc_bar_ea(struct pci_devinfo *dinfo, int bar)
|
|
|
|
{
|
|
|
|
struct pcicfg_iov *iov;
|
|
|
|
rman_res_t start, end;
|
|
|
|
struct resource *res;
|
|
|
|
struct resource_list *rl;
|
|
|
|
struct resource_list_entry *rle;
|
|
|
|
|
|
|
|
rl = &dinfo->resources;
|
|
|
|
iov = dinfo->cfg.iov;
|
|
|
|
|
|
|
|
rle = resource_list_find(rl, SYS_RES_MEMORY,
|
|
|
|
iov->iov_pos + PCIR_SRIOV_BAR(bar));
|
|
|
|
if (rle == NULL)
|
|
|
|
rle = resource_list_find(rl, SYS_RES_IOPORT,
|
|
|
|
iov->iov_pos + PCIR_SRIOV_BAR(bar));
|
|
|
|
if (rle == NULL)
|
|
|
|
return (ENXIO);
|
|
|
|
res = rle->res;
|
|
|
|
|
|
|
|
iov->iov_bar[bar].res = res;
|
|
|
|
iov->iov_bar[bar].bar_size = rman_get_size(res) / iov->iov_num_vfs;
|
|
|
|
iov->iov_bar[bar].bar_shift = pci_mapsize(iov->iov_bar[bar].bar_size);
|
|
|
|
|
|
|
|
start = rman_get_start(res);
|
|
|
|
end = rman_get_end(res);
|
|
|
|
|
|
|
|
return (rman_manage_region(&iov->rman, start, end));
|
|
|
|
}
|
|
|
|
|
2015-03-01 00:40:26 +00:00
|
|
|
static int
|
|
|
|
pci_iov_setup_bars(struct pci_devinfo *dinfo)
|
|
|
|
{
|
|
|
|
device_t dev;
|
|
|
|
struct pcicfg_iov *iov;
|
|
|
|
pci_addr_t bar_value, testval;
|
|
|
|
int i, last_64, error;
|
|
|
|
|
|
|
|
iov = dinfo->cfg.iov;
|
|
|
|
dev = dinfo->cfg.dev;
|
|
|
|
last_64 = 0;
|
|
|
|
|
2016-03-02 09:54:58 +00:00
|
|
|
pci_add_resources_ea(device_get_parent(dev), dev, 1);
|
|
|
|
|
2015-03-01 00:40:26 +00:00
|
|
|
for (i = 0; i <= PCIR_MAX_BAR_0; i++) {
|
2016-03-02 09:54:58 +00:00
|
|
|
/* First, try to use BARs allocated with EA */
|
|
|
|
error = pci_iov_alloc_bar_ea(dinfo, i);
|
|
|
|
if (error == 0)
|
|
|
|
continue;
|
|
|
|
|
|
|
|
/* Allocate legacy-BAR only if EA is not enabled */
|
|
|
|
if (pci_ea_is_enabled(dev, iov->iov_pos + PCIR_SRIOV_BAR(i)))
|
|
|
|
continue;
|
|
|
|
|
2015-03-01 00:40:26 +00:00
|
|
|
/*
|
|
|
|
* If a PCI BAR is a 64-bit wide BAR, then it spans two
|
|
|
|
* consecutive registers. Therefore if the last BAR that
|
|
|
|
* we looked at was a 64-bit BAR, we need to skip this
|
|
|
|
* register as it's the second half of the last BAR.
|
|
|
|
*/
|
|
|
|
if (!last_64) {
|
|
|
|
pci_read_bar(dev,
|
|
|
|
iov->iov_pos + PCIR_SRIOV_BAR(i),
|
|
|
|
&bar_value, &testval, &last_64);
|
|
|
|
|
|
|
|
if (testval != 0) {
|
|
|
|
error = pci_iov_alloc_bar(dinfo, i,
|
|
|
|
pci_mapsize(testval));
|
|
|
|
if (error != 0)
|
|
|
|
return (error);
|
|
|
|
}
|
|
|
|
} else
|
|
|
|
last_64 = 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
return (0);
|
|
|
|
}
|
|
|
|
|
2015-03-01 00:40:09 +00:00
|
|
|
static void
|
2015-03-01 00:40:57 +00:00
|
|
|
pci_iov_enumerate_vfs(struct pci_devinfo *dinfo, const nvlist_t *config,
|
2015-03-01 00:40:09 +00:00
|
|
|
uint16_t first_rid, uint16_t rid_stride)
|
|
|
|
{
|
2015-03-01 00:40:57 +00:00
|
|
|
char device_name[VF_MAX_NAME];
|
|
|
|
const nvlist_t *device, *driver_config, *iov_config;
|
2015-03-01 00:40:09 +00:00
|
|
|
device_t bus, dev, vf;
|
|
|
|
struct pcicfg_iov *iov;
|
|
|
|
struct pci_devinfo *vfinfo;
|
|
|
|
int i, error;
|
|
|
|
uint16_t vid, did, next_rid;
|
|
|
|
|
|
|
|
iov = dinfo->cfg.iov;
|
|
|
|
dev = dinfo->cfg.dev;
|
|
|
|
bus = device_get_parent(dev);
|
|
|
|
next_rid = first_rid;
|
|
|
|
vid = pci_get_vendor(dev);
|
|
|
|
did = IOV_READ(dinfo, PCIR_SRIOV_VF_DID, 2);
|
|
|
|
|
|
|
|
for (i = 0; i < iov->iov_num_vfs; i++, next_rid += rid_stride) {
|
2015-03-01 00:40:57 +00:00
|
|
|
snprintf(device_name, sizeof(device_name), VF_PREFIX"%d", i);
|
|
|
|
device = nvlist_get_nvlist(config, device_name);
|
|
|
|
iov_config = nvlist_get_nvlist(device, IOV_CONFIG_NAME);
|
|
|
|
driver_config = nvlist_get_nvlist(device, DRIVER_CONFIG_NAME);
|
2015-03-01 00:40:09 +00:00
|
|
|
|
|
|
|
vf = PCI_CREATE_IOV_CHILD(bus, dev, next_rid, vid, did);
|
|
|
|
if (vf == NULL)
|
|
|
|
break;
|
|
|
|
|
2015-03-01 00:40:57 +00:00
|
|
|
/*
|
|
|
|
* If we are creating passthrough devices then force the ppt
|
|
|
|
* driver to attach to prevent a VF driver from claiming the
|
|
|
|
* VFs.
|
|
|
|
*/
|
|
|
|
if (nvlist_get_bool(iov_config, "passthrough"))
|
2015-03-10 23:27:13 +00:00
|
|
|
device_set_devclass_fixed(vf, "ppt");
|
2015-03-01 00:40:57 +00:00
|
|
|
|
2015-03-01 00:40:09 +00:00
|
|
|
vfinfo = device_get_ivars(vf);
|
|
|
|
|
|
|
|
vfinfo->cfg.iov = iov;
|
|
|
|
vfinfo->cfg.vf.index = i;
|
|
|
|
|
2015-03-01 00:40:26 +00:00
|
|
|
pci_iov_add_bars(iov, vfinfo);
|
|
|
|
|
2015-05-28 22:01:50 +00:00
|
|
|
error = PCI_IOV_ADD_VF(dev, i, driver_config);
|
2015-03-01 00:40:09 +00:00
|
|
|
if (error != 0) {
|
|
|
|
device_printf(dev, "Failed to add VF %d\n", i);
|
2016-04-06 04:10:22 +00:00
|
|
|
device_delete_child(bus, vf);
|
2015-03-01 00:40:09 +00:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
bus_generic_attach(bus);
|
|
|
|
}
|
|
|
|
|
|
|
|
static int
|
|
|
|
pci_iov_config(struct cdev *cdev, struct pci_iov_arg *arg)
|
|
|
|
{
|
|
|
|
device_t bus, dev;
|
|
|
|
struct pci_devinfo *dinfo;
|
|
|
|
struct pcicfg_iov *iov;
|
2015-03-01 00:40:57 +00:00
|
|
|
nvlist_t *config;
|
2015-03-01 00:40:26 +00:00
|
|
|
int i, error;
|
2015-03-01 00:40:09 +00:00
|
|
|
uint16_t rid_off, rid_stride;
|
|
|
|
uint16_t first_rid, last_rid;
|
|
|
|
uint16_t iov_ctl;
|
2015-03-01 00:40:57 +00:00
|
|
|
uint16_t num_vfs, total_vfs;
|
2015-03-01 00:40:09 +00:00
|
|
|
int iov_inited;
|
|
|
|
|
|
|
|
mtx_lock(&Giant);
|
|
|
|
dinfo = cdev->si_drv1;
|
|
|
|
iov = dinfo->cfg.iov;
|
|
|
|
dev = dinfo->cfg.dev;
|
|
|
|
bus = device_get_parent(dev);
|
|
|
|
iov_inited = 0;
|
2015-03-01 00:40:57 +00:00
|
|
|
config = NULL;
|
2015-03-01 00:40:09 +00:00
|
|
|
|
2015-03-01 00:40:34 +00:00
|
|
|
if ((iov->iov_flags & IOV_BUSY) || iov->iov_num_vfs != 0) {
|
2015-03-01 00:40:09 +00:00
|
|
|
mtx_unlock(&Giant);
|
|
|
|
return (EBUSY);
|
|
|
|
}
|
2015-03-01 00:40:34 +00:00
|
|
|
iov->iov_flags |= IOV_BUSY;
|
2015-03-01 00:40:09 +00:00
|
|
|
|
2015-03-01 00:40:57 +00:00
|
|
|
error = pci_iov_parse_config(iov, arg, &config);
|
|
|
|
if (error != 0)
|
|
|
|
goto out;
|
2015-03-01 00:40:09 +00:00
|
|
|
|
2015-03-01 00:40:57 +00:00
|
|
|
num_vfs = pci_iov_config_get_num_vfs(config);
|
|
|
|
total_vfs = IOV_READ(dinfo, PCIR_SRIOV_TOTAL_VFS, 2);
|
|
|
|
if (num_vfs > total_vfs) {
|
2015-03-01 00:40:09 +00:00
|
|
|
error = EINVAL;
|
|
|
|
goto out;
|
|
|
|
}
|
|
|
|
|
|
|
|
error = pci_iov_config_page_size(dinfo);
|
|
|
|
if (error != 0)
|
|
|
|
goto out;
|
|
|
|
|
|
|
|
error = pci_iov_set_ari(bus);
|
|
|
|
if (error != 0)
|
|
|
|
goto out;
|
|
|
|
|
2015-05-28 22:01:50 +00:00
|
|
|
error = pci_iov_init(dev, num_vfs, config);
|
2015-03-01 00:40:09 +00:00
|
|
|
if (error != 0)
|
|
|
|
goto out;
|
|
|
|
iov_inited = 1;
|
2015-03-01 00:40:57 +00:00
|
|
|
|
|
|
|
IOV_WRITE(dinfo, PCIR_SRIOV_NUM_VFS, num_vfs, 2);
|
2015-03-01 00:40:09 +00:00
|
|
|
|
|
|
|
rid_off = IOV_READ(dinfo, PCIR_SRIOV_VF_OFF, 2);
|
|
|
|
rid_stride = IOV_READ(dinfo, PCIR_SRIOV_VF_STRIDE, 2);
|
|
|
|
|
|
|
|
first_rid = pci_get_rid(dev) + rid_off;
|
2015-03-01 00:40:57 +00:00
|
|
|
last_rid = first_rid + (num_vfs - 1) * rid_stride;
|
2015-03-01 00:40:09 +00:00
|
|
|
|
|
|
|
/* We don't yet support allocating extra bus numbers for VFs. */
|
|
|
|
if (pci_get_bus(dev) != PCI_RID2BUS(last_rid)) {
|
|
|
|
error = ENOSPC;
|
|
|
|
goto out;
|
|
|
|
}
|
|
|
|
|
|
|
|
iov_ctl = IOV_READ(dinfo, PCIR_SRIOV_CTL, 2);
|
|
|
|
iov_ctl &= ~(PCIM_SRIOV_VF_EN | PCIM_SRIOV_VF_MSE);
|
|
|
|
IOV_WRITE(dinfo, PCIR_SRIOV_CTL, iov_ctl, 2);
|
|
|
|
|
2015-03-01 00:40:26 +00:00
|
|
|
error = pci_iov_init_rman(dev, iov);
|
|
|
|
if (error != 0)
|
|
|
|
goto out;
|
|
|
|
|
2015-03-01 00:40:57 +00:00
|
|
|
iov->iov_num_vfs = num_vfs;
|
2015-03-01 00:40:09 +00:00
|
|
|
|
2015-03-01 00:40:26 +00:00
|
|
|
error = pci_iov_setup_bars(dinfo);
|
|
|
|
if (error != 0)
|
|
|
|
goto out;
|
|
|
|
|
2015-03-01 00:40:09 +00:00
|
|
|
iov_ctl = IOV_READ(dinfo, PCIR_SRIOV_CTL, 2);
|
2015-03-01 00:40:26 +00:00
|
|
|
iov_ctl |= PCIM_SRIOV_VF_EN | PCIM_SRIOV_VF_MSE;
|
2015-03-01 00:40:09 +00:00
|
|
|
IOV_WRITE(dinfo, PCIR_SRIOV_CTL, iov_ctl, 2);
|
|
|
|
|
|
|
|
/* Per specification, we must wait 100ms before accessing VFs. */
|
|
|
|
pause("iov", roundup(hz, 10));
|
2015-03-01 00:40:57 +00:00
|
|
|
pci_iov_enumerate_vfs(dinfo, config, first_rid, rid_stride);
|
|
|
|
|
|
|
|
nvlist_destroy(config);
|
|
|
|
iov->iov_flags &= ~IOV_BUSY;
|
2015-03-01 00:40:09 +00:00
|
|
|
mtx_unlock(&Giant);
|
|
|
|
|
|
|
|
return (0);
|
|
|
|
out:
|
|
|
|
if (iov_inited)
|
2015-05-28 22:01:50 +00:00
|
|
|
PCI_IOV_UNINIT(dev);
|
2015-03-01 00:40:26 +00:00
|
|
|
|
|
|
|
for (i = 0; i <= PCIR_MAX_BAR_0; i++) {
|
|
|
|
if (iov->iov_bar[i].res != NULL) {
|
|
|
|
pci_release_resource(bus, dev, SYS_RES_MEMORY,
|
|
|
|
iov->iov_pos + PCIR_SRIOV_BAR(i),
|
|
|
|
iov->iov_bar[i].res);
|
|
|
|
pci_delete_resource(bus, dev, SYS_RES_MEMORY,
|
|
|
|
iov->iov_pos + PCIR_SRIOV_BAR(i));
|
|
|
|
iov->iov_bar[i].res = NULL;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
if (iov->iov_flags & IOV_RMAN_INITED) {
|
|
|
|
rman_fini(&iov->rman);
|
|
|
|
iov->iov_flags &= ~IOV_RMAN_INITED;
|
|
|
|
}
|
2015-03-01 00:40:57 +00:00
|
|
|
|
|
|
|
nvlist_destroy(config);
|
2015-03-01 00:40:09 +00:00
|
|
|
iov->iov_num_vfs = 0;
|
2015-03-01 00:40:34 +00:00
|
|
|
iov->iov_flags &= ~IOV_BUSY;
|
2015-03-01 00:40:09 +00:00
|
|
|
mtx_unlock(&Giant);
|
|
|
|
return (error);
|
|
|
|
}
|
|
|
|
|
2016-05-03 19:45:24 +00:00
|
|
|
void
|
|
|
|
pci_iov_cfg_restore(device_t dev, struct pci_devinfo *dinfo)
|
|
|
|
{
|
|
|
|
struct pcicfg_iov *iov;
|
|
|
|
|
|
|
|
iov = dinfo->cfg.iov;
|
|
|
|
|
|
|
|
IOV_WRITE(dinfo, PCIR_SRIOV_PAGE_SIZE, iov->iov_page_size, 4);
|
|
|
|
IOV_WRITE(dinfo, PCIR_SRIOV_NUM_VFS, iov->iov_num_vfs, 2);
|
|
|
|
IOV_WRITE(dinfo, PCIR_SRIOV_CTL, iov->iov_ctl, 2);
|
|
|
|
}
|
|
|
|
|
|
|
|
void
|
|
|
|
pci_iov_cfg_save(device_t dev, struct pci_devinfo *dinfo)
|
|
|
|
{
|
|
|
|
struct pcicfg_iov *iov;
|
|
|
|
|
|
|
|
iov = dinfo->cfg.iov;
|
|
|
|
|
|
|
|
iov->iov_page_size = IOV_READ(dinfo, PCIR_SRIOV_PAGE_SIZE, 4);
|
|
|
|
iov->iov_ctl = IOV_READ(dinfo, PCIR_SRIOV_CTL, 2);
|
|
|
|
}
|
|
|
|
|
2015-03-01 00:40:34 +00:00
|
|
|
/* Return true if child is a VF of the given PF. */
|
|
|
|
static int
|
|
|
|
pci_iov_is_child_vf(struct pcicfg_iov *pf, device_t child)
|
|
|
|
{
|
|
|
|
struct pci_devinfo *vfinfo;
|
|
|
|
|
|
|
|
vfinfo = device_get_ivars(child);
|
|
|
|
|
|
|
|
if (!(vfinfo->cfg.flags & PCICFG_VF))
|
|
|
|
return (0);
|
|
|
|
|
|
|
|
return (pf == vfinfo->cfg.iov);
|
|
|
|
}
|
|
|
|
|
|
|
|
static int
|
|
|
|
pci_iov_delete(struct cdev *cdev)
|
|
|
|
{
|
|
|
|
device_t bus, dev, vf, *devlist;
|
|
|
|
struct pci_devinfo *dinfo;
|
|
|
|
struct pcicfg_iov *iov;
|
|
|
|
int i, error, devcount;
|
|
|
|
uint32_t iov_ctl;
|
|
|
|
|
|
|
|
mtx_lock(&Giant);
|
|
|
|
dinfo = cdev->si_drv1;
|
|
|
|
iov = dinfo->cfg.iov;
|
|
|
|
dev = dinfo->cfg.dev;
|
|
|
|
bus = device_get_parent(dev);
|
|
|
|
devlist = NULL;
|
|
|
|
|
|
|
|
if (iov->iov_flags & IOV_BUSY) {
|
|
|
|
mtx_unlock(&Giant);
|
|
|
|
return (EBUSY);
|
|
|
|
}
|
|
|
|
|
|
|
|
if (iov->iov_num_vfs == 0) {
|
|
|
|
mtx_unlock(&Giant);
|
|
|
|
return (ECHILD);
|
|
|
|
}
|
|
|
|
|
|
|
|
iov->iov_flags |= IOV_BUSY;
|
|
|
|
|
|
|
|
error = device_get_children(bus, &devlist, &devcount);
|
|
|
|
|
|
|
|
if (error != 0)
|
|
|
|
goto out;
|
|
|
|
|
|
|
|
for (i = 0; i < devcount; i++) {
|
|
|
|
vf = devlist[i];
|
|
|
|
|
|
|
|
if (!pci_iov_is_child_vf(iov, vf))
|
|
|
|
continue;
|
|
|
|
|
|
|
|
error = device_detach(vf);
|
|
|
|
if (error != 0) {
|
|
|
|
device_printf(dev,
|
|
|
|
"Could not disable SR-IOV: failed to detach VF %s\n",
|
|
|
|
device_get_nameunit(vf));
|
|
|
|
goto out;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
for (i = 0; i < devcount; i++) {
|
|
|
|
vf = devlist[i];
|
|
|
|
|
|
|
|
if (pci_iov_is_child_vf(iov, vf))
|
2016-04-06 04:10:22 +00:00
|
|
|
device_delete_child(bus, vf);
|
2015-03-01 00:40:34 +00:00
|
|
|
}
|
2015-05-28 22:01:50 +00:00
|
|
|
PCI_IOV_UNINIT(dev);
|
2015-03-01 00:40:34 +00:00
|
|
|
|
|
|
|
iov_ctl = IOV_READ(dinfo, PCIR_SRIOV_CTL, 2);
|
|
|
|
iov_ctl &= ~(PCIM_SRIOV_VF_EN | PCIM_SRIOV_VF_MSE);
|
|
|
|
IOV_WRITE(dinfo, PCIR_SRIOV_CTL, iov_ctl, 2);
|
|
|
|
IOV_WRITE(dinfo, PCIR_SRIOV_NUM_VFS, 0, 2);
|
|
|
|
|
|
|
|
iov->iov_num_vfs = 0;
|
|
|
|
|
|
|
|
for (i = 0; i <= PCIR_MAX_BAR_0; i++) {
|
|
|
|
if (iov->iov_bar[i].res != NULL) {
|
|
|
|
pci_release_resource(bus, dev, SYS_RES_MEMORY,
|
|
|
|
iov->iov_pos + PCIR_SRIOV_BAR(i),
|
|
|
|
iov->iov_bar[i].res);
|
|
|
|
pci_delete_resource(bus, dev, SYS_RES_MEMORY,
|
|
|
|
iov->iov_pos + PCIR_SRIOV_BAR(i));
|
|
|
|
iov->iov_bar[i].res = NULL;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
if (iov->iov_flags & IOV_RMAN_INITED) {
|
|
|
|
rman_fini(&iov->rman);
|
|
|
|
iov->iov_flags &= ~IOV_RMAN_INITED;
|
|
|
|
}
|
|
|
|
|
|
|
|
error = 0;
|
|
|
|
out:
|
|
|
|
free(devlist, M_TEMP);
|
|
|
|
iov->iov_flags &= ~IOV_BUSY;
|
|
|
|
mtx_unlock(&Giant);
|
|
|
|
return (error);
|
|
|
|
}
|
|
|
|
|
2015-03-01 00:40:42 +00:00
|
|
|
static int
|
|
|
|
pci_iov_get_schema_ioctl(struct cdev *cdev, struct pci_iov_schema *output)
|
|
|
|
{
|
|
|
|
struct pci_devinfo *dinfo;
|
|
|
|
void *packed;
|
|
|
|
size_t output_len, size;
|
|
|
|
int error;
|
|
|
|
|
|
|
|
packed = NULL;
|
|
|
|
|
|
|
|
mtx_lock(&Giant);
|
|
|
|
dinfo = cdev->si_drv1;
|
|
|
|
packed = nvlist_pack(dinfo->cfg.iov->iov_schema, &size);
|
|
|
|
mtx_unlock(&Giant);
|
|
|
|
|
|
|
|
if (packed == NULL) {
|
|
|
|
error = ENOMEM;
|
|
|
|
goto fail;
|
|
|
|
}
|
|
|
|
|
|
|
|
output_len = output->len;
|
|
|
|
output->len = size;
|
|
|
|
if (size <= output_len) {
|
|
|
|
error = copyout(packed, output->schema, size);
|
|
|
|
|
|
|
|
if (error != 0)
|
|
|
|
goto fail;
|
|
|
|
|
|
|
|
output->error = 0;
|
|
|
|
} else
|
|
|
|
/*
|
|
|
|
* If we return an error then the ioctl code won't copyout
|
|
|
|
* output back to userland, so we flag the error in the struct
|
|
|
|
* instead.
|
|
|
|
*/
|
|
|
|
output->error = EMSGSIZE;
|
|
|
|
|
|
|
|
error = 0;
|
|
|
|
|
|
|
|
fail:
|
|
|
|
free(packed, M_NVLIST);
|
|
|
|
|
|
|
|
return (error);
|
|
|
|
}
|
2015-03-01 00:40:34 +00:00
|
|
|
|
2015-03-01 00:40:09 +00:00
|
|
|
static int
|
|
|
|
pci_iov_ioctl(struct cdev *dev, u_long cmd, caddr_t data, int fflag,
|
|
|
|
struct thread *td)
|
|
|
|
{
|
|
|
|
|
|
|
|
switch (cmd) {
|
|
|
|
case IOV_CONFIG:
|
|
|
|
return (pci_iov_config(dev, (struct pci_iov_arg *)data));
|
2015-03-01 00:40:34 +00:00
|
|
|
case IOV_DELETE:
|
|
|
|
return (pci_iov_delete(dev));
|
2015-03-01 00:40:42 +00:00
|
|
|
case IOV_GET_SCHEMA:
|
|
|
|
return (pci_iov_get_schema_ioctl(dev,
|
|
|
|
(struct pci_iov_schema *)data));
|
2015-03-01 00:40:09 +00:00
|
|
|
default:
|
|
|
|
return (EINVAL);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2015-03-01 00:40:26 +00:00
|
|
|
struct resource *
|
2016-01-27 02:23:54 +00:00
|
|
|
pci_vf_alloc_mem_resource(device_t dev, device_t child, int *rid,
|
|
|
|
rman_res_t start, rman_res_t end, rman_res_t count, u_int flags)
|
2015-03-01 00:40:26 +00:00
|
|
|
{
|
|
|
|
struct pci_devinfo *dinfo;
|
|
|
|
struct pcicfg_iov *iov;
|
|
|
|
struct pci_map *map;
|
|
|
|
struct resource *res;
|
|
|
|
struct resource_list_entry *rle;
|
2016-01-27 02:23:54 +00:00
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rman_res_t bar_start, bar_end;
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2015-03-01 00:40:26 +00:00
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pci_addr_t bar_length;
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int error;
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dinfo = device_get_ivars(child);
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iov = dinfo->cfg.iov;
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map = pci_find_bar(child, *rid);
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if (map == NULL)
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return (NULL);
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bar_length = 1 << map->pm_size;
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bar_start = map->pm_value;
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bar_end = bar_start + bar_length - 1;
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/* Make sure that the resource fits the constraints. */
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if (bar_start >= end || bar_end <= bar_start || count != 1)
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return (NULL);
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/* Clamp the resource to the constraints if necessary. */
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if (bar_start < start)
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bar_start = start;
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if (bar_end > end)
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bar_end = end;
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bar_length = bar_end - bar_start + 1;
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res = rman_reserve_resource(&iov->rman, bar_start, bar_end,
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bar_length, flags, child);
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if (res == NULL)
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return (NULL);
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rle = resource_list_add(&dinfo->resources, SYS_RES_MEMORY, *rid,
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bar_start, bar_end, 1);
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if (rle == NULL) {
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rman_release_resource(res);
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return (NULL);
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}
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rman_set_rid(res, *rid);
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if (flags & RF_ACTIVE) {
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error = bus_activate_resource(child, SYS_RES_MEMORY, *rid, res);
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if (error != 0) {
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resource_list_delete(&dinfo->resources, SYS_RES_MEMORY,
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*rid);
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rman_release_resource(res);
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return (NULL);
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}
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}
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rle->res = res;
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return (res);
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}
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int
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pci_vf_release_mem_resource(device_t dev, device_t child, int rid,
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struct resource *r)
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{
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struct pci_devinfo *dinfo;
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struct resource_list_entry *rle;
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int error;
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dinfo = device_get_ivars(child);
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if (rman_get_flags(r) & RF_ACTIVE) {
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error = bus_deactivate_resource(child, SYS_RES_MEMORY, rid, r);
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if (error != 0)
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return (error);
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}
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rle = resource_list_find(&dinfo->resources, SYS_RES_MEMORY, rid);
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if (rle != NULL) {
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rle->res = NULL;
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resource_list_delete(&dinfo->resources, SYS_RES_MEMORY,
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rid);
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}
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return (rman_release_resource(r));
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}
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