118 lines
2.9 KiB
ArmAsm
118 lines
2.9 KiB
ArmAsm
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/*
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* Copyright (C) 2014 Andrew Turner
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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*/
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#include <machine/asm.h>
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__FBSDID("$FreeBSD$");
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#define PCR_Z (1 << 30)
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#define PCR_C (1 << 29)
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/*
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* These functions return the result in the CPSR register.
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*
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* For __aeabi_cdcmple:
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* Z C
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* LT 0 0
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* EQ 1 1
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* else 0 1
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*
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* __aeabi_cdrcmple is the same as __aeabi_cdcmple, however the arguments
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* have been swapped.
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*/
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ENTRY(__aeabi_cdcmple)
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push {r4, r5, r6, r7, ip, lr}
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/* Backup the input registers */
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mov r4, r0
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mov r5, r1
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mov r6, r2
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mov r7, r3
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/* Is it less than? */
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bl __aeabi_dcmplt
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cmp r0, #1
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bne 1f
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/* Yes, clear Z and C */
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msr cpsr_c, #(0)
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b 99f
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1:
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/* Restore the input regsters for the next function call */
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mov r0, r4
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mov r1, r5
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mov r2, r6
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mov r3, r7
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/* Is it equal? */
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bl __aeabi_dcmpeq
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cmp r0, #1
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bne 2f
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/* Yes, set Z and C */
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msr cpsr_c, #(PCR_Z | PCR_C)
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b 99f
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2:
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/* Not less than or equal, set C and clear Z */
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msr cpsr_c, #(PCR_C)
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99:
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pop {r4, r5, r6, r7, ip, pc}
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END(__aeabi_cdcmple)
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ENTRY(__aeabi_cdrcmple)
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/* Swap the first half of the arguments */
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mov ip, r0
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mov r0, r2
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mov r2, ip
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/* And the second half */
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mov ip, r1
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mov r1, r3
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mov r3, ip
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b __aeabi_cdcmple
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END(__aeabi_cdrcmple)
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/*
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* This is just like __aeabi_cdcmple except it will not throw an exception
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* in the presence of a quiet NaN. If either argument is a signalling NaN we
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* will still signal.
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*/
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ENTRY(__aeabi_cdcmpeq)
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/* Check if we can call __aeabi_cfcmple safely */
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push {r0, r1, r2, r3, r4, lr}
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bl __aeabi_cdcmpeq_helper
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cmp r0, #1
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pop {r0, r1, r2, r3, r4, lr}
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beq 1f
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bl __aeabi_cdcmple
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RET
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1:
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msr cpsr_c, #(PCR_C)
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RET
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END(__aeabi_cdcmpeq)
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