2016-11-15 20:35:29 +00:00
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/*-
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* Broadcom NetXtreme-C/E network driver.
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*
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* Copyright (c) 2016 Broadcom, All Rights Reserved.
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* The term Broadcom refers to Broadcom Limited and/or its subsidiaries
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS'
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
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* THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/types.h>
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#include <sys/socket.h>
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#include <sys/endian.h>
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#include <net/if.h>
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#include <net/if_var.h>
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#include <net/ethernet.h>
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#include <net/iflib.h>
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#include "opt_inet.h"
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#include "opt_inet6.h"
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#include "opt_rss.h"
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#include "bnxt.h"
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/*
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* Function prototypes
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*/
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static int bnxt_isc_txd_encap(void *sc, if_pkt_info_t pi);
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2017-03-13 22:53:06 +00:00
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static void bnxt_isc_txd_flush(void *sc, uint16_t txqid, qidx_t pidx);
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static int bnxt_isc_txd_credits_update(void *sc, uint16_t txqid, bool clear);
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2016-11-15 20:35:29 +00:00
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2017-03-13 22:53:06 +00:00
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static void bnxt_isc_rxd_refill(void *sc, if_rxd_update_t iru);
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/* uint16_t rxqid, uint8_t flid,
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2016-11-15 20:35:29 +00:00
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uint32_t pidx, uint64_t *paddrs, caddr_t *vaddrs, uint16_t count,
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uint16_t buf_size);
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2017-03-13 22:53:06 +00:00
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*/
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2016-11-15 20:35:29 +00:00
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static void bnxt_isc_rxd_flush(void *sc, uint16_t rxqid, uint8_t flid,
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2017-03-13 22:53:06 +00:00
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qidx_t pidx);
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static int bnxt_isc_rxd_available(void *sc, uint16_t rxqid, qidx_t idx,
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qidx_t budget);
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2016-11-15 20:35:29 +00:00
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static int bnxt_isc_rxd_pkt_get(void *sc, if_rxd_info_t ri);
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static int bnxt_intr(void *sc);
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struct if_txrx bnxt_txrx = {
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bnxt_isc_txd_encap,
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bnxt_isc_txd_flush,
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bnxt_isc_txd_credits_update,
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bnxt_isc_rxd_available,
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bnxt_isc_rxd_pkt_get,
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bnxt_isc_rxd_refill,
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bnxt_isc_rxd_flush,
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bnxt_intr
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};
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/*
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* Device Dependent Packet Transmit and Receive Functions
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*/
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static const uint16_t bnxt_tx_lhint[] = {
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TX_BD_SHORT_FLAGS_LHINT_LT512,
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TX_BD_SHORT_FLAGS_LHINT_LT1K,
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TX_BD_SHORT_FLAGS_LHINT_LT2K,
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TX_BD_SHORT_FLAGS_LHINT_LT2K,
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TX_BD_SHORT_FLAGS_LHINT_GTE2K,
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};
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static int
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bnxt_isc_txd_encap(void *sc, if_pkt_info_t pi)
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{
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struct bnxt_softc *softc = (struct bnxt_softc *)sc;
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struct bnxt_ring *txr = &softc->tx_rings[pi->ipi_qsidx];
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struct tx_bd_long *tbd;
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struct tx_bd_long_hi *tbdh;
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bool need_hi = false;
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uint16_t flags_type;
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uint16_t lflags;
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uint32_t cfa_meta;
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int seg = 0;
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/* If we have offloads enabled, we need to use two BDs. */
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if ((pi->ipi_csum_flags & (CSUM_OFFLOAD | CSUM_TSO | CSUM_IP)) ||
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pi->ipi_mflags & M_VLANTAG)
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need_hi = true;
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/* TODO: Devices before Cu+B1 need to not mix long and short BDs */
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need_hi = true;
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pi->ipi_new_pidx = pi->ipi_pidx;
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tbd = &((struct tx_bd_long *)txr->vaddr)[pi->ipi_new_pidx];
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pi->ipi_ndescs = 0;
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/* No need to byte-swap the opaque value */
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tbd->opaque = ((pi->ipi_nsegs + need_hi) << 24) | pi->ipi_new_pidx;
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tbd->len = htole16(pi->ipi_segs[seg].ds_len);
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tbd->addr = htole64(pi->ipi_segs[seg++].ds_addr);
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flags_type = ((pi->ipi_nsegs + need_hi) <<
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TX_BD_SHORT_FLAGS_BD_CNT_SFT) & TX_BD_SHORT_FLAGS_BD_CNT_MASK;
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if (pi->ipi_len >= 2048)
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flags_type |= TX_BD_SHORT_FLAGS_LHINT_GTE2K;
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else
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flags_type |= bnxt_tx_lhint[pi->ipi_len >> 9];
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if (need_hi) {
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flags_type |= TX_BD_LONG_TYPE_TX_BD_LONG;
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pi->ipi_new_pidx = RING_NEXT(txr, pi->ipi_new_pidx);
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tbdh = &((struct tx_bd_long_hi *)txr->vaddr)[pi->ipi_new_pidx];
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tbdh->mss = htole16(pi->ipi_tso_segsz);
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tbdh->hdr_size = htole16((pi->ipi_ehdrlen + pi->ipi_ip_hlen +
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pi->ipi_tcp_hlen) >> 1);
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tbdh->cfa_action = 0;
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lflags = 0;
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cfa_meta = 0;
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if (pi->ipi_mflags & M_VLANTAG) {
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/* TODO: Do we need to byte-swap the vtag here? */
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cfa_meta = TX_BD_LONG_CFA_META_KEY_VLAN_TAG |
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pi->ipi_vtag;
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cfa_meta |= TX_BD_LONG_CFA_META_VLAN_TPID_TPID8100;
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}
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tbdh->cfa_meta = htole32(cfa_meta);
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if (pi->ipi_csum_flags & CSUM_TSO) {
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lflags |= TX_BD_LONG_LFLAGS_LSO |
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TX_BD_LONG_LFLAGS_T_IPID;
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}
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else if(pi->ipi_csum_flags & CSUM_OFFLOAD) {
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lflags |= TX_BD_LONG_LFLAGS_TCP_UDP_CHKSUM |
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TX_BD_LONG_LFLAGS_IP_CHKSUM;
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}
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else if(pi->ipi_csum_flags & CSUM_IP) {
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lflags |= TX_BD_LONG_LFLAGS_IP_CHKSUM;
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}
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tbdh->lflags = htole16(lflags);
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}
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else {
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flags_type |= TX_BD_SHORT_TYPE_TX_BD_SHORT;
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}
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for (; seg < pi->ipi_nsegs; seg++) {
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tbd->flags_type = htole16(flags_type);
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pi->ipi_new_pidx = RING_NEXT(txr, pi->ipi_new_pidx);
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tbd = &((struct tx_bd_long *)txr->vaddr)[pi->ipi_new_pidx];
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tbd->len = htole16(pi->ipi_segs[seg].ds_len);
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tbd->addr = htole64(pi->ipi_segs[seg].ds_addr);
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flags_type = TX_BD_SHORT_TYPE_TX_BD_SHORT;
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}
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flags_type |= TX_BD_SHORT_FLAGS_PACKET_END;
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tbd->flags_type = htole16(flags_type);
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pi->ipi_new_pidx = RING_NEXT(txr, pi->ipi_new_pidx);
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return 0;
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}
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static void
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2017-03-13 22:53:06 +00:00
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bnxt_isc_txd_flush(void *sc, uint16_t txqid, qidx_t pidx)
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2016-11-15 20:35:29 +00:00
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{
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struct bnxt_softc *softc = (struct bnxt_softc *)sc;
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struct bnxt_ring *tx_ring = &softc->tx_rings[txqid];
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/* pidx is what we last set ipi_new_pidx to */
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BNXT_TX_DB(tx_ring, pidx);
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/* TODO: Cumulus+ doesn't need the double doorbell */
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BNXT_TX_DB(tx_ring, pidx);
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return;
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}
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static int
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2017-03-13 22:53:06 +00:00
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bnxt_isc_txd_credits_update(void *sc, uint16_t txqid, bool clear)
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2016-11-15 20:35:29 +00:00
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{
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struct bnxt_softc *softc = (struct bnxt_softc *)sc;
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struct bnxt_cp_ring *cpr = &softc->tx_cp_rings[txqid];
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struct tx_cmpl *cmpl = (struct tx_cmpl *)cpr->ring.vaddr;
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int avail = 0;
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uint32_t cons = cpr->cons;
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bool v_bit = cpr->v_bit;
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bool last_v_bit;
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uint32_t last_cons;
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uint16_t type;
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uint16_t err;
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for (;;) {
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last_cons = cons;
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last_v_bit = v_bit;
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NEXT_CP_CONS_V(&cpr->ring, cons, v_bit);
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CMPL_PREFETCH_NEXT(cpr, cons);
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if (!CMP_VALID(&cmpl[cons], v_bit))
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goto done;
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type = cmpl[cons].flags_type & TX_CMPL_TYPE_MASK;
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switch (type) {
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case TX_CMPL_TYPE_TX_L2:
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err = (le16toh(cmpl[cons].errors_v) &
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TX_CMPL_ERRORS_BUFFER_ERROR_MASK) >>
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TX_CMPL_ERRORS_BUFFER_ERROR_SFT;
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if (err)
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device_printf(softc->dev,
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"TX completion error %u\n", err);
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/* No need to byte-swap the opaque value */
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avail += cmpl[cons].opaque >> 24;
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/*
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* If we're not clearing, iflib only cares if there's
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* at least one buffer. Don't scan the whole ring in
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* this case.
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*/
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if (!clear)
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goto done;
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break;
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default:
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if (type & 1) {
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NEXT_CP_CONS_V(&cpr->ring, cons, v_bit);
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if (!CMP_VALID(&cmpl[cons], v_bit))
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goto done;
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}
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device_printf(softc->dev,
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"Unhandled TX completion type %u\n", type);
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break;
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}
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}
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done:
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if (clear && avail) {
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cpr->cons = last_cons;
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cpr->v_bit = last_v_bit;
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BNXT_CP_IDX_DISABLE_DB(&cpr->ring, cpr->cons);
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}
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return avail;
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}
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static void
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2017-03-13 22:53:06 +00:00
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bnxt_isc_rxd_refill(void *sc, if_rxd_update_t iru)
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2016-11-15 20:35:29 +00:00
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{
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struct bnxt_softc *softc = (struct bnxt_softc *)sc;
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struct bnxt_ring *rx_ring;
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struct rx_prod_pkt_bd *rxbd;
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uint16_t type;
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uint16_t i;
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2017-03-13 22:53:06 +00:00
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uint16_t rxqid;
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uint16_t count, len;
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uint32_t pidx;
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uint8_t flid;
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uint64_t *paddrs;
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caddr_t *vaddrs;
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2017-07-03 18:23:35 +00:00
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qidx_t *frag_idxs;
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2017-03-13 22:53:06 +00:00
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rxqid = iru->iru_qsidx;
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count = iru->iru_count;
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len = iru->iru_buf_size;
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pidx = iru->iru_pidx;
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flid = iru->iru_flidx;
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vaddrs = iru->iru_vaddrs;
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paddrs = iru->iru_paddrs;
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2017-07-03 18:23:35 +00:00
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frag_idxs = iru->iru_idxs;
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2016-11-15 20:35:29 +00:00
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if (flid == 0) {
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rx_ring = &softc->rx_rings[rxqid];
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type = RX_PROD_PKT_BD_TYPE_RX_PROD_PKT;
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}
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else {
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rx_ring = &softc->ag_rings[rxqid];
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type = RX_PROD_AGG_BD_TYPE_RX_PROD_AGG;
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}
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rxbd = (void *)rx_ring->vaddr;
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for (i=0; i<count; i++) {
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rxbd[pidx].flags_type = htole16(type);
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rxbd[pidx].len = htole16(len);
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/* No need to byte-swap the opaque value */
|
2017-07-03 18:23:35 +00:00
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rxbd[pidx].opaque = (((rxqid & 0xff) << 24) | (flid << 16)
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| (frag_idxs[i]));
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2016-11-15 20:35:29 +00:00
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rxbd[pidx].addr = htole64(paddrs[i]);
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if (++pidx == rx_ring->ring_size)
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pidx = 0;
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}
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return;
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}
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static void
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bnxt_isc_rxd_flush(void *sc, uint16_t rxqid, uint8_t flid,
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2017-03-13 22:53:06 +00:00
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qidx_t pidx)
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2016-11-15 20:35:29 +00:00
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{
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struct bnxt_softc *softc = (struct bnxt_softc *)sc;
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struct bnxt_ring *rx_ring;
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if (flid == 0)
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rx_ring = &softc->rx_rings[rxqid];
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else
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rx_ring = &softc->ag_rings[rxqid];
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/*
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* We *must* update the completion ring before updating the RX ring
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* or we will overrun the completion ring and the device will wedge for
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* RX.
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*/
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|
|
if (softc->rx_cp_rings[rxqid].cons != UINT32_MAX)
|
|
|
|
BNXT_CP_IDX_DISABLE_DB(&softc->rx_cp_rings[rxqid].ring,
|
|
|
|
softc->rx_cp_rings[rxqid].cons);
|
|
|
|
/* We're given the last filled RX buffer here, not the next empty one */
|
|
|
|
BNXT_RX_DB(rx_ring, RING_NEXT(rx_ring, pidx));
|
|
|
|
/* TODO: Cumulus+ doesn't need the double doorbell */
|
|
|
|
BNXT_RX_DB(rx_ring, RING_NEXT(rx_ring, pidx));
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int
|
2017-03-13 22:53:06 +00:00
|
|
|
bnxt_isc_rxd_available(void *sc, uint16_t rxqid, qidx_t idx, qidx_t budget)
|
2016-11-15 20:35:29 +00:00
|
|
|
{
|
|
|
|
struct bnxt_softc *softc = (struct bnxt_softc *)sc;
|
|
|
|
struct bnxt_cp_ring *cpr = &softc->rx_cp_rings[rxqid];
|
|
|
|
struct rx_pkt_cmpl *rcp;
|
|
|
|
struct rx_tpa_end_cmpl *rtpae;
|
|
|
|
struct cmpl_base *cmp = (struct cmpl_base *)cpr->ring.vaddr;
|
|
|
|
int avail = 0;
|
|
|
|
uint32_t cons = cpr->cons;
|
|
|
|
bool v_bit = cpr->v_bit;
|
|
|
|
uint8_t ags;
|
|
|
|
int i;
|
|
|
|
uint16_t type;
|
|
|
|
|
|
|
|
for (;;) {
|
|
|
|
NEXT_CP_CONS_V(&cpr->ring, cons, v_bit);
|
|
|
|
CMPL_PREFETCH_NEXT(cpr, cons);
|
|
|
|
|
|
|
|
if (!CMP_VALID(&cmp[cons], v_bit))
|
|
|
|
goto cmpl_invalid;
|
|
|
|
|
|
|
|
type = le16toh(cmp[cons].type) & CMPL_BASE_TYPE_MASK;
|
|
|
|
switch (type) {
|
|
|
|
case CMPL_BASE_TYPE_RX_L2:
|
|
|
|
rcp = (void *)&cmp[cons];
|
|
|
|
ags = (rcp->agg_bufs_v1 & RX_PKT_CMPL_AGG_BUFS_MASK) >>
|
|
|
|
RX_PKT_CMPL_AGG_BUFS_SFT;
|
|
|
|
NEXT_CP_CONS_V(&cpr->ring, cons, v_bit);
|
|
|
|
CMPL_PREFETCH_NEXT(cpr, cons);
|
|
|
|
|
|
|
|
if (!CMP_VALID(&cmp[cons], v_bit))
|
|
|
|
goto cmpl_invalid;
|
|
|
|
|
|
|
|
/* Now account for all the AG completions */
|
|
|
|
for (i=0; i<ags; i++) {
|
|
|
|
NEXT_CP_CONS_V(&cpr->ring, cons, v_bit);
|
|
|
|
CMPL_PREFETCH_NEXT(cpr, cons);
|
|
|
|
if (!CMP_VALID(&cmp[cons], v_bit))
|
|
|
|
goto cmpl_invalid;
|
|
|
|
}
|
|
|
|
avail++;
|
|
|
|
break;
|
|
|
|
case CMPL_BASE_TYPE_RX_TPA_END:
|
|
|
|
rtpae = (void *)&cmp[cons];
|
|
|
|
ags = (rtpae->agg_bufs_v1 &
|
|
|
|
RX_TPA_END_CMPL_AGG_BUFS_MASK) >>
|
|
|
|
RX_TPA_END_CMPL_AGG_BUFS_SFT;
|
|
|
|
NEXT_CP_CONS_V(&cpr->ring, cons, v_bit);
|
|
|
|
CMPL_PREFETCH_NEXT(cpr, cons);
|
|
|
|
|
|
|
|
if (!CMP_VALID(&cmp[cons], v_bit))
|
|
|
|
goto cmpl_invalid;
|
|
|
|
/* Now account for all the AG completions */
|
|
|
|
for (i=0; i<ags; i++) {
|
|
|
|
NEXT_CP_CONS_V(&cpr->ring, cons, v_bit);
|
|
|
|
CMPL_PREFETCH_NEXT(cpr, cons);
|
|
|
|
if (!CMP_VALID(&cmp[cons], v_bit))
|
|
|
|
goto cmpl_invalid;
|
|
|
|
}
|
|
|
|
avail++;
|
|
|
|
break;
|
|
|
|
case CMPL_BASE_TYPE_RX_TPA_START:
|
|
|
|
NEXT_CP_CONS_V(&cpr->ring, cons, v_bit);
|
|
|
|
CMPL_PREFETCH_NEXT(cpr, cons);
|
|
|
|
|
|
|
|
if (!CMP_VALID(&cmp[cons], v_bit))
|
|
|
|
goto cmpl_invalid;
|
|
|
|
break;
|
|
|
|
case CMPL_BASE_TYPE_RX_AGG:
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
device_printf(softc->dev,
|
|
|
|
"Unhandled completion type %d on RXQ %d\n",
|
|
|
|
type, rxqid);
|
|
|
|
|
|
|
|
/* Odd completion types use two completions */
|
|
|
|
if (type & 1) {
|
|
|
|
NEXT_CP_CONS_V(&cpr->ring, cons, v_bit);
|
|
|
|
CMPL_PREFETCH_NEXT(cpr, cons);
|
|
|
|
|
|
|
|
if (!CMP_VALID(&cmp[cons], v_bit))
|
|
|
|
goto cmpl_invalid;
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
if (avail > budget)
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
cmpl_invalid:
|
|
|
|
|
|
|
|
return avail;
|
|
|
|
}
|
|
|
|
|
2017-03-14 13:54:18 +00:00
|
|
|
static void
|
|
|
|
bnxt_set_rsstype(if_rxd_info_t ri, uint8_t rss_hash_type)
|
|
|
|
{
|
|
|
|
uint8_t rss_profile_id;
|
|
|
|
|
|
|
|
rss_profile_id = BNXT_GET_RSS_PROFILE_ID(rss_hash_type);
|
|
|
|
switch (rss_profile_id) {
|
|
|
|
case BNXT_RSS_HASH_TYPE_TCPV4:
|
|
|
|
ri->iri_rsstype = M_HASHTYPE_RSS_TCP_IPV4;
|
|
|
|
break;
|
|
|
|
case BNXT_RSS_HASH_TYPE_UDPV4:
|
|
|
|
ri->iri_rsstype = M_HASHTYPE_RSS_UDP_IPV4;
|
|
|
|
break;
|
|
|
|
case BNXT_RSS_HASH_TYPE_IPV4:
|
|
|
|
ri->iri_rsstype = M_HASHTYPE_RSS_IPV4;
|
|
|
|
break;
|
|
|
|
case BNXT_RSS_HASH_TYPE_TCPV6:
|
|
|
|
ri->iri_rsstype = M_HASHTYPE_RSS_TCP_IPV6;
|
|
|
|
break;
|
|
|
|
case BNXT_RSS_HASH_TYPE_UDPV6:
|
|
|
|
ri->iri_rsstype = M_HASHTYPE_RSS_UDP_IPV6;
|
|
|
|
break;
|
|
|
|
case BNXT_RSS_HASH_TYPE_IPV6:
|
|
|
|
ri->iri_rsstype = M_HASHTYPE_RSS_IPV6;
|
|
|
|
break;
|
|
|
|
default:
|
2017-03-27 14:55:23 +00:00
|
|
|
ri->iri_rsstype = M_HASHTYPE_OPAQUE_HASH;
|
2017-03-14 13:54:18 +00:00
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2016-11-15 20:35:29 +00:00
|
|
|
static int
|
|
|
|
bnxt_pkt_get_l2(struct bnxt_softc *softc, if_rxd_info_t ri,
|
|
|
|
struct bnxt_cp_ring *cpr, uint16_t flags_type)
|
|
|
|
{
|
|
|
|
struct rx_pkt_cmpl *rcp;
|
|
|
|
struct rx_pkt_cmpl_hi *rcph;
|
|
|
|
struct rx_abuf_cmpl *acp;
|
|
|
|
uint32_t flags2;
|
|
|
|
uint32_t errors;
|
|
|
|
uint8_t ags;
|
|
|
|
int i;
|
|
|
|
|
|
|
|
rcp = &((struct rx_pkt_cmpl *)cpr->ring.vaddr)[cpr->cons];
|
|
|
|
|
|
|
|
/* Extract from the first 16-byte BD */
|
|
|
|
if (flags_type & RX_PKT_CMPL_FLAGS_RSS_VALID) {
|
|
|
|
ri->iri_flowid = le32toh(rcp->rss_hash);
|
2017-03-14 13:54:18 +00:00
|
|
|
bnxt_set_rsstype(ri, rcp->rss_hash_type);
|
2016-11-15 20:35:29 +00:00
|
|
|
}
|
|
|
|
else {
|
|
|
|
ri->iri_rsstype = M_HASHTYPE_NONE;
|
|
|
|
}
|
|
|
|
ags = (rcp->agg_bufs_v1 & RX_PKT_CMPL_AGG_BUFS_MASK) >>
|
|
|
|
RX_PKT_CMPL_AGG_BUFS_SFT;
|
|
|
|
ri->iri_nfrags = ags + 1;
|
|
|
|
/* No need to byte-swap the opaque value */
|
|
|
|
ri->iri_frags[0].irf_flid = (rcp->opaque >> 16) & 0xff;
|
|
|
|
ri->iri_frags[0].irf_idx = rcp->opaque & 0xffff;
|
|
|
|
ri->iri_frags[0].irf_len = le16toh(rcp->len);
|
|
|
|
ri->iri_len = le16toh(rcp->len);
|
|
|
|
|
|
|
|
/* Now the second 16-byte BD */
|
|
|
|
NEXT_CP_CONS_V(&cpr->ring, cpr->cons, cpr->v_bit);
|
|
|
|
ri->iri_cidx = RING_NEXT(&cpr->ring, ri->iri_cidx);
|
|
|
|
rcph = &((struct rx_pkt_cmpl_hi *)cpr->ring.vaddr)[cpr->cons];
|
|
|
|
|
|
|
|
flags2 = le32toh(rcph->flags2);
|
|
|
|
errors = le16toh(rcph->errors_v2);
|
|
|
|
if ((flags2 & RX_PKT_CMPL_FLAGS2_META_FORMAT_MASK) ==
|
|
|
|
RX_PKT_CMPL_FLAGS2_META_FORMAT_VLAN) {
|
|
|
|
ri->iri_flags |= M_VLANTAG;
|
|
|
|
/* TODO: Should this be the entire 16-bits? */
|
|
|
|
ri->iri_vtag = le32toh(rcph->metadata) &
|
|
|
|
(RX_PKT_CMPL_METADATA_VID_MASK | RX_PKT_CMPL_METADATA_DE |
|
|
|
|
RX_PKT_CMPL_METADATA_PRI_MASK);
|
|
|
|
}
|
|
|
|
if (flags2 & RX_PKT_CMPL_FLAGS2_IP_CS_CALC) {
|
|
|
|
ri->iri_csum_flags |= CSUM_IP_CHECKED;
|
|
|
|
if (!(errors & RX_PKT_CMPL_ERRORS_IP_CS_ERROR))
|
|
|
|
ri->iri_csum_flags |= CSUM_IP_VALID;
|
|
|
|
}
|
2017-11-09 22:26:49 +00:00
|
|
|
if (flags2 & (RX_PKT_CMPL_FLAGS2_L4_CS_CALC |
|
|
|
|
RX_PKT_CMPL_FLAGS2_T_L4_CS_CALC)) {
|
2016-11-15 20:35:29 +00:00
|
|
|
ri->iri_csum_flags |= CSUM_L4_CALC;
|
2017-11-09 22:26:49 +00:00
|
|
|
if (!(errors & (RX_PKT_CMPL_ERRORS_L4_CS_ERROR |
|
|
|
|
RX_PKT_CMPL_ERRORS_T_L4_CS_ERROR))) {
|
2016-11-15 20:35:29 +00:00
|
|
|
ri->iri_csum_flags |= CSUM_L4_VALID;
|
|
|
|
ri->iri_csum_data = 0xffff;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
/* And finally the ag ring stuff. */
|
|
|
|
for (i=1; i < ri->iri_nfrags; i++) {
|
|
|
|
NEXT_CP_CONS_V(&cpr->ring, cpr->cons, cpr->v_bit);
|
|
|
|
ri->iri_cidx = RING_NEXT(&cpr->ring, ri->iri_cidx);
|
|
|
|
acp = &((struct rx_abuf_cmpl *)cpr->ring.vaddr)[cpr->cons];
|
|
|
|
|
|
|
|
/* No need to byte-swap the opaque value */
|
|
|
|
ri->iri_frags[i].irf_flid = (acp->opaque >> 16 & 0xff);
|
|
|
|
ri->iri_frags[i].irf_idx = acp->opaque & 0xffff;
|
|
|
|
ri->iri_frags[i].irf_len = le16toh(acp->len);
|
|
|
|
ri->iri_len += le16toh(acp->len);
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int
|
|
|
|
bnxt_pkt_get_tpa(struct bnxt_softc *softc, if_rxd_info_t ri,
|
|
|
|
struct bnxt_cp_ring *cpr, uint16_t flags_type)
|
|
|
|
{
|
|
|
|
struct rx_tpa_end_cmpl *agend =
|
|
|
|
&((struct rx_tpa_end_cmpl *)cpr->ring.vaddr)[cpr->cons];
|
|
|
|
struct rx_tpa_end_cmpl_hi *agendh;
|
|
|
|
struct rx_abuf_cmpl *acp;
|
|
|
|
struct bnxt_full_tpa_start *tpas;
|
|
|
|
uint32_t flags2;
|
|
|
|
uint8_t ags;
|
|
|
|
uint8_t agg_id;
|
|
|
|
int i;
|
|
|
|
|
|
|
|
/* Get the agg_id */
|
|
|
|
agg_id = (agend->agg_id & RX_TPA_END_CMPL_AGG_ID_MASK) >>
|
|
|
|
RX_TPA_END_CMPL_AGG_ID_SFT;
|
2017-07-03 18:23:35 +00:00
|
|
|
tpas = &(softc->rx_rings[ri->iri_qsidx].tpa_start[agg_id]);
|
2016-11-15 20:35:29 +00:00
|
|
|
|
|
|
|
/* Extract from the first 16-byte BD */
|
|
|
|
if (le16toh(tpas->low.flags_type) & RX_TPA_START_CMPL_FLAGS_RSS_VALID) {
|
|
|
|
ri->iri_flowid = le32toh(tpas->low.rss_hash);
|
2017-03-14 13:54:18 +00:00
|
|
|
bnxt_set_rsstype(ri, tpas->low.rss_hash_type);
|
2016-11-15 20:35:29 +00:00
|
|
|
}
|
|
|
|
else {
|
|
|
|
ri->iri_rsstype = M_HASHTYPE_NONE;
|
|
|
|
}
|
|
|
|
ags = (agend->agg_bufs_v1 & RX_TPA_END_CMPL_AGG_BUFS_MASK) >>
|
|
|
|
RX_TPA_END_CMPL_AGG_BUFS_SFT;
|
|
|
|
ri->iri_nfrags = ags + 1;
|
|
|
|
/* No need to byte-swap the opaque value */
|
2017-07-03 18:23:35 +00:00
|
|
|
ri->iri_frags[0].irf_flid = ((tpas->low.opaque >> 16) & 0xff);
|
|
|
|
ri->iri_frags[0].irf_idx = (tpas->low.opaque & 0xffff);
|
2016-11-15 20:35:29 +00:00
|
|
|
ri->iri_frags[0].irf_len = le16toh(tpas->low.len);
|
|
|
|
ri->iri_len = le16toh(tpas->low.len);
|
|
|
|
|
|
|
|
/* Now the second 16-byte BD */
|
|
|
|
NEXT_CP_CONS_V(&cpr->ring, cpr->cons, cpr->v_bit);
|
|
|
|
ri->iri_cidx = RING_NEXT(&cpr->ring, ri->iri_cidx);
|
|
|
|
agendh = &((struct rx_tpa_end_cmpl_hi *)cpr->ring.vaddr)[cpr->cons];
|
|
|
|
|
|
|
|
flags2 = le32toh(tpas->high.flags2);
|
|
|
|
if ((flags2 & RX_TPA_START_CMPL_FLAGS2_META_FORMAT_MASK) ==
|
|
|
|
RX_TPA_START_CMPL_FLAGS2_META_FORMAT_VLAN) {
|
|
|
|
ri->iri_flags |= M_VLANTAG;
|
|
|
|
/* TODO: Should this be the entire 16-bits? */
|
|
|
|
ri->iri_vtag = le32toh(tpas->high.metadata) &
|
|
|
|
(RX_TPA_START_CMPL_METADATA_VID_MASK |
|
|
|
|
RX_TPA_START_CMPL_METADATA_DE |
|
|
|
|
RX_TPA_START_CMPL_METADATA_PRI_MASK);
|
|
|
|
}
|
|
|
|
if (flags2 & RX_TPA_START_CMPL_FLAGS2_IP_CS_CALC) {
|
|
|
|
ri->iri_csum_flags |= CSUM_IP_CHECKED;
|
|
|
|
ri->iri_csum_flags |= CSUM_IP_VALID;
|
|
|
|
}
|
|
|
|
if (flags2 & RX_TPA_START_CMPL_FLAGS2_L4_CS_CALC) {
|
|
|
|
ri->iri_csum_flags |= CSUM_L4_CALC;
|
|
|
|
ri->iri_csum_flags |= CSUM_L4_VALID;
|
|
|
|
ri->iri_csum_data = 0xffff;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Now the ag ring stuff. */
|
|
|
|
for (i=1; i < ri->iri_nfrags; i++) {
|
|
|
|
NEXT_CP_CONS_V(&cpr->ring, cpr->cons, cpr->v_bit);
|
|
|
|
ri->iri_cidx = RING_NEXT(&cpr->ring, ri->iri_cidx);
|
|
|
|
acp = &((struct rx_abuf_cmpl *)cpr->ring.vaddr)[cpr->cons];
|
|
|
|
|
|
|
|
/* No need to byte-swap the opaque value */
|
2017-07-03 18:23:35 +00:00
|
|
|
ri->iri_frags[i].irf_flid = ((acp->opaque >> 16) & 0xff);
|
|
|
|
ri->iri_frags[i].irf_idx = (acp->opaque & 0xffff);
|
2016-11-15 20:35:29 +00:00
|
|
|
ri->iri_frags[i].irf_len = le16toh(acp->len);
|
|
|
|
ri->iri_len += le16toh(acp->len);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* And finally, the empty BD at the end... */
|
|
|
|
ri->iri_nfrags++;
|
|
|
|
/* No need to byte-swap the opaque value */
|
2017-07-03 18:23:35 +00:00
|
|
|
ri->iri_frags[i].irf_flid = ((agend->opaque >> 16) & 0xff);
|
|
|
|
ri->iri_frags[i].irf_idx = (agend->opaque & 0xffff);
|
2016-11-15 20:35:29 +00:00
|
|
|
ri->iri_frags[i].irf_len = le16toh(agend->len);
|
|
|
|
ri->iri_len += le16toh(agend->len);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* If we return anything but zero, iflib will assert... */
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static int
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bnxt_isc_rxd_pkt_get(void *sc, if_rxd_info_t ri)
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{
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struct bnxt_softc *softc = (struct bnxt_softc *)sc;
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struct bnxt_cp_ring *cpr = &softc->rx_cp_rings[ri->iri_qsidx];
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2017-07-03 18:23:35 +00:00
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struct cmpl_base *cmp_q = (struct cmpl_base *)cpr->ring.vaddr;
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2016-11-15 20:35:29 +00:00
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struct cmpl_base *cmp;
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2017-07-03 18:23:35 +00:00
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struct rx_tpa_start_cmpl *rtpa;
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2016-11-15 20:35:29 +00:00
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uint16_t flags_type;
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uint16_t type;
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2017-07-03 18:23:35 +00:00
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uint8_t agg_id;
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2016-11-15 20:35:29 +00:00
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for (;;) {
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NEXT_CP_CONS_V(&cpr->ring, cpr->cons, cpr->v_bit);
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ri->iri_cidx = RING_NEXT(&cpr->ring, ri->iri_cidx);
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CMPL_PREFETCH_NEXT(cpr, cpr->cons);
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cmp = &((struct cmpl_base *)cpr->ring.vaddr)[cpr->cons];
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flags_type = le16toh(cmp->type);
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type = flags_type & CMPL_BASE_TYPE_MASK;
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switch (type) {
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case CMPL_BASE_TYPE_RX_L2:
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return bnxt_pkt_get_l2(softc, ri, cpr, flags_type);
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case CMPL_BASE_TYPE_RX_TPA_END:
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return bnxt_pkt_get_tpa(softc, ri, cpr, flags_type);
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case CMPL_BASE_TYPE_RX_TPA_START:
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2017-07-03 18:23:35 +00:00
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rtpa = (void *)&cmp_q[cpr->cons];
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agg_id = (rtpa->agg_id &
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RX_TPA_START_CMPL_AGG_ID_MASK) >>
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RX_TPA_START_CMPL_AGG_ID_SFT;
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softc->rx_rings[ri->iri_qsidx].tpa_start[agg_id].low = *rtpa;
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2016-11-15 20:35:29 +00:00
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NEXT_CP_CONS_V(&cpr->ring, cpr->cons, cpr->v_bit);
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ri->iri_cidx = RING_NEXT(&cpr->ring, ri->iri_cidx);
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CMPL_PREFETCH_NEXT(cpr, cpr->cons);
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2017-07-03 18:23:35 +00:00
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softc->rx_rings[ri->iri_qsidx].tpa_start[agg_id].high =
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((struct rx_tpa_start_cmpl_hi *)cmp_q)[cpr->cons];
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2016-11-15 20:35:29 +00:00
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break;
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default:
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device_printf(softc->dev,
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"Unhandled completion type %d on RXQ %d get\n",
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type, ri->iri_qsidx);
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if (type & 1) {
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NEXT_CP_CONS_V(&cpr->ring, cpr->cons,
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cpr->v_bit);
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ri->iri_cidx = RING_NEXT(&cpr->ring,
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ri->iri_cidx);
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CMPL_PREFETCH_NEXT(cpr, cpr->cons);
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}
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break;
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}
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}
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return 0;
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}
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static int
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bnxt_intr(void *sc)
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{
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struct bnxt_softc *softc = (struct bnxt_softc *)sc;
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device_printf(softc->dev, "STUB: %s @ %s:%d\n", __func__, __FILE__, __LINE__);
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return ENOSYS;
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}
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