cxgbe(4): Allow the TOE timer tunables to be set with microsecond
precision. These timers are already displayed in microseconds in the sysctl MIB. Add variables to track these tunables while here. MFC after: 3 days Sponsored by: Chelsio Communications
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73979478cc
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019c1a0111
@ -501,13 +501,10 @@ static inline unsigned int dack_ticks_to_usec(const struct adapter *adap,
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return (ticks << adap->params.tp.dack_re) / core_ticks_per_usec(adap);
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}
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static inline u_int ms_to_tcp_ticks(const struct adapter *adap, u_int ms)
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static inline u_int us_to_tcp_ticks(const struct adapter *adap, u_long us)
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{
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u_long l;
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l = (u_long)ms * adap->params.vpd.cclk >> adap->params.tp.tre;
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return (l);
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return (us * adap->params.vpd.cclk / 1000 >> adap->params.tp.tre);
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}
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void t4_set_reg_field(struct adapter *adap, unsigned int addr, u32 mask, u32 val);
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@ -294,6 +294,51 @@ TUNABLE_INT("hw.cxgbe.nofldtxq_vi", &t4_nofldtxq_vi);
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#define NOFLDRXQ_VI 1
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static int t4_nofldrxq_vi = -NOFLDRXQ_VI;
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TUNABLE_INT("hw.cxgbe.nofldrxq_vi", &t4_nofldrxq_vi);
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/* 0 means chip/fw default, non-zero number is value in microseconds */
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static u_long t4_toe_keepalive_idle = 0;
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TUNABLE_ULONG("hw.cxgbe.toe.keepalive_idle", &t4_toe_keepalive_idle);
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/* 0 means chip/fw default, non-zero number is value in microseconds */
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static u_long t4_toe_keepalive_interval = 0;
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TUNABLE_ULONG("hw.cxgbe.toe.keepalive_interval", &t4_toe_keepalive_interval);
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/* 0 means chip/fw default, non-zero number is # of keepalives before abort */
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static int t4_toe_keepalive_count = 0;
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TUNABLE_INT("hw.cxgbe.toe.keepalive_count", &t4_toe_keepalive_count);
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/* 0 means chip/fw default, non-zero number is value in microseconds */
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static u_long t4_toe_rexmt_min = 0;
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TUNABLE_ULONG("hw.cxgbe.toe.rexmt_min", &t4_toe_rexmt_min);
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/* 0 means chip/fw default, non-zero number is value in microseconds */
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static u_long t4_toe_rexmt_max = 0;
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TUNABLE_ULONG("hw.cxgbe.toe.rexmt_max", &t4_toe_rexmt_max);
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/* 0 means chip/fw default, non-zero number is # of rexmt before abort */
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static int t4_toe_rexmt_count = 0;
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TUNABLE_INT("hw.cxgbe.toe.rexmt_count", &t4_toe_rexmt_count);
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/* -1 means chip/fw default, other values are raw backoff values to use */
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static int t4_toe_rexmt_backoff[16] = {
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-1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1
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};
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TUNABLE_INT("hw.cxgbe.toe.rexmt_backoff.0", &t4_toe_rexmt_backoff[0]);
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TUNABLE_INT("hw.cxgbe.toe.rexmt_backoff.1", &t4_toe_rexmt_backoff[1]);
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TUNABLE_INT("hw.cxgbe.toe.rexmt_backoff.2", &t4_toe_rexmt_backoff[2]);
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TUNABLE_INT("hw.cxgbe.toe.rexmt_backoff.3", &t4_toe_rexmt_backoff[3]);
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TUNABLE_INT("hw.cxgbe.toe.rexmt_backoff.4", &t4_toe_rexmt_backoff[4]);
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TUNABLE_INT("hw.cxgbe.toe.rexmt_backoff.5", &t4_toe_rexmt_backoff[5]);
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TUNABLE_INT("hw.cxgbe.toe.rexmt_backoff.6", &t4_toe_rexmt_backoff[6]);
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TUNABLE_INT("hw.cxgbe.toe.rexmt_backoff.7", &t4_toe_rexmt_backoff[7]);
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TUNABLE_INT("hw.cxgbe.toe.rexmt_backoff.8", &t4_toe_rexmt_backoff[8]);
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TUNABLE_INT("hw.cxgbe.toe.rexmt_backoff.9", &t4_toe_rexmt_backoff[9]);
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TUNABLE_INT("hw.cxgbe.toe.rexmt_backoff.10", &t4_toe_rexmt_backoff[10]);
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TUNABLE_INT("hw.cxgbe.toe.rexmt_backoff.11", &t4_toe_rexmt_backoff[11]);
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TUNABLE_INT("hw.cxgbe.toe.rexmt_backoff.12", &t4_toe_rexmt_backoff[12]);
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TUNABLE_INT("hw.cxgbe.toe.rexmt_backoff.13", &t4_toe_rexmt_backoff[13]);
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TUNABLE_INT("hw.cxgbe.toe.rexmt_backoff.14", &t4_toe_rexmt_backoff[14]);
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TUNABLE_INT("hw.cxgbe.toe.rexmt_backoff.15", &t4_toe_rexmt_backoff[15]);
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#endif
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#ifdef DEV_NETMAP
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@ -3611,62 +3656,70 @@ static int
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set_params__post_init(struct adapter *sc)
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{
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uint32_t param, val;
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#ifdef TCP_OFFLOAD
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int i, v, shift;
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char s[32];
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#endif
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/* ask for encapsulated CPLs */
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param = FW_PARAM_PFVF(CPLFW4MSG_ENCAP);
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val = 1;
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(void)t4_set_params(sc, sc->mbox, sc->pf, 0, 1, ¶m, &val);
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#ifdef TCP_OFFLOAD
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/*
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* Override the TOE timers with user provided tunables. This is not the
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* recommended way to change the timers (the firmware config file is) so
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* these tunables are not documented.
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*
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* All the timer tunables are in milliseconds.
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* All the timer tunables are in microseconds.
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*/
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if (TUNABLE_INT_FETCH("hw.cxgbe.toe.keepalive_idle", &v)) {
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if (t4_toe_keepalive_idle != 0) {
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v = us_to_tcp_ticks(sc, t4_toe_keepalive_idle);
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v &= M_KEEPALIVEIDLE;
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t4_set_reg_field(sc, A_TP_KEEP_IDLE,
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V_KEEPALIVEIDLE(M_KEEPALIVEIDLE),
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V_KEEPALIVEIDLE(ms_to_tcp_ticks(sc, v)));
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V_KEEPALIVEIDLE(M_KEEPALIVEIDLE), V_KEEPALIVEIDLE(v));
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}
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if (TUNABLE_INT_FETCH("hw.cxgbe.toe.keepalive_interval", &v)) {
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if (t4_toe_keepalive_interval != 0) {
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v = us_to_tcp_ticks(sc, t4_toe_keepalive_interval);
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v &= M_KEEPALIVEINTVL;
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t4_set_reg_field(sc, A_TP_KEEP_INTVL,
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V_KEEPALIVEINTVL(M_KEEPALIVEINTVL),
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V_KEEPALIVEINTVL(ms_to_tcp_ticks(sc, v)));
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V_KEEPALIVEINTVL(M_KEEPALIVEINTVL), V_KEEPALIVEINTVL(v));
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}
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if (TUNABLE_INT_FETCH("hw.cxgbe.toe.keepalive_count", &v)) {
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v &= M_KEEPALIVEMAXR1;
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if (t4_toe_keepalive_count != 0) {
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v = t4_toe_keepalive_count & M_KEEPALIVEMAXR2;
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t4_set_reg_field(sc, A_TP_SHIFT_CNT,
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V_KEEPALIVEMAXR1(M_KEEPALIVEMAXR1) |
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V_KEEPALIVEMAXR2(M_KEEPALIVEMAXR2),
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V_KEEPALIVEMAXR1(1) | V_KEEPALIVEMAXR2(v));
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}
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if (TUNABLE_INT_FETCH("hw.cxgbe.toe.rexmt_min", &v)) {
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if (t4_toe_rexmt_min != 0) {
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v = us_to_tcp_ticks(sc, t4_toe_rexmt_min);
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v &= M_RXTMIN;
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t4_set_reg_field(sc, A_TP_RXT_MIN,
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V_RXTMIN(M_RXTMIN), V_RXTMIN(ms_to_tcp_ticks(sc, v)));
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V_RXTMIN(M_RXTMIN), V_RXTMIN(v));
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}
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if (TUNABLE_INT_FETCH("hw.cxgbe.toe.rexmt_max", &v)) {
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if (t4_toe_rexmt_max != 0) {
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v = us_to_tcp_ticks(sc, t4_toe_rexmt_max);
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v &= M_RXTMAX;
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t4_set_reg_field(sc, A_TP_RXT_MAX,
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V_RXTMAX(M_RXTMAX), V_RXTMAX(ms_to_tcp_ticks(sc, v)));
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V_RXTMAX(M_RXTMAX), V_RXTMAX(v));
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}
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if (TUNABLE_INT_FETCH("hw.cxgbe.toe.rexmt_count", &v)) {
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v &= M_RXTSHIFTMAXR1;
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if (t4_toe_rexmt_count != 0) {
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v = t4_toe_rexmt_count & M_RXTSHIFTMAXR2;
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t4_set_reg_field(sc, A_TP_SHIFT_CNT,
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V_RXTSHIFTMAXR1(M_RXTSHIFTMAXR1) |
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V_RXTSHIFTMAXR2(M_RXTSHIFTMAXR2),
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V_RXTSHIFTMAXR1(1) | V_RXTSHIFTMAXR2(v));
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}
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for (i = 0; i < 16; i++) {
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snprintf(s, sizeof(s), "hw.cxgbe.toe.rexmt_backoff.%d", i);
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if (TUNABLE_INT_FETCH(s, &v)) {
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v &= M_TIMERBACKOFFINDEX0;
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for (i = 0; i < nitems(t4_toe_rexmt_backoff); i++) {
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if (t4_toe_rexmt_backoff[i] != -1) {
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v = t4_toe_rexmt_backoff[i] & M_TIMERBACKOFFINDEX0;
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shift = (i & 3) << 3;
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t4_set_reg_field(sc, A_TP_TCP_BACKOFF_REG0 + (i & ~3),
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M_TIMERBACKOFFINDEX0 << shift, v << shift);
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}
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}
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#endif
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return (0);
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}
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