Relocate direct map specs into struct alpha_chipset.

Prepare for PCI Scatter-Gather map.
Panic if driver tries alpha_XXX_dmamap() out of range.
This commit is contained in:
Bernd Walter 2005-09-19 13:50:07 +00:00
parent 6ed0b39d28
commit 0444d5b59a
11 changed files with 76 additions and 33 deletions

View File

@ -472,8 +472,6 @@ bus_dmamem_free(bus_dma_tag_t dmat, void *vaddr, bus_dmamap_t map)
* Map the buffer buf into bus space using the dmamap map.
*/
vm_offset_t alpha_XXX_dmamap_or = 1024UL*1024UL*1024UL; /*XXX */
int
bus_dmamap_load(bus_dma_tag_t dmat, bus_dmamap_t map, void *buf,
bus_size_t buflen, bus_dmamap_callback_t *callback,
@ -581,7 +579,7 @@ bus_dmamap_load(bus_dma_tag_t dmat, bus_dmamap_t map, void *buf,
}
if (sg->ds_len == 0) {
sg->ds_addr = paddr | alpha_XXX_dmamap_or;
sg->ds_addr = paddr + chipset.dmoffset;
sg->ds_len = size;
} else if (paddr == nextpaddr) {
sg->ds_len += size;
@ -591,7 +589,7 @@ bus_dmamap_load(bus_dma_tag_t dmat, bus_dmamap_t map, void *buf,
seg++;
if (seg > dmat->nsegments)
break;
sg->ds_addr = paddr | alpha_XXX_dmamap_or;
sg->ds_addr = paddr + chipset.dmoffset;
sg->ds_len = size;
}
vaddr += size;
@ -671,7 +669,7 @@ _bus_dmamap_load_buffer(bus_dma_tag_t dmat,
* previous segment if possible.
*/
if (first) {
segs[seg].ds_addr = curaddr | alpha_XXX_dmamap_or;
segs[seg].ds_addr = curaddr + chipset.dmoffset;
segs[seg].ds_len = sgsize;
first = 0;
} else {
@ -683,7 +681,7 @@ _bus_dmamap_load_buffer(bus_dma_tag_t dmat,
else {
if (++seg >= dmat->nsegments)
break;
segs[seg].ds_addr = curaddr | alpha_XXX_dmamap_or;
segs[seg].ds_addr = curaddr + chipset.dmoffset;;
segs[seg].ds_len = sgsize;
}
}

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@ -45,6 +45,17 @@ typedef struct alpha_chipset {
* Scatter-Gather map for ISA dma.
*/
struct sgmap* sgmap;
/*
* Scatter-Gather map for PCI dma.
*/
struct sgmap* pci_sgmap;
/*
* direct map
*/
long dmsize;
long dmoffset;
} alpha_chipset_t;
extern alpha_chipset_t chipset;

View File

@ -45,6 +45,9 @@
#ifndef _MACHINE_PMAP_H_
#define _MACHINE_PMAP_H_
#include <machine/chipset.h>
#include <sys/systm.h>
/*
* Define meanings for a few software bits in the pte
*/
@ -142,12 +145,16 @@ pmap_kextract(vm_offset_t va)
#define vtophys(va) pmap_kextract(((vm_offset_t) (va)))
extern vm_offset_t alpha_XXX_dmamap_or;
static __inline vm_offset_t
alpha_XXX_dmamap(vm_offset_t va)
{
return (pmap_kextract(va) | alpha_XXX_dmamap_or);
vm_offset_t pa = pmap_kextract(va);
if (pa >= chipset.dmsize)
panic ("driver uses alpha_XXX_dmamap() for an address that"
"is not within direct map");
if (chipset.pci_sgmap != NULL)
panic ("driver uses alpha_XXX_dmamap() on largemem system");
return (pa + chipset.dmoffset);
}
#endif /* _KERNEL */

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@ -172,6 +172,7 @@ mcpcia_probe(device_t dev)
}
sc->mcpcia_inst = unit;
if ((xc = mcpcia_root) == NULL) {
chipset.pci_sgmap = NULL;
mcpcia_root = sc;
} else {
while (xc->next)
@ -633,10 +634,12 @@ mcbus_get_mid(dev), bus , slot, func, sz, off, paddr, data, new_data);
static void
mcpcia_sgmap_map(void *arg, bus_addr_t ba, vm_offset_t pa)
{
struct mcpcia_softc *sc;
u_int64_t *sgtable = arg;
int index = alpha_btop(ba - MCPCIA_ISA_SG_MAPPED_BASE);
if (pa) {
/* XXX */
if (pa > (1L<<32))
panic("mcpcia_sgmap_map: can't map address 0x%lx", pa);
sgtable[index] = ((pa >> 13) << 1) | 1;
@ -644,12 +647,18 @@ mcpcia_sgmap_map(void *arg, bus_addr_t ba, vm_offset_t pa)
sgtable[index] = 0;
}
alpha_mb();
MCPCIA_SGTLB_INVALIDATE(mcpcia_eisa);
if ((struct sgmap*)sgtable == chipset.sgmap)
MCPCIA_SGTLB_INVALIDATE(mcpcia_eisa);
else {
for (sc = mcpcia_root; sc != NULL; sc = sc->next)
MCPCIA_SGTLB_INVALIDATE(sc);
}
}
static void
mcpcia_dma_init(struct mcpcia_softc *sc)
{
void *sgtable;
/*
* Disable all windows first.
@ -672,7 +681,6 @@ mcpcia_dma_init(struct mcpcia_softc *sc)
*/
if (sc == mcpcia_eisa) {
void *sgtable;
REGVAL(MCPCIA_W0_MASK(sc)) = MCPCIA_WMASK_8M;
sgtable = contigmalloc(8192, M_DEVBUF,
@ -699,6 +707,8 @@ mcpcia_dma_init(struct mcpcia_softc *sc)
* Set up window 1 as a 2 GB Direct-mapped window starting at 2GB.
*/
chipset.dmsize = 2UL * 1024UL * 1024UL * 1024UL;
chipset.dmoffset = MCPCIA_DIRECT_MAPPED_BASE;
REGVAL(MCPCIA_W1_MASK(sc)) = MCPCIA_WMASK_2G;
REGVAL(MCPCIA_T1_BASE(sc)) = 0;
alpha_mb();
@ -706,30 +716,33 @@ mcpcia_dma_init(struct mcpcia_softc *sc)
MCPCIA_DIRECT_MAPPED_BASE | MCPCIA_WBASE_EN;
alpha_mb();
/*
* When we get around to redoing the 'chipset' stuff to have more
* than one sgmap handler...
*/
if (alpha_ptob(Maxmem) <= chipset.dmsize)
return;
#if 0
/*
* Set up window 2 as a 1G SGMAP-mapped window starting at 1G.
*/
if (chipset.pci_sgmap == NULL) {
sgtable = contigmalloc(1048576, M_DEVBUF,
M_NOWAIT, 0, 1L<<34, 32<<10, 1L<<34);
if (sgtable == NULL) {
panic("mcpcia_dma_init: cannot allocate pci_sgmap");
/* NOTREACHED */
}
chipset.pci_sgmap = sgmap_map_create(MCPCIA_PCI_SG_MAPPED_BASE,
MCPCIA_PCI_SG_MAPPED_BASE + MCPCIA_PCI_SG_MAPPED_SIZE - 1,
mcpcia_sgmap_map, sgtable);
}
REGVAL(MCPCIA_W2_MASK(sc)) = MCPCIA_WMASK_1G;
REGVAL(MCPCIA_T2_BASE(sc)) =
ccp->cc_pci_sgmap.aps_ptpa >> MCPCIA_TBASEX_SHIFT;
pmap_kextract((vm_offset_t)chipset.pci_sgmap) >>
MCPCIA_TBASEX_SHIFT;
alpha_mb();
REGVAL(MCPCIA_W2_BASE(sc)) =
MCPCIA_WBASE_EN | MCPCIA_WBASE_SG | MCPCIA_PCI_SG_MAPPED_BASE;
alpha_mb();
#endif
/* XXX XXX BEGIN XXX XXX */
{ /* XXX */
alpha_XXX_dmamap_or = MCPCIA_DIRECT_MAPPED_BASE;/* XXX */
} /* XXX */
/* XXX XXX END XXX XXX */
MCPCIA_SGTLB_INVALIDATE(sc);
}
/*

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@ -235,6 +235,9 @@ apecs_init_sgmap(void)
chipset.sgmap = sgmap_map_create(APECS_SGMAP_BASE,
APECS_SGMAP_BASE + APECS_SGMAP_SIZE,
apecs_sgmap_map, sgtable);
chipset.pci_sgmap = NULL;
chipset.dmsize = 1UL * 1024UL * 1024UL * 1024UL;
chipset.dmoffset = 1UL * 1024UL * 1024UL * 1024UL;
}
void

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@ -314,6 +314,9 @@ cia_init_sgmap(void)
chipset.sgmap = sgmap_map_create(CIA_SGMAP_BASE,
CIA_SGMAP_BASE + CIA_SGMAP_SIZE - 1,
cia_sgmap_map, sgtable);
chipset.pci_sgmap = NULL;
chipset.dmsize = 1UL * 1024UL * 1024UL * 1024UL;
chipset.dmoffset = 1UL * 1024UL * 1024UL * 1024UL;
if (cia_ispyxis) {
/*

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@ -123,7 +123,6 @@ irongate_init()
initted = 1;
chipset = irongate_chipset;
alpha_XXX_dmamap_or = 0UL;
bwx_init_space(&io_space, KV(IRONGATE_IO));
bwx_init_space(&mem_space, KV(IRONGATE_MEM));
@ -166,6 +165,9 @@ irongate_attach(device_t dev)
chipset_dense = IRONGATE_MEM;
/* no s/g support in this chipset, must use bounce-buffers */
chipset.sgmap = NULL;
chipset.pci_sgmap = NULL;
chipset.dmsize = 4UL * 1024UL * 1024UL * 1024UL;
chipset.dmoffset = 0;
bus_generic_attach(dev);

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@ -186,7 +186,9 @@ lca_init_sgmap(void)
chipset.sgmap = sgmap_map_create(LCA_SGMAP_BASE,
LCA_SGMAP_BASE + LCA_SGMAP_SIZE,
lca_sgmap_map, sgtable);
chipset.pci_sgmap = NULL;
chipset.dmsize = 1UL * 1024UL * 1024UL * 1024UL;
chipset.dmoffset = 1UL * 1024UL * 1024UL * 1024UL;
REGVAL64(LCA_IOC_W_T_BASE0) = pmap_kextract((vm_offset_t) sgtable);
alpha_mb();

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@ -252,6 +252,9 @@ t2_init_sgmap(int h)
chipset.sgmap = sgmap_map_create(T2_SGMAP_BASE,
T2_SGMAP_BASE + T2_SGMAP_SIZE,
t2_sgmap_map, sgtable);
chipset.pci_sgmap = NULL;
chipset.dmsize = 2UL * 1024UL * 1024UL * 1024UL;
chipset.dmoffset = 1UL * 1024UL * 1024UL * 1024UL;
}
static void

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@ -234,6 +234,7 @@ tsunami_init_sgmap(void)
chipset.sgmap = sgmap_map_create(TSUNAMI_SGMAP_BASE,
TSUNAMI_SGMAP_BASE + TSUNAMI_SGMAP_SIZE,
tsunami_sgmap_map, sgtable);
chipset.pci_sgmap = NULL;
}
void
@ -258,7 +259,8 @@ tsunami_init()
chipset = tsunami_chipset;
platform.pci_intr_enable = tsunami_intr_enable;
platform.pci_intr_disable = tsunami_intr_disable;
alpha_XXX_dmamap_or = 2UL * 1024UL * 1024UL * 1024UL;
chipset.dmsize = 2UL * 1024UL * 1024UL * 1024UL;
chipset.dmoffset = 2UL * 1024UL * 1024UL * 1024UL;
if (platform.pci_intr_init)
platform.pci_intr_init();

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@ -707,7 +707,12 @@ dwlpx_dma_init(struct dwlpx_softc *sc)
* SGVA base: 0
*/
chipset.sgmap = sgmap_map_create(sgwbase, sgwend, dwlpx_sgmap_map, tbl);
#else
chipset.sgmap = NULL;
#endif
chipset.pci_sgmap = NULL;
chipset.dmsize = 2UL * 1024UL * 1024UL * 1024UL;
chipset.dmoffset = DWLPx_DIRECT_MAPPED_BASE;
/*
* Set up DMA windows for this DWLPx.
@ -729,12 +734,6 @@ dwlpx_dma_init(struct dwlpx_softc *sc)
sgwbase | PCIA_WBASE_W_EN | PCIA_WBASE_SG_EN;
}
alpha_mb();
/* XXX XXX BEGIN XXX XXX */
{ /* XXX */
alpha_XXX_dmamap_or = DWLPx_DIRECT_MAPPED_BASE; /* XXX */
} /* XXX */
/* XXX XXX END XXX XXX */
}
/*