iwn(4): (partially) rewrite A-MPDU Tx path
Generic Tx stats fixes: - do not try to parse "aggregation status" for single frames; send them to iwn_tx_done() instead; - try to attach mbuf / node reference pair to reported BA events; allows to fix reported status for ieee80211_tx_complete() and ifnet counters (previously all A-MPDU frames were counted as failed - see PR 210211); requires few more firmware bug workarounds; - preserve short / long retry counters for wlan_amrr(4) (disabled for now - causes significant performance degradation). - Add new IWN_DEBUG_AMPDU debug category. - Add one more check into iwn_tx_data() to prevent aggregation ring overflow. - Workaround 'seqno % 256' != 'current Tx slot' case (until D9195 is not in the tree). - Improve watchdog timer updates (previously watchdog check was omitted when at least one frame was transmitted). - Stop Tx when memory leak in currently used ring was detected (unlikely to happen). - Few other minor fixes. Was previously tested with: - Intel 6205, STA mode (Tx aggregation behaves much better now). - Intel 4965AGN, STA mode (still unstable). PR: 192641, 210211 Reviewed by: adrian, dhw MFC after: 1 month Differential Revision: https://reviews.freebsd.org/D10728
This commit is contained in:
parent
9b35e90238
commit
0613dc6f15
@ -168,6 +168,7 @@ static int iwn_alloc_tx_ring(struct iwn_softc *, struct iwn_tx_ring *,
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int);
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int);
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static void iwn_reset_tx_ring(struct iwn_softc *, struct iwn_tx_ring *);
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static void iwn_reset_tx_ring(struct iwn_softc *, struct iwn_tx_ring *);
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static void iwn_free_tx_ring(struct iwn_softc *, struct iwn_tx_ring *);
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static void iwn_free_tx_ring(struct iwn_softc *, struct iwn_tx_ring *);
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static void iwn_check_tx_ring(struct iwn_softc *, int);
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static void iwn5000_ict_reset(struct iwn_softc *);
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static void iwn5000_ict_reset(struct iwn_softc *);
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static int iwn_read_eeprom(struct iwn_softc *,
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static int iwn_read_eeprom(struct iwn_softc *,
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uint8_t macaddr[IEEE80211_ADDR_LEN]);
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uint8_t macaddr[IEEE80211_ADDR_LEN]);
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@ -199,6 +200,8 @@ static void iwn_calib_timeout(void *);
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static void iwn_rx_phy(struct iwn_softc *, struct iwn_rx_desc *);
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static void iwn_rx_phy(struct iwn_softc *, struct iwn_rx_desc *);
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static void iwn_rx_done(struct iwn_softc *, struct iwn_rx_desc *,
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static void iwn_rx_done(struct iwn_softc *, struct iwn_rx_desc *,
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struct iwn_rx_data *);
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struct iwn_rx_data *);
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static void iwn_agg_tx_complete(struct iwn_softc *, struct iwn_tx_ring *,
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int, int, int);
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static void iwn_rx_compressed_ba(struct iwn_softc *, struct iwn_rx_desc *);
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static void iwn_rx_compressed_ba(struct iwn_softc *, struct iwn_rx_desc *);
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static void iwn5000_rx_calib_results(struct iwn_softc *,
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static void iwn5000_rx_calib_results(struct iwn_softc *,
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struct iwn_rx_desc *);
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struct iwn_rx_desc *);
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@ -207,10 +210,13 @@ static void iwn4965_tx_done(struct iwn_softc *, struct iwn_rx_desc *,
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struct iwn_rx_data *);
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struct iwn_rx_data *);
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static void iwn5000_tx_done(struct iwn_softc *, struct iwn_rx_desc *,
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static void iwn5000_tx_done(struct iwn_softc *, struct iwn_rx_desc *,
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struct iwn_rx_data *);
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struct iwn_rx_data *);
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static void iwn_adj_ampdu_ptr(struct iwn_softc *, struct iwn_tx_ring *);
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static void iwn_tx_done(struct iwn_softc *, struct iwn_rx_desc *, int, int,
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static void iwn_tx_done(struct iwn_softc *, struct iwn_rx_desc *, int, int,
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uint8_t);
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uint8_t);
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static void iwn_ampdu_tx_done(struct iwn_softc *, int, int, int, int, int,
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static int iwn_ampdu_check_bitmap(uint64_t, int, int);
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void *);
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static int iwn_ampdu_index_check(struct iwn_softc *, struct iwn_tx_ring *,
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uint64_t, int, int);
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static void iwn_ampdu_tx_done(struct iwn_softc *, int, int, int, void *);
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static void iwn_cmd_done(struct iwn_softc *, struct iwn_rx_desc *);
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static void iwn_cmd_done(struct iwn_softc *, struct iwn_rx_desc *);
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static void iwn_notif_intr(struct iwn_softc *);
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static void iwn_notif_intr(struct iwn_softc *);
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static void iwn_wakeup_intr(struct iwn_softc *);
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static void iwn_wakeup_intr(struct iwn_softc *);
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@ -2075,6 +2081,8 @@ iwn_reset_tx_ring(struct iwn_softc *sc, struct iwn_tx_ring *ring)
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ieee80211_free_node(data->ni);
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ieee80211_free_node(data->ni);
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data->ni = NULL;
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data->ni = NULL;
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}
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}
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data->remapped = 0;
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data->long_retries = 0;
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}
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}
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/* Clear TX descriptors. */
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/* Clear TX descriptors. */
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memset(ring->desc, 0, ring->desc_dma.size);
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memset(ring->desc, 0, ring->desc_dma.size);
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@ -2113,6 +2121,42 @@ iwn_free_tx_ring(struct iwn_softc *sc, struct iwn_tx_ring *ring)
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}
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}
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}
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}
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static void
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iwn_check_tx_ring(struct iwn_softc *sc, int qid)
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{
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struct iwn_tx_ring *ring = &sc->txq[qid];
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KASSERT(ring->queued >= 0, ("%s: ring->queued (%d) for queue %d < 0!",
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__func__, ring->queued, qid));
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if (qid >= sc->firstaggqueue) {
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struct iwn_ops *ops = &sc->ops;
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struct ieee80211_tx_ampdu *tap = sc->qid2tap[qid];
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if (ring->queued == 0 && !IEEE80211_AMPDU_RUNNING(tap)) {
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uint16_t ssn = tap->txa_start & 0xfff;
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uint8_t tid = tap->txa_tid;
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int *res = tap->txa_private;
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iwn_nic_lock(sc);
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ops->ampdu_tx_stop(sc, qid, tid, ssn);
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iwn_nic_unlock(sc);
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sc->qid2tap[qid] = NULL;
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free(res, M_DEVBUF);
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}
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}
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if (ring->queued < IWN_TX_RING_LOMARK) {
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sc->qfullmsk &= ~(1 << qid);
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if (ring->queued == 0)
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sc->sc_tx_timer = 0;
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else
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sc->sc_tx_timer = 5;
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}
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}
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static void
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static void
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iwn5000_ict_reset(struct iwn_softc *sc)
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iwn5000_ict_reset(struct iwn_softc *sc)
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{
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{
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@ -3169,104 +3213,129 @@ iwn_rx_done(struct iwn_softc *sc, struct iwn_rx_desc *desc,
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}
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}
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static void
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iwn_agg_tx_complete(struct iwn_softc *sc, struct iwn_tx_ring *ring, int tid,
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int idx, int success)
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{
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struct ieee80211_ratectl_tx_status *txs = &sc->sc_txs;
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struct iwn_tx_data *data = &ring->data[idx];
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struct iwn_node *wn;
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struct mbuf *m;
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struct ieee80211_node *ni;
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KASSERT(data->ni != NULL, ("idx %d: no node", idx));
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KASSERT(data->m != NULL, ("idx %d: no mbuf", idx));
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/* Unmap and free mbuf. */
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bus_dmamap_sync(ring->data_dmat, data->map,
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BUS_DMASYNC_POSTWRITE);
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bus_dmamap_unload(ring->data_dmat, data->map);
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m = data->m, data->m = NULL;
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ni = data->ni, data->ni = NULL;
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wn = (void *)ni;
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#if 0
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/* XXX causes significant performance degradation. */
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txs->flags = IEEE80211_RATECTL_STATUS_SHORT_RETRY |
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IEEE80211_RATECTL_STATUS_LONG_RETRY;
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txs->long_retries = data->long_retries - 1;
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#else
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txs->flags = IEEE80211_RATECTL_STATUS_SHORT_RETRY;
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#endif
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txs->short_retries = wn->agg[tid].short_retries;
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if (success)
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txs->status = IEEE80211_RATECTL_TX_SUCCESS;
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else
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txs->status = IEEE80211_RATECTL_TX_FAIL_UNSPECIFIED;
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wn->agg[tid].short_retries = 0;
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data->long_retries = 0;
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DPRINTF(sc, IWN_DEBUG_AMPDU, "%s: freeing m %p ni %p idx %d qid %d\n",
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__func__, m, ni, idx, ring->qid);
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ieee80211_ratectl_tx_complete(ni, txs);
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ieee80211_tx_complete(ni, m, !success);
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}
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/* Process an incoming Compressed BlockAck. */
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/* Process an incoming Compressed BlockAck. */
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static void
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static void
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iwn_rx_compressed_ba(struct iwn_softc *sc, struct iwn_rx_desc *desc)
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iwn_rx_compressed_ba(struct iwn_softc *sc, struct iwn_rx_desc *desc)
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{
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{
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struct ieee80211_ratectl_tx_status *txs = &sc->sc_txs;
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struct iwn_tx_ring *ring;
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struct iwn_ops *ops = &sc->ops;
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struct iwn_tx_data *data;
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struct iwn_node *wn;
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struct iwn_node *wn;
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struct ieee80211_node *ni;
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struct iwn_compressed_ba *ba = (struct iwn_compressed_ba *)(desc + 1);
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struct iwn_compressed_ba *ba = (struct iwn_compressed_ba *)(desc + 1);
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struct iwn_tx_ring *txq;
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struct iwn_tx_data *txdata;
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struct ieee80211_tx_ampdu *tap;
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struct ieee80211_tx_ampdu *tap;
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struct mbuf *m;
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uint64_t bitmap;
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uint64_t bitmap;
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uint16_t ssn;
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uint8_t tid;
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uint8_t tid;
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int i, lastidx, qid, *res, shift;
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int i, qid, shift;
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int tx_ok = 0, tx_err = 0;
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int tx_ok = 0;
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DPRINTF(sc, IWN_DEBUG_TRACE | IWN_DEBUG_XMIT, "->%s begin\n", __func__);
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DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
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qid = le16toh(ba->qid);
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qid = le16toh(ba->qid);
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txq = &sc->txq[ba->qid];
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tap = sc->qid2tap[qid];
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tap = sc->qid2tap[ba->qid];
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ring = &sc->txq[qid];
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tid = tap->txa_tid;
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tid = tap->txa_tid;
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wn = (void *)tap->txa_ni;
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wn = (void *)tap->txa_ni;
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res = NULL;
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DPRINTF(sc, IWN_DEBUG_AMPDU, "%s: qid %d tid %d seq %04X ssn %04X\n"
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ssn = 0;
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"bitmap: ba %016jX wn %016jX, start %d\n",
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if (!IEEE80211_AMPDU_RUNNING(tap)) {
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__func__, qid, tid, le16toh(ba->seq), le16toh(ba->ssn),
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res = tap->txa_private;
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(uintmax_t)le64toh(ba->bitmap), (uintmax_t)wn->agg[tid].bitmap,
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ssn = tap->txa_start & 0xfff;
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wn->agg[tid].startidx);
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}
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for (lastidx = le16toh(ba->ssn) & 0xff; txq->read != lastidx;) {
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txdata = &txq->data[txq->read];
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/* Unmap and free mbuf. */
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bus_dmamap_sync(txq->data_dmat, txdata->map,
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BUS_DMASYNC_POSTWRITE);
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bus_dmamap_unload(txq->data_dmat, txdata->map);
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m = txdata->m, txdata->m = NULL;
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ni = txdata->ni, txdata->ni = NULL;
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KASSERT(ni != NULL, ("no node"));
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KASSERT(m != NULL, ("no mbuf"));
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DPRINTF(sc, IWN_DEBUG_XMIT, "%s: freeing m=%p\n", __func__, m);
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ieee80211_tx_complete(ni, m, 1);
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txq->queued--;
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txq->read = (txq->read + 1) % IWN_TX_RING_COUNT;
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}
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if (txq->queued == 0 && res != NULL) {
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iwn_nic_lock(sc);
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ops->ampdu_tx_stop(sc, qid, tid, ssn);
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iwn_nic_unlock(sc);
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sc->qid2tap[qid] = NULL;
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free(res, M_DEVBUF);
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return;
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}
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if (wn->agg[tid].bitmap == 0)
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if (wn->agg[tid].bitmap == 0)
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return;
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return;
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shift = wn->agg[tid].startidx - ((le16toh(ba->seq) >> 4) & 0xff);
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shift = wn->agg[tid].startidx - ((le16toh(ba->seq) >> 4) & 0xff);
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if (shift < 0)
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if (shift <= -64)
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shift += 0x100;
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shift += 0x100;
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if (wn->agg[tid].nframes > (64 - shift))
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return;
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/*
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/*
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* Walk the bitmap and calculate how many successful and failed
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* Walk the bitmap and calculate how many successful attempts
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* attempts are made.
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* are made.
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*
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*
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* Yes, the rate control code doesn't know these are A-MPDU
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* Yes, the rate control code doesn't know these are A-MPDU
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* subframes and that it's okay to fail some of these.
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* subframes; due to that long_retries stats are not used here.
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*/
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*/
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ni = tap->txa_ni;
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bitmap = le64toh(ba->bitmap);
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bitmap = (le64toh(ba->bitmap) >> shift) & wn->agg[tid].bitmap;
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if (shift >= 0)
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for (i = 0; bitmap; i++) {
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bitmap >>= shift;
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txs->flags = 0; /* XXX TODO */
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else
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if ((bitmap & 1) == 0) {
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bitmap <<= -shift;
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tx_err ++;
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bitmap &= wn->agg[tid].bitmap;
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txs->status = IEEE80211_RATECTL_TX_FAIL_UNSPECIFIED;
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wn->agg[tid].bitmap = 0;
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} else {
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tx_ok ++;
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for (i = wn->agg[tid].startidx;
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txs->status = IEEE80211_RATECTL_TX_SUCCESS;
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bitmap;
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bitmap >>= 1, i = (i + 1) % IWN_TX_RING_COUNT) {
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if ((bitmap & 1) == 0)
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continue;
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data = &ring->data[i];
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if (__predict_false(data->m == NULL)) {
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/*
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* There is no frame; skip this entry.
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*
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* NB: it is "ok" to have both
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* 'tx done' + 'compressed BA' replies for frame
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* with STATE_SCD_QUERY status.
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*/
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DPRINTF(sc, IWN_DEBUG_AMPDU,
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"%s: ring %d: no entry %d\n", __func__, qid, i);
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continue;
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}
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}
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ieee80211_ratectl_tx_complete(ni, txs);
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bitmap >>= 1;
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tx_ok++;
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iwn_agg_tx_complete(sc, ring, tid, i, 1);
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}
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}
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DPRINTF(sc, IWN_DEBUG_TRACE | IWN_DEBUG_XMIT,
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ring->queued -= tx_ok;
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"->%s: end; %d ok; %d err\n",__func__, tx_ok, tx_err);
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iwn_check_tx_ring(sc, qid);
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DPRINTF(sc, IWN_DEBUG_TRACE | IWN_DEBUG_AMPDU,
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"->%s: end; %d ok\n",__func__, tx_ok);
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}
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}
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/*
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/*
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@ -3514,9 +3583,9 @@ iwn4965_tx_done(struct iwn_softc *sc, struct iwn_rx_desc *desc,
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stat->rate, le16toh(stat->duration),
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stat->rate, le16toh(stat->duration),
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le32toh(stat->status));
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le32toh(stat->status));
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if (qid >= sc->firstaggqueue) {
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if (qid >= sc->firstaggqueue && stat->nframes != 1) {
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iwn_ampdu_tx_done(sc, qid, desc->idx, stat->nframes,
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iwn_ampdu_tx_done(sc, qid, stat->nframes, stat->rtsfailcnt,
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stat->rtsfailcnt, stat->ackfailcnt, &stat->status);
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&stat->status);
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} else {
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} else {
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iwn_tx_done(sc, desc, stat->rtsfailcnt, stat->ackfailcnt,
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iwn_tx_done(sc, desc, stat->rtsfailcnt, stat->ackfailcnt,
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le32toh(stat->status) & 0xff);
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le32toh(stat->status) & 0xff);
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@ -3544,15 +3613,32 @@ iwn5000_tx_done(struct iwn_softc *sc, struct iwn_rx_desc *desc,
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iwn5000_reset_sched(sc, qid, desc->idx);
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iwn5000_reset_sched(sc, qid, desc->idx);
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#endif
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#endif
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if (qid >= sc->firstaggqueue) {
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if (qid >= sc->firstaggqueue && stat->nframes != 1) {
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iwn_ampdu_tx_done(sc, qid, desc->idx, stat->nframes,
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iwn_ampdu_tx_done(sc, qid, stat->nframes, stat->rtsfailcnt,
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stat->rtsfailcnt, stat->ackfailcnt, &stat->status);
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&stat->status);
|
||||||
} else {
|
} else {
|
||||||
iwn_tx_done(sc, desc, stat->rtsfailcnt, stat->ackfailcnt,
|
iwn_tx_done(sc, desc, stat->rtsfailcnt, stat->ackfailcnt,
|
||||||
le16toh(stat->status) & 0xff);
|
le16toh(stat->status) & 0xff);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
static void
|
||||||
|
iwn_adj_ampdu_ptr(struct iwn_softc *sc, struct iwn_tx_ring *ring)
|
||||||
|
{
|
||||||
|
int i;
|
||||||
|
|
||||||
|
for (i = ring->read; i != ring->cur; i = (i + 1) % IWN_TX_RING_COUNT) {
|
||||||
|
struct iwn_tx_data *data = &ring->data[i];
|
||||||
|
|
||||||
|
if (data->m != NULL)
|
||||||
|
break;
|
||||||
|
|
||||||
|
data->remapped = 0;
|
||||||
|
}
|
||||||
|
|
||||||
|
ring->read = i;
|
||||||
|
}
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* Adapter-independent backend for TX_DONE firmware notifications.
|
* Adapter-independent backend for TX_DONE firmware notifications.
|
||||||
*/
|
*/
|
||||||
@ -3566,7 +3652,18 @@ iwn_tx_done(struct iwn_softc *sc, struct iwn_rx_desc *desc, int rtsfailcnt,
|
|||||||
struct mbuf *m;
|
struct mbuf *m;
|
||||||
struct ieee80211_node *ni;
|
struct ieee80211_node *ni;
|
||||||
|
|
||||||
|
if (__predict_false(data->m == NULL &&
|
||||||
|
ring->qid >= sc->firstaggqueue)) {
|
||||||
|
/*
|
||||||
|
* There is no frame; skip this entry.
|
||||||
|
*/
|
||||||
|
DPRINTF(sc, IWN_DEBUG_AMPDU, "%s: ring %d: no entry %d\n",
|
||||||
|
__func__, ring->qid, desc->idx);
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
|
||||||
KASSERT(data->ni != NULL, ("no node"));
|
KASSERT(data->ni != NULL, ("no node"));
|
||||||
|
KASSERT(data->m != NULL, ("no mbuf"));
|
||||||
|
|
||||||
DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
|
DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
|
||||||
|
|
||||||
@ -3576,6 +3673,19 @@ iwn_tx_done(struct iwn_softc *sc, struct iwn_rx_desc *desc, int rtsfailcnt,
|
|||||||
m = data->m, data->m = NULL;
|
m = data->m, data->m = NULL;
|
||||||
ni = data->ni, data->ni = NULL;
|
ni = data->ni, data->ni = NULL;
|
||||||
|
|
||||||
|
data->long_retries = 0;
|
||||||
|
|
||||||
|
if (ring->qid >= sc->firstaggqueue)
|
||||||
|
iwn_adj_ampdu_ptr(sc, ring);
|
||||||
|
|
||||||
|
/*
|
||||||
|
* XXX f/w may hang (device timeout) when desc->idx - ring->read == 64
|
||||||
|
* (aggregation queues only).
|
||||||
|
*/
|
||||||
|
|
||||||
|
ring->queued--;
|
||||||
|
iwn_check_tx_ring(sc, ring->qid);
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* Update rate control statistics for the node.
|
* Update rate control statistics for the node.
|
||||||
*/
|
*/
|
||||||
@ -3624,10 +3734,6 @@ iwn_tx_done(struct iwn_softc *sc, struct iwn_rx_desc *desc, int rtsfailcnt,
|
|||||||
ieee80211_tx_complete(ni, m,
|
ieee80211_tx_complete(ni, m,
|
||||||
(status & IWN_TX_FAIL) != 0);
|
(status & IWN_TX_FAIL) != 0);
|
||||||
|
|
||||||
sc->sc_tx_timer = 0;
|
|
||||||
if (--ring->queued < IWN_TX_RING_LOMARK)
|
|
||||||
sc->qfullmsk &= ~(1 << ring->qid);
|
|
||||||
|
|
||||||
DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
|
DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -3664,148 +3770,218 @@ iwn_cmd_done(struct iwn_softc *sc, struct iwn_rx_desc *desc)
|
|||||||
wakeup(&ring->desc[desc->idx]);
|
wakeup(&ring->desc[desc->idx]);
|
||||||
}
|
}
|
||||||
|
|
||||||
static void
|
static int
|
||||||
iwn_ampdu_tx_done(struct iwn_softc *sc, int qid, int idx, int nframes,
|
iwn_ampdu_check_bitmap(uint64_t bitmap, int start, int idx)
|
||||||
int rtsfailcnt, int ackfailcnt, void *stat)
|
|
||||||
{
|
{
|
||||||
struct iwn_ops *ops = &sc->ops;
|
int bit, shift;
|
||||||
struct iwn_tx_ring *ring = &sc->txq[qid];
|
|
||||||
struct ieee80211_ratectl_tx_status *txs = &sc->sc_txs;
|
|
||||||
struct iwn_tx_data *data;
|
|
||||||
struct mbuf *m;
|
|
||||||
struct iwn_node *wn;
|
|
||||||
struct ieee80211_node *ni;
|
|
||||||
struct ieee80211_tx_ampdu *tap;
|
|
||||||
uint64_t bitmap;
|
|
||||||
uint32_t *status = stat;
|
|
||||||
uint16_t *aggstatus = stat;
|
|
||||||
uint16_t ssn;
|
|
||||||
uint8_t tid;
|
|
||||||
int bit, i, lastidx, *res, seqno, shift, start;
|
|
||||||
|
|
||||||
/* XXX TODO: status is le16 field! Grr */
|
bit = idx - start;
|
||||||
|
shift = 0;
|
||||||
DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
|
if (bit >= 64) {
|
||||||
DPRINTF(sc, IWN_DEBUG_XMIT, "%s: nframes=%d, status=0x%08x\n",
|
shift = 0x100 - bit;
|
||||||
__func__,
|
bit = 0;
|
||||||
nframes,
|
} else if (bit <= -64)
|
||||||
*status);
|
bit = 0x100 + bit;
|
||||||
|
else if (bit < 0) {
|
||||||
tap = sc->qid2tap[qid];
|
shift = -bit;
|
||||||
tid = tap->txa_tid;
|
bit = 0;
|
||||||
wn = (void *)tap->txa_ni;
|
|
||||||
ni = tap->txa_ni;
|
|
||||||
|
|
||||||
/*
|
|
||||||
* XXX TODO: ACK and RTS failures would be nice here!
|
|
||||||
*/
|
|
||||||
|
|
||||||
/*
|
|
||||||
* A-MPDU single frame status - if we failed to transmit it
|
|
||||||
* in A-MPDU, then it may be a permanent failure.
|
|
||||||
*
|
|
||||||
* XXX TODO: check what the Linux iwlwifi driver does here;
|
|
||||||
* there's some permanent and temporary failures that may be
|
|
||||||
* handled differently.
|
|
||||||
*/
|
|
||||||
if (nframes == 1) {
|
|
||||||
txs->flags = IEEE80211_RATECTL_STATUS_SHORT_RETRY |
|
|
||||||
IEEE80211_RATECTL_STATUS_LONG_RETRY;
|
|
||||||
txs->short_retries = rtsfailcnt;
|
|
||||||
txs->long_retries = ackfailcnt;
|
|
||||||
if ((*status & 0xff) != 1 && (*status & 0xff) != 2) {
|
|
||||||
#ifdef NOT_YET
|
|
||||||
printf("ieee80211_send_bar()\n");
|
|
||||||
#endif
|
|
||||||
/*
|
|
||||||
* If we completely fail a transmit, make sure a
|
|
||||||
* notification is pushed up to the rate control
|
|
||||||
* layer.
|
|
||||||
*/
|
|
||||||
/* XXX */
|
|
||||||
txs->status = IEEE80211_RATECTL_TX_FAIL_UNSPECIFIED;
|
|
||||||
} else {
|
|
||||||
/*
|
|
||||||
* If nframes=1, then we won't be getting a BA for
|
|
||||||
* this frame. Ensure that we correctly update the
|
|
||||||
* rate control code with how many retries were
|
|
||||||
* needed to send it.
|
|
||||||
*/
|
|
||||||
txs->status = IEEE80211_RATECTL_TX_SUCCESS;
|
|
||||||
}
|
|
||||||
ieee80211_ratectl_tx_complete(ni, txs);
|
|
||||||
}
|
}
|
||||||
|
|
||||||
bitmap = 0;
|
if (bit - shift >= 64)
|
||||||
start = idx;
|
return (0);
|
||||||
|
|
||||||
|
return ((bitmap & (1ULL << (bit - shift))) != 0);
|
||||||
|
}
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Firmware bug workaround: in case if 'retries' counter
|
||||||
|
* overflows 'seqno' field will be incremented:
|
||||||
|
* status|sequence|status|sequence|status|sequence
|
||||||
|
* 0000 0A48 0001 0A49 0000 0A6A
|
||||||
|
* 1000 0A48 1000 0A49 1000 0A6A
|
||||||
|
* 2000 0A48 2000 0A49 2000 0A6A
|
||||||
|
* ...
|
||||||
|
* E000 0A48 E000 0A49 E000 0A6A
|
||||||
|
* F000 0A48 F000 0A49 F000 0A6A
|
||||||
|
* 0000 0A49 0000 0A49 0000 0A6B
|
||||||
|
* 1000 0A49 1000 0A49 1000 0A6B
|
||||||
|
* ...
|
||||||
|
* D000 0A49 D000 0A49 D000 0A6B
|
||||||
|
* E000 0A49 E001 0A49 E000 0A6B
|
||||||
|
* F000 0A49 F001 0A49 F000 0A6B
|
||||||
|
* 0000 0A4A 0000 0A4B 0000 0A6A
|
||||||
|
* 1000 0A4A 1000 0A4B 1000 0A6A
|
||||||
|
* ...
|
||||||
|
*
|
||||||
|
* Odd 'seqno' numbers are incremened by 2 every 2 overflows.
|
||||||
|
* For even 'seqno' % 4 != 0 overflow is cyclic (0 -> +1 -> 0).
|
||||||
|
* Not checked with nretries >= 64.
|
||||||
|
*
|
||||||
|
*/
|
||||||
|
static int
|
||||||
|
iwn_ampdu_index_check(struct iwn_softc *sc, struct iwn_tx_ring *ring,
|
||||||
|
uint64_t bitmap, int start, int idx)
|
||||||
|
{
|
||||||
|
struct ieee80211com *ic = &sc->sc_ic;
|
||||||
|
struct iwn_tx_data *data;
|
||||||
|
int diff, min_retries, max_retries, new_idx, loop_end;
|
||||||
|
|
||||||
|
new_idx = idx - IWN_LONG_RETRY_LIMIT_LOG;
|
||||||
|
if (new_idx < 0)
|
||||||
|
new_idx += IWN_TX_RING_COUNT;
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Corner case: check if retry count is not too big;
|
||||||
|
* reset device otherwise.
|
||||||
|
*/
|
||||||
|
if (!iwn_ampdu_check_bitmap(bitmap, start, new_idx)) {
|
||||||
|
data = &ring->data[new_idx];
|
||||||
|
if (data->long_retries > IWN_LONG_RETRY_LIMIT) {
|
||||||
|
device_printf(sc->sc_dev,
|
||||||
|
"%s: retry count (%d) for idx %d/%d overflow, "
|
||||||
|
"resetting...\n", __func__, data->long_retries,
|
||||||
|
ring->qid, new_idx);
|
||||||
|
ieee80211_restart_all(ic);
|
||||||
|
return (-1);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
/* Correct index if needed. */
|
||||||
|
loop_end = idx;
|
||||||
|
do {
|
||||||
|
data = &ring->data[new_idx];
|
||||||
|
diff = idx - new_idx;
|
||||||
|
if (diff < 0)
|
||||||
|
diff += IWN_TX_RING_COUNT;
|
||||||
|
|
||||||
|
min_retries = IWN_LONG_RETRY_FW_OVERFLOW * diff;
|
||||||
|
if ((new_idx % 2) == 0)
|
||||||
|
max_retries = IWN_LONG_RETRY_FW_OVERFLOW * (diff + 1);
|
||||||
|
else
|
||||||
|
max_retries = IWN_LONG_RETRY_FW_OVERFLOW * (diff + 2);
|
||||||
|
|
||||||
|
if (!iwn_ampdu_check_bitmap(bitmap, start, new_idx) &&
|
||||||
|
((data->long_retries >= min_retries &&
|
||||||
|
data->long_retries < max_retries) ||
|
||||||
|
(diff == 1 &&
|
||||||
|
(new_idx & 0x03) == 0x02 &&
|
||||||
|
data->long_retries >= IWN_LONG_RETRY_FW_OVERFLOW))) {
|
||||||
|
DPRINTF(sc, IWN_DEBUG_AMPDU,
|
||||||
|
"%s: correcting index %d -> %d in queue %d"
|
||||||
|
" (retries %d)\n", __func__, idx, new_idx,
|
||||||
|
ring->qid, data->long_retries);
|
||||||
|
return (new_idx);
|
||||||
|
}
|
||||||
|
|
||||||
|
new_idx = (new_idx + 1) % IWN_TX_RING_COUNT;
|
||||||
|
} while (new_idx != loop_end);
|
||||||
|
|
||||||
|
return (idx);
|
||||||
|
}
|
||||||
|
|
||||||
|
static void
|
||||||
|
iwn_ampdu_tx_done(struct iwn_softc *sc, int qid, int nframes, int rtsfailcnt,
|
||||||
|
void *stat)
|
||||||
|
{
|
||||||
|
struct iwn_tx_ring *ring = &sc->txq[qid];
|
||||||
|
struct ieee80211_tx_ampdu *tap = sc->qid2tap[qid];
|
||||||
|
struct iwn_node *wn = (void *)tap->txa_ni;
|
||||||
|
struct iwn_tx_data *data;
|
||||||
|
uint64_t bitmap = 0;
|
||||||
|
uint16_t *aggstatus = stat;
|
||||||
|
uint8_t tid = tap->txa_tid;
|
||||||
|
int bit, i, idx, shift, start, tx_err;
|
||||||
|
|
||||||
|
DPRINTF(sc, IWN_DEBUG_TRACE, "->%s begin\n", __func__);
|
||||||
|
|
||||||
|
start = le16toh(*(aggstatus + nframes * 2)) & 0xff;
|
||||||
|
|
||||||
for (i = 0; i < nframes; i++) {
|
for (i = 0; i < nframes; i++) {
|
||||||
if (le16toh(aggstatus[i * 2]) & 0xc)
|
uint16_t status = le16toh(aggstatus[i * 2]);
|
||||||
|
|
||||||
|
if (status & IWN_AGG_TX_STATE_IGNORE_MASK)
|
||||||
continue;
|
continue;
|
||||||
|
|
||||||
idx = le16toh(aggstatus[2*i + 1]) & 0xff;
|
idx = le16toh(aggstatus[i * 2 + 1]) & 0xff;
|
||||||
|
data = &ring->data[idx];
|
||||||
|
if (data->remapped) {
|
||||||
|
idx = iwn_ampdu_index_check(sc, ring, bitmap, start, idx);
|
||||||
|
if (idx == -1) {
|
||||||
|
/* skip error (device will be restarted anyway). */
|
||||||
|
continue;
|
||||||
|
}
|
||||||
|
|
||||||
|
/* Index may have changed. */
|
||||||
|
data = &ring->data[idx];
|
||||||
|
}
|
||||||
|
|
||||||
|
/*
|
||||||
|
* XXX Sometimes (rarely) some frames are excluded from events.
|
||||||
|
* XXX Due to that long_retries counter may be wrong.
|
||||||
|
*/
|
||||||
|
data->long_retries &= ~0x0f;
|
||||||
|
data->long_retries += IWN_AGG_TX_TRY_COUNT(status) + 1;
|
||||||
|
|
||||||
|
if (data->long_retries >= IWN_LONG_RETRY_FW_OVERFLOW) {
|
||||||
|
int diff, wrong_idx;
|
||||||
|
|
||||||
|
diff = data->long_retries / IWN_LONG_RETRY_FW_OVERFLOW;
|
||||||
|
wrong_idx = (idx + diff) % IWN_TX_RING_COUNT;
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Mark the entry so the above code will check it
|
||||||
|
* next time.
|
||||||
|
*/
|
||||||
|
ring->data[wrong_idx].remapped = 1;
|
||||||
|
}
|
||||||
|
|
||||||
|
if (status & IWN_AGG_TX_STATE_UNDERRUN_MSK) {
|
||||||
|
/*
|
||||||
|
* NB: count retries but postpone - it was not
|
||||||
|
* transmitted.
|
||||||
|
*/
|
||||||
|
continue;
|
||||||
|
}
|
||||||
|
|
||||||
bit = idx - start;
|
bit = idx - start;
|
||||||
shift = 0;
|
shift = 0;
|
||||||
if (bit >= 64) {
|
if (bit >= 64) {
|
||||||
shift = 0x100 - idx + start;
|
shift = 0x100 - bit;
|
||||||
bit = 0;
|
bit = 0;
|
||||||
start = idx;
|
|
||||||
} else if (bit <= -64)
|
} else if (bit <= -64)
|
||||||
bit = 0x100 - start + idx;
|
bit = 0x100 + bit;
|
||||||
else if (bit < 0) {
|
else if (bit < 0) {
|
||||||
shift = start - idx;
|
shift = -bit;
|
||||||
start = idx;
|
|
||||||
bit = 0;
|
bit = 0;
|
||||||
}
|
}
|
||||||
bitmap = bitmap << shift;
|
bitmap = bitmap << shift;
|
||||||
bitmap |= 1ULL << bit;
|
bitmap |= 1ULL << bit;
|
||||||
}
|
}
|
||||||
tap = sc->qid2tap[qid];
|
|
||||||
tid = tap->txa_tid;
|
|
||||||
wn = (void *)tap->txa_ni;
|
|
||||||
wn->agg[tid].bitmap = bitmap;
|
|
||||||
wn->agg[tid].startidx = start;
|
wn->agg[tid].startidx = start;
|
||||||
wn->agg[tid].nframes = nframes;
|
wn->agg[tid].bitmap = bitmap;
|
||||||
|
wn->agg[tid].short_retries = rtsfailcnt;
|
||||||
|
|
||||||
res = NULL;
|
DPRINTF(sc, IWN_DEBUG_AMPDU, "%s: nframes %d start %d bitmap %016jX\n",
|
||||||
ssn = 0;
|
__func__, nframes, start, (uintmax_t)bitmap);
|
||||||
if (!IEEE80211_AMPDU_RUNNING(tap)) {
|
|
||||||
res = tap->txa_private;
|
i = ring->read;
|
||||||
ssn = tap->txa_start & 0xfff;
|
|
||||||
|
for (tx_err = 0;
|
||||||
|
i != wn->agg[tid].startidx;
|
||||||
|
i = (i + 1) % IWN_TX_RING_COUNT) {
|
||||||
|
data = &ring->data[i];
|
||||||
|
data->remapped = 0;
|
||||||
|
if (data->m == NULL)
|
||||||
|
continue;
|
||||||
|
|
||||||
|
tx_err++;
|
||||||
|
iwn_agg_tx_complete(sc, ring, tid, i, 0);
|
||||||
}
|
}
|
||||||
|
|
||||||
/* This is going nframes DWORDS into the descriptor? */
|
ring->read = wn->agg[tid].startidx;
|
||||||
seqno = le32toh(*(status + nframes)) & 0xfff;
|
ring->queued -= tx_err;
|
||||||
for (lastidx = (seqno & 0xff); ring->read != lastidx;) {
|
|
||||||
data = &ring->data[ring->read];
|
|
||||||
|
|
||||||
/* Unmap and free mbuf. */
|
iwn_check_tx_ring(sc, qid);
|
||||||
bus_dmamap_sync(ring->data_dmat, data->map,
|
|
||||||
BUS_DMASYNC_POSTWRITE);
|
|
||||||
bus_dmamap_unload(ring->data_dmat, data->map);
|
|
||||||
m = data->m, data->m = NULL;
|
|
||||||
ni = data->ni, data->ni = NULL;
|
|
||||||
|
|
||||||
KASSERT(ni != NULL, ("no node"));
|
|
||||||
KASSERT(m != NULL, ("no mbuf"));
|
|
||||||
DPRINTF(sc, IWN_DEBUG_XMIT, "%s: freeing m=%p\n", __func__, m);
|
|
||||||
ieee80211_tx_complete(ni, m, 1);
|
|
||||||
|
|
||||||
ring->queued--;
|
|
||||||
ring->read = (ring->read + 1) % IWN_TX_RING_COUNT;
|
|
||||||
}
|
|
||||||
|
|
||||||
if (ring->queued == 0 && res != NULL) {
|
|
||||||
iwn_nic_lock(sc);
|
|
||||||
ops->ampdu_tx_stop(sc, qid, tid, ssn);
|
|
||||||
iwn_nic_unlock(sc);
|
|
||||||
sc->qid2tap[qid] = NULL;
|
|
||||||
free(res, M_DEVBUF);
|
|
||||||
return;
|
|
||||||
}
|
|
||||||
|
|
||||||
sc->sc_tx_timer = 0;
|
|
||||||
if (ring->queued < IWN_TX_RING_LOMARK)
|
|
||||||
sc->qfullmsk &= ~(1 << ring->qid);
|
|
||||||
|
|
||||||
DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
|
DPRINTF(sc, IWN_DEBUG_TRACE, "->%s: end\n",__func__);
|
||||||
}
|
}
|
||||||
@ -4369,7 +4545,7 @@ iwn_tx_data(struct iwn_softc *sc, struct mbuf *m, struct ieee80211_node *ni)
|
|||||||
struct ieee80211_frame *wh;
|
struct ieee80211_frame *wh;
|
||||||
struct ieee80211_key *k = NULL;
|
struct ieee80211_key *k = NULL;
|
||||||
uint32_t flags;
|
uint32_t flags;
|
||||||
uint16_t seqno, qos;
|
uint16_t qos;
|
||||||
uint8_t tid, type;
|
uint8_t tid, type;
|
||||||
int ac, totlen, rate;
|
int ac, totlen, rate;
|
||||||
|
|
||||||
@ -4411,25 +4587,17 @@ iwn_tx_data(struct iwn_softc *sc, struct mbuf *m, struct ieee80211_node *ni)
|
|||||||
*/
|
*/
|
||||||
|
|
||||||
ac = M_WME_GETAC(m);
|
ac = M_WME_GETAC(m);
|
||||||
seqno = ni->ni_txseqs[tid];
|
|
||||||
if (m->m_flags & M_AMPDU_MPDU) {
|
if (m->m_flags & M_AMPDU_MPDU) {
|
||||||
struct ieee80211_tx_ampdu *tap = &ni->ni_tx_ampdu[ac];
|
struct ieee80211_tx_ampdu *tap = &ni->ni_tx_ampdu[ac];
|
||||||
|
|
||||||
if (!IEEE80211_AMPDU_RUNNING(tap)) {
|
if (!IEEE80211_AMPDU_RUNNING(tap))
|
||||||
return (EINVAL);
|
return (EINVAL);
|
||||||
}
|
|
||||||
|
|
||||||
/*
|
/* NB: clear Fragment Number field. */
|
||||||
* Queue this frame to the hardware ring that we've
|
/* XXX move this to net80211 */
|
||||||
* negotiated AMPDU TX on.
|
*(uint16_t *)wh->i_seq = 0;
|
||||||
*
|
|
||||||
* Note that the sequence number must match the TX slot
|
|
||||||
* being used!
|
|
||||||
*/
|
|
||||||
ac = *(int *)tap->txa_private;
|
ac = *(int *)tap->txa_private;
|
||||||
*(uint16_t *)wh->i_seq =
|
|
||||||
htole16(seqno << IEEE80211_SEQ_SEQ_SHIFT);
|
|
||||||
ni->ni_txseqs[tid]++;
|
|
||||||
}
|
}
|
||||||
|
|
||||||
/* Encrypt the frame if need be. */
|
/* Encrypt the frame if need be. */
|
||||||
@ -4498,15 +4666,42 @@ iwn_tx_data(struct iwn_softc *sc, struct mbuf *m, struct ieee80211_node *ni)
|
|||||||
}
|
}
|
||||||
|
|
||||||
ring = &sc->txq[ac];
|
ring = &sc->txq[ac];
|
||||||
if ((m->m_flags & M_AMPDU_MPDU) != 0 &&
|
if (m->m_flags & M_AMPDU_MPDU) {
|
||||||
(seqno % 256) != ring->cur) {
|
uint16_t seqno = ni->ni_txseqs[tid];
|
||||||
device_printf(sc->sc_dev,
|
|
||||||
"%s: m=%p: seqno (%d) (%d) != ring index (%d) !\n",
|
if (ring->queued > IWN_TX_RING_COUNT / 2 &&
|
||||||
__func__,
|
(ring->cur + 1) % IWN_TX_RING_COUNT == ring->read) {
|
||||||
m,
|
DPRINTF(sc, IWN_DEBUG_AMPDU, "%s: no more space "
|
||||||
seqno,
|
"(queued %d) left in %d queue!\n",
|
||||||
seqno % 256,
|
__func__, ring->queued, ac);
|
||||||
ring->cur);
|
return (ENOBUFS);
|
||||||
|
}
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Queue this frame to the hardware ring that we've
|
||||||
|
* negotiated AMPDU TX on.
|
||||||
|
*
|
||||||
|
* Note that the sequence number must match the TX slot
|
||||||
|
* being used!
|
||||||
|
*/
|
||||||
|
if ((seqno % 256) != ring->cur) {
|
||||||
|
device_printf(sc->sc_dev,
|
||||||
|
"%s: m=%p: seqno (%d) (%d) != ring index (%d) !\n",
|
||||||
|
__func__,
|
||||||
|
m,
|
||||||
|
seqno,
|
||||||
|
seqno % 256,
|
||||||
|
ring->cur);
|
||||||
|
|
||||||
|
/* XXX until D9195 will not be committed */
|
||||||
|
ni->ni_txseqs[tid] &= ~0xff;
|
||||||
|
ni->ni_txseqs[tid] += ring->cur;
|
||||||
|
seqno = ni->ni_txseqs[tid];
|
||||||
|
}
|
||||||
|
|
||||||
|
*(uint16_t *)wh->i_seq =
|
||||||
|
htole16(seqno << IEEE80211_SEQ_SEQ_SHIFT);
|
||||||
|
ni->ni_txseqs[tid]++;
|
||||||
}
|
}
|
||||||
|
|
||||||
/* Prepare TX firmware command. */
|
/* Prepare TX firmware command. */
|
||||||
@ -4668,6 +4863,13 @@ iwn_tx_cmd(struct iwn_softc *sc, struct mbuf *m, struct ieee80211_node *ni,
|
|||||||
desc = &ring->desc[ring->cur];
|
desc = &ring->desc[ring->cur];
|
||||||
data = &ring->data[ring->cur];
|
data = &ring->data[ring->cur];
|
||||||
|
|
||||||
|
if (__predict_false(data->m != NULL || data->ni != NULL)) {
|
||||||
|
device_printf(sc->sc_dev, "%s: ni (%p) or m (%p) for idx %d "
|
||||||
|
"in queue %d is not NULL!\n", __func__, data->ni, data->m,
|
||||||
|
ring->cur, ring->qid);
|
||||||
|
return EIO;
|
||||||
|
}
|
||||||
|
|
||||||
/* Prepare TX firmware command. */
|
/* Prepare TX firmware command. */
|
||||||
cmd = &ring->cmd[ring->cur];
|
cmd = &ring->cmd[ring->cur];
|
||||||
cmd->code = IWN_CMD_TX_DATA;
|
cmd->code = IWN_CMD_TX_DATA;
|
||||||
|
@ -44,6 +44,7 @@ enum {
|
|||||||
IWN_DEBUG_PWRSAVE = 0x00004000, /* Power save operations */
|
IWN_DEBUG_PWRSAVE = 0x00004000, /* Power save operations */
|
||||||
IWN_DEBUG_SCAN = 0x00008000, /* Scan related operations */
|
IWN_DEBUG_SCAN = 0x00008000, /* Scan related operations */
|
||||||
IWN_DEBUG_STATS = 0x00010000, /* Statistics updates */
|
IWN_DEBUG_STATS = 0x00010000, /* Statistics updates */
|
||||||
|
IWN_DEBUG_AMPDU = 0x00020000, /* A-MPDU specific Tx */
|
||||||
IWN_DEBUG_REGISTER = 0x20000000, /* print chipset register */
|
IWN_DEBUG_REGISTER = 0x20000000, /* print chipset register */
|
||||||
IWN_DEBUG_TRACE = 0x40000000, /* Print begin and start driver function */
|
IWN_DEBUG_TRACE = 0x40000000, /* Print begin and start driver function */
|
||||||
IWN_DEBUG_FATAL = 0x80000000, /* fatal errors */
|
IWN_DEBUG_FATAL = 0x80000000, /* fatal errors */
|
||||||
|
@ -1378,11 +1378,18 @@ struct iwn_ucode_info {
|
|||||||
|
|
||||||
#define IWN_AGG_TX_STATUS_MSK 0x00000fff
|
#define IWN_AGG_TX_STATUS_MSK 0x00000fff
|
||||||
#define IWN_AGG_TX_TRY_MSK 0x0000f000
|
#define IWN_AGG_TX_TRY_MSK 0x0000f000
|
||||||
|
#define IWN_AGG_TX_TRY_POS 12
|
||||||
|
#define IWN_AGG_TX_TRY_COUNT(status) \
|
||||||
|
(((status) & IWN_AGG_TX_TRY_MSK) >> IWN_AGG_TX_TRY_POS)
|
||||||
|
|
||||||
#define IWN_AGG_TX_STATE_LAST_SENT_MSK \
|
#define IWN_AGG_TX_STATE_LAST_SENT_MSK \
|
||||||
(IWN_AGG_TX_STATE_LAST_SENT_TTL_MSK | \
|
(IWN_AGG_TX_STATE_LAST_SENT_TTL_MSK | \
|
||||||
IWN_AGG_TX_STATE_LAST_SENT_TRY_CNT_MSK)
|
IWN_AGG_TX_STATE_LAST_SENT_TRY_CNT_MSK)
|
||||||
|
|
||||||
|
#define IWN_AGG_TX_STATE_IGNORE_MASK \
|
||||||
|
(IWN_AGG_TX_STATE_FEW_BYTES_MSK | \
|
||||||
|
IWN_AGG_TX_STATE_ABORT_MSK)
|
||||||
|
|
||||||
/* # tx attempts for first frame in aggregation */
|
/* # tx attempts for first frame in aggregation */
|
||||||
#define IWN_AGG_TX_STATE_TRY_CNT_POS 12
|
#define IWN_AGG_TX_STATE_TRY_CNT_POS 12
|
||||||
#define IWN_AGG_TX_STATE_TRY_CNT_MSK 0xf000
|
#define IWN_AGG_TX_STATE_TRY_CNT_MSK 0xf000
|
||||||
|
@ -100,6 +100,11 @@ struct iwn_tx_data {
|
|||||||
bus_addr_t scratch_paddr;
|
bus_addr_t scratch_paddr;
|
||||||
struct mbuf *m;
|
struct mbuf *m;
|
||||||
struct ieee80211_node *ni;
|
struct ieee80211_node *ni;
|
||||||
|
unsigned int remapped:1;
|
||||||
|
unsigned int long_retries:7;
|
||||||
|
#define IWN_LONG_RETRY_FW_OVERFLOW 0x10
|
||||||
|
#define IWN_LONG_RETRY_LIMIT_LOG 7
|
||||||
|
#define IWN_LONG_RETRY_LIMIT ((1 << IWN_LONG_RETRY_LIMIT_LOG) - 3)
|
||||||
};
|
};
|
||||||
|
|
||||||
struct iwn_tx_ring {
|
struct iwn_tx_ring {
|
||||||
@ -138,8 +143,8 @@ struct iwn_node {
|
|||||||
uint8_t id;
|
uint8_t id;
|
||||||
struct {
|
struct {
|
||||||
uint64_t bitmap;
|
uint64_t bitmap;
|
||||||
|
int short_retries;
|
||||||
int startidx;
|
int startidx;
|
||||||
int nframes;
|
|
||||||
} agg[IEEE80211_TID_SIZE];
|
} agg[IEEE80211_TID_SIZE];
|
||||||
};
|
};
|
||||||
|
|
||||||
|
Loading…
x
Reference in New Issue
Block a user