From 062528c5f216f702be2c63145ca1c453415badfb Mon Sep 17 00:00:00 2001 From: Andriy Gapon Date: Mon, 27 Jul 2020 09:10:02 +0000 Subject: [PATCH] actually enable gate control for allwinner's r-ccu ir clock The gate control bit offset was correctly specified, but AW_CLK_HAS_GATE flag was not set. Tested with (C)IR receiver on Orange Pi PC Plus. Reviewed by: manu MFC after: 1 week --- sys/arm/allwinner/clkng/ccu_sun8i_r.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/sys/arm/allwinner/clkng/ccu_sun8i_r.c b/sys/arm/allwinner/clkng/ccu_sun8i_r.c index 74f822ca761d..a0b7093ea8fd 100644 --- a/sys/arm/allwinner/clkng/ccu_sun8i_r.c +++ b/sys/arm/allwinner/clkng/ccu_sun8i_r.c @@ -122,7 +122,7 @@ NM_CLK(r_ccu_ir_clk, 16, 2, 0, 0, /* M flags */ 24, 2, /* mux */ 31, /* gate */ - AW_CLK_HAS_MUX | AW_CLK_REPARENT); /* flags */ + AW_CLK_HAS_MUX | AW_CLK_REPARENT | AW_CLK_HAS_GATE);/* flags */ static const char *a83t_ir_parents[] = {"osc16M", "osc24M"}; static struct aw_clk_nm_def a83t_ir_clk = {