From 076f1c081a744102eb14070e5fa8d579484ecc5a Mon Sep 17 00:00:00 2001 From: Jake Burkholder Date: Mon, 20 Aug 2001 23:34:46 +0000 Subject: [PATCH] Add definitions for bits in condition code register and the load store unit control registers. Move tstate definitions to their own file. Submitted by: tmm --- sys/sparc64/include/ccr.h | 40 ++++++++++++++++++++ sys/sparc64/include/lsu.h | 52 ++++++++++++++++++++++++++ sys/sparc64/include/pstate.h | 13 ------- sys/sparc64/include/tstate.h | 72 ++++++++++++++++++++++++++++++++++++ 4 files changed, 164 insertions(+), 13 deletions(-) create mode 100644 sys/sparc64/include/ccr.h create mode 100644 sys/sparc64/include/lsu.h create mode 100644 sys/sparc64/include/tstate.h diff --git a/sys/sparc64/include/ccr.h b/sys/sparc64/include/ccr.h new file mode 100644 index 000000000000..8d808e7c6da5 --- /dev/null +++ b/sys/sparc64/include/ccr.h @@ -0,0 +1,40 @@ +/*- + * Copyright 2001 by Thomas Moestl . All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * $FreeBSD$ + */ + +#ifndef _MACHINE_CCR_H_ +#define _MACHINE_CCR_H_ + +#define ICC_C (1UL << 0) +#define ICC_V (1UL << 1) +#define ICC_Z (1UL << 2) +#define ICC_N (1UL << 3) + +#define XCC_C (1UL << 4) +#define XCC_V (1UL << 5) +#define XCC_Z (1UL << 6) +#define XCC_N (1UL << 7) + +#endif /* !_MACHINE_CCR_H_ */ diff --git a/sys/sparc64/include/lsu.h b/sys/sparc64/include/lsu.h new file mode 100644 index 000000000000..3bea7473ee71 --- /dev/null +++ b/sys/sparc64/include/lsu.h @@ -0,0 +1,52 @@ +/*- + * Copyright 2001 by Thomas Moestl . All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * $FreeBSD$ + */ + +#ifndef _MACHINE_LSU_H_ +#define _MACHINE_LSU_H_ + +#define LSU_IC (1UL << 0) +#define LSU_DC (1UL << 1) +#define LSU_IM (1UL << 2) +#define LSU_DM (1UL << 3) + +#define LSU_FM_SHIFT 4 +#define LSU_FM_BITS 16 +#define LSU_FM_MASK (((1UL << LSU_FM_BITS) - 1) << LSU_FM_SHIFT) + +#define LSU_VM_SHIFT 25 +#define LSU_VM_BITS 8 +#define LSU_VM_MASK (((1UL << LSU_VM_BITS) - 1) << LSU_VM_SHIFT) + +#define LSU_PM_SHIFT 33 +#define LSU_PM_BITS 8 +#define LSU_PM_MASK (((1UL << LSU_PM_BITS) - 1) << LSU_PM_SHIFT) + +#define LSU_VW (1UL << 21) +#define LSU_VR (1UL << 22) +#define LSU_PW (1UL << 23) +#define LSU_PR (1UL << 24) + +#endif /* _MACHINE_LSU_H_ */ diff --git a/sys/sparc64/include/pstate.h b/sys/sparc64/include/pstate.h index 631a7e13a100..fe69bfe3a8bd 100644 --- a/sys/sparc64/include/pstate.h +++ b/sys/sparc64/include/pstate.h @@ -47,19 +47,6 @@ #define PSTATE_MG (1<<10) #define PSTATE_IG (1<<11) -#define TSTATE_PSTATE_SHIFT 8 -#define TSTATE_PSTATE(x) ((x) << TSTATE_PSTATE_SHIFT) -#define TSTATE_AG TSTATE_PSTATE(PSTATE_AG) -#define TSTATE_IE TSTATE_PSTATE(PSTATE_IE) -#define TSTATE_PRIV TSTATE_PSTATE(PSTATE_PRIV) -#define TSTATE_AM TSTATE_PSTATE(PSTATE_AM) -#define TSTATE_PEF TSTATE_PSTATE(PSTATE_PEF) -#define TSTATE_RED TSTATE_PSTATE(PSTATE_RED) -#define TSTATE_TLE TSTATE_PSTATE(PSTATE_TLE) -#define TSTATE_CLE TSTATE_PSTATE(PSTATE_CLE) -#define TSTATE_MG TSTATE_PSTATE(PSTATE_MG) -#define TSTATE_IG TSTATE_PSTATE(PSTATE_IG) - #define VER_MANUF_SHIFT (48) #define VER_IMPL_SHIFT (32) #define VER_MASK_SHIFT (24) diff --git a/sys/sparc64/include/tstate.h b/sys/sparc64/include/tstate.h new file mode 100644 index 000000000000..9be6f435d556 --- /dev/null +++ b/sys/sparc64/include/tstate.h @@ -0,0 +1,72 @@ +/*- + * Copyright 2001 by Thomas Moestl . All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE + * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * $FreeBSD$ + */ + +#ifndef _MACHINE_TSTATE_H_ +#define _MACHINE_TSTATE_H_ + +#include +#include + +#define TSTATE_CWP_SHIFT 0 +#define TSTATE_CWP_BITS 5 +#define TSTATE_CWP_MASK \ + (((1 << TSTATE_CWP_BITS) - 1) << TSTATE_CWP_SHIFT) +#define TSTATE_CWP(x) ((x & TSTATE_CWP_MASK) >> TSTATE_CWP_SHIFT) + +#define TSTATE_PSTATE_SHIFT 8 +#define TSTATE_PSTATE_BITS 12 +#define TSTATE_PSTATE_MASK \ + (((1 << TSTATE_PSTATE_BITS) - 1) << TSTATE_PSTATE_SHIFT) +#define TSTATE_PSTATE(x) ((x) << TSTATE_PSTATE_SHIFT) +#define TSTATE_AG TSTATE_PSTATE(PSTATE_AG) +#define TSTATE_IE TSTATE_PSTATE(PSTATE_IE) +#define TSTATE_PRIV TSTATE_PSTATE(PSTATE_PRIV) +#define TSTATE_AM TSTATE_PSTATE(PSTATE_AM) +#define TSTATE_PEF TSTATE_PSTATE(PSTATE_PEF) +#define TSTATE_RED TSTATE_PSTATE(PSTATE_RED) +#define TSTATE_TLE TSTATE_PSTATE(PSTATE_TLE) +#define TSTATE_CLE TSTATE_PSTATE(PSTATE_CLE) +#define TSTATE_MG TSTATE_PSTATE(PSTATE_MG) +#define TSTATE_IG TSTATE_PSTATE(PSTATE_IG) + +#define TSTATE_ASI_SHIFT 24 +#define TSTATE_ASI_BITS 8 +#define TSTATE_ASI_MASK \ + (((1 << TSTATE_ASI_BITS) - 1) << TSTATE_ASI_SHIFT) +#define TSTATE_ASI(x) ((x & TSTATE_ASI_MASK) >> TSTATE_ASI_SHIFT) + +#define TSTATE_CCR_SHIFT 32 +#define TSTATE_CCR(x) ((x) << TSTATE_CCR_SHIFT) +#define TSTATE_ICC_C TSTATE_CCR(ICC_C) +#define TSTATE_ICC_V TSTATE_CCR(ICC_V) +#define TSTATE_ICC_Z TSTATE_CCR(ICC_Z) +#define TSTATE_ICC_N TSTATE_CCR(ICC_N) +#define TSTATE_XCC_C TSTATE_CCR(XCC_C) +#define TSTATE_XCC_V TSTATE_CCR(XCC_V) +#define TSTATE_XCC_Z TSTATE_CCR(XCC_Z) +#define TSTATE_XCC_N TSTATE_CCR(XCC_N) + +#endif /* !_MACHINE_TSTATE_H_ */