Use the correct type for physical addresses.
On Book-E, physical addresses are actually 36-bits, not 32-bits. This is currently worked around by ignoring the top bits. However, in some cases, the boot loader configures CCSR to something above the 32-bit mark. This is stage 1 in updating the pmap to handle 36-bit physaddr.
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8656f200dc
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0936003e3d
@ -250,7 +250,7 @@ static int moea_pte_insert(u_int, struct pte *);
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* PVO calls.
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*/
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static int moea_pvo_enter(pmap_t, uma_zone_t, struct pvo_head *,
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vm_offset_t, vm_offset_t, u_int, int);
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vm_offset_t, vm_paddr_t, u_int, int);
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static void moea_pvo_remove(struct pvo_entry *, int);
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static struct pvo_entry *moea_pvo_find_va(pmap_t, vm_offset_t, int *);
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static struct pte *moea_pvo_to_pte(const struct pvo_entry *, int);
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@ -260,7 +260,7 @@ static struct pte *moea_pvo_to_pte(const struct pvo_entry *, int);
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*/
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static int moea_enter_locked(pmap_t, vm_offset_t, vm_page_t,
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vm_prot_t, u_int, int8_t);
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static void moea_syncicache(vm_offset_t, vm_size_t);
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static void moea_syncicache(vm_paddr_t, vm_size_t);
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static boolean_t moea_query_bit(vm_page_t, int);
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static u_int moea_clear_bit(vm_page_t, int);
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static void moea_kremove(mmu_t, vm_offset_t);
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@ -306,10 +306,10 @@ void moea_deactivate(mmu_t, struct thread *);
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void moea_cpu_bootstrap(mmu_t, int);
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void moea_bootstrap(mmu_t, vm_offset_t, vm_offset_t);
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void *moea_mapdev(mmu_t, vm_paddr_t, vm_size_t);
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void *moea_mapdev_attr(mmu_t, vm_offset_t, vm_size_t, vm_memattr_t);
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void *moea_mapdev_attr(mmu_t, vm_paddr_t, vm_size_t, vm_memattr_t);
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void moea_unmapdev(mmu_t, vm_offset_t, vm_size_t);
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vm_paddr_t moea_kextract(mmu_t, vm_offset_t);
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void moea_kenter_attr(mmu_t, vm_offset_t, vm_offset_t, vm_memattr_t);
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void moea_kenter_attr(mmu_t, vm_offset_t, vm_paddr_t, vm_memattr_t);
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void moea_kenter(mmu_t, vm_offset_t, vm_paddr_t);
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void moea_page_set_memattr(mmu_t mmu, vm_page_t m, vm_memattr_t ma);
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boolean_t moea_dev_direct_mapped(mmu_t, vm_paddr_t, vm_size_t);
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@ -371,7 +371,7 @@ static mmu_method_t moea_methods[] = {
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MMU_DEF(oea_mmu, MMU_TYPE_OEA, moea_methods, 0);
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static __inline uint32_t
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moea_calc_wimg(vm_offset_t pa, vm_memattr_t ma)
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moea_calc_wimg(vm_paddr_t pa, vm_memattr_t ma)
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{
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uint32_t pte_lo;
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int i;
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@ -1472,7 +1472,7 @@ moea_kenter(mmu_t mmu, vm_offset_t va, vm_paddr_t pa)
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}
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void
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moea_kenter_attr(mmu_t mmu, vm_offset_t va, vm_offset_t pa, vm_memattr_t ma)
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moea_kenter_attr(mmu_t mmu, vm_offset_t va, vm_paddr_t pa, vm_memattr_t ma)
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{
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u_int pte_lo;
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int error;
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@ -1877,14 +1877,14 @@ moea_bootstrap_alloc(vm_size_t size, u_int align)
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}
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static void
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moea_syncicache(vm_offset_t pa, vm_size_t len)
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moea_syncicache(vm_paddr_t pa, vm_size_t len)
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{
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__syncicache((void *)pa, len);
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}
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static int
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moea_pvo_enter(pmap_t pm, uma_zone_t zone, struct pvo_head *pvo_head,
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vm_offset_t va, vm_offset_t pa, u_int pte_lo, int flags)
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vm_offset_t va, vm_paddr_t pa, u_int pte_lo, int flags)
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{
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struct pvo_entry *pvo;
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u_int sr;
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@ -2472,7 +2472,7 @@ moea_clear_bit(vm_page_t m, int ptebit)
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* Return true if the physical range is encompassed by the battable[idx]
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*/
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static int
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moea_bat_mapped(int idx, vm_offset_t pa, vm_size_t size)
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moea_bat_mapped(int idx, vm_paddr_t pa, vm_size_t size)
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{
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u_int prot;
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u_int32_t start;
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@ -2539,7 +2539,7 @@ moea_mapdev(mmu_t mmu, vm_paddr_t pa, vm_size_t size)
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}
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void *
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moea_mapdev_attr(mmu_t mmu, vm_offset_t pa, vm_size_t size, vm_memattr_t ma)
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moea_mapdev_attr(mmu_t mmu, vm_paddr_t pa, vm_size_t size, vm_memattr_t ma)
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{
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vm_offset_t va, tmpva, ppa, offset;
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int i;
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@ -226,7 +226,7 @@ static boolean_t moea64_query_bit(mmu_t, vm_page_t, uint64_t);
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static u_int moea64_clear_bit(mmu_t, vm_page_t, uint64_t);
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static void moea64_kremove(mmu_t, vm_offset_t);
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static void moea64_syncicache(mmu_t, pmap_t pmap, vm_offset_t va,
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vm_offset_t pa, vm_size_t sz);
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vm_paddr_t pa, vm_size_t sz);
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/*
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* Kernel MMU interface
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@ -267,11 +267,11 @@ void moea64_zero_page_idle(mmu_t, vm_page_t);
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void moea64_activate(mmu_t, struct thread *);
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void moea64_deactivate(mmu_t, struct thread *);
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void *moea64_mapdev(mmu_t, vm_paddr_t, vm_size_t);
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void *moea64_mapdev_attr(mmu_t, vm_offset_t, vm_size_t, vm_memattr_t);
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void *moea64_mapdev_attr(mmu_t, vm_paddr_t, vm_size_t, vm_memattr_t);
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void moea64_unmapdev(mmu_t, vm_offset_t, vm_size_t);
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vm_paddr_t moea64_kextract(mmu_t, vm_offset_t);
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void moea64_page_set_memattr(mmu_t, vm_page_t m, vm_memattr_t ma);
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void moea64_kenter_attr(mmu_t, vm_offset_t, vm_offset_t, vm_memattr_t ma);
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void moea64_kenter_attr(mmu_t, vm_offset_t, vm_paddr_t, vm_memattr_t ma);
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void moea64_kenter(mmu_t, vm_offset_t, vm_paddr_t);
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boolean_t moea64_dev_direct_mapped(mmu_t, vm_paddr_t, vm_size_t);
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static void moea64_sync_icache(mmu_t, pmap_t, vm_offset_t, vm_size_t);
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@ -419,7 +419,7 @@ moea64_pte_from_pvo(const struct pvo_entry *pvo, struct lpte *lpte)
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}
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static __inline uint64_t
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moea64_calc_wimg(vm_offset_t pa, vm_memattr_t ma)
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moea64_calc_wimg(vm_paddr_t pa, vm_memattr_t ma)
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{
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uint64_t pte_lo;
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int i;
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@ -1054,7 +1054,7 @@ moea64_unwire(mmu_t mmu, pmap_t pm, vm_offset_t sva, vm_offset_t eva)
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*/
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static __inline
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void moea64_set_scratchpage_pa(mmu_t mmup, int which, vm_offset_t pa) {
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void moea64_set_scratchpage_pa(mmu_t mmup, int which, vm_paddr_t pa) {
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KASSERT(!hw_direct_map, ("Using OEA64 scratchpage with a direct map!"));
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mtx_assert(&moea64_scratchpage_mtx, MA_OWNED);
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@ -1159,7 +1159,7 @@ moea64_copy_pages(mmu_t mmu, vm_page_t *ma, vm_offset_t a_offset,
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void
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moea64_zero_page_area(mmu_t mmu, vm_page_t m, int off, int size)
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{
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vm_offset_t pa = VM_PAGE_TO_PHYS(m);
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vm_paddr_t pa = VM_PAGE_TO_PHYS(m);
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if (size + off > PAGE_SIZE)
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panic("moea64_zero_page: size + off > PAGE_SIZE");
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@ -1180,7 +1180,7 @@ moea64_zero_page_area(mmu_t mmu, vm_page_t m, int off, int size)
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void
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moea64_zero_page(mmu_t mmu, vm_page_t m)
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{
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vm_offset_t pa = VM_PAGE_TO_PHYS(m);
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vm_paddr_t pa = VM_PAGE_TO_PHYS(m);
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vm_offset_t va, off;
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if (!hw_direct_map) {
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@ -1310,7 +1310,7 @@ moea64_enter(mmu_t mmu, pmap_t pmap, vm_offset_t va, vm_page_t m,
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}
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static void
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moea64_syncicache(mmu_t mmu, pmap_t pmap, vm_offset_t va, vm_offset_t pa,
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moea64_syncicache(mmu_t mmu, pmap_t pmap, vm_offset_t va, vm_paddr_t pa,
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vm_size_t sz)
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{
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@ -1692,7 +1692,7 @@ moea64_page_set_memattr(mmu_t mmu, vm_page_t m, vm_memattr_t ma)
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* Map a wired page into kernel virtual address space.
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*/
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void
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moea64_kenter_attr(mmu_t mmu, vm_offset_t va, vm_offset_t pa, vm_memattr_t ma)
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moea64_kenter_attr(mmu_t mmu, vm_offset_t va, vm_paddr_t pa, vm_memattr_t ma)
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{
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int error;
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struct pvo_entry *pvo, *oldpvo;
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@ -2517,7 +2517,7 @@ moea64_dev_direct_mapped(mmu_t mmu, vm_paddr_t pa, vm_size_t size)
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* NOT real memory.
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*/
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void *
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moea64_mapdev_attr(mmu_t mmu, vm_offset_t pa, vm_size_t size, vm_memattr_t ma)
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moea64_mapdev_attr(mmu_t mmu, vm_paddr_t pa, vm_size_t size, vm_memattr_t ma)
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{
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vm_offset_t va, tmpva, ppa, offset;
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@ -194,7 +194,7 @@ static tlbtid_t tid_alloc(struct pmap *);
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static void tlb_print_entry(int, uint32_t, uint32_t, uint32_t, uint32_t);
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static int tlb1_set_entry(vm_offset_t, vm_offset_t, vm_size_t, uint32_t);
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static int tlb1_set_entry(vm_offset_t, vm_paddr_t, vm_size_t, uint32_t);
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static void tlb1_write_entry(unsigned int);
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static int tlb1_iomapped(int, vm_paddr_t, vm_size_t, vm_offset_t *);
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static vm_size_t tlb1_mapin_region(vm_offset_t, vm_paddr_t, vm_size_t);
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@ -392,7 +392,7 @@ static mmu_method_t mmu_booke_methods[] = {
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MMU_DEF(booke_mmu, MMU_TYPE_BOOKE, mmu_booke_methods, 0);
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static __inline uint32_t
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tlb_calc_wimg(vm_offset_t pa, vm_memattr_t ma)
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tlb_calc_wimg(vm_paddr_t pa, vm_memattr_t ma)
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{
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uint32_t attrib;
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int i;
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@ -3016,7 +3016,7 @@ size2tsize(vm_size_t size)
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* kept in tlb1_idx) and are not supposed to be invalidated.
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*/
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static int
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tlb1_set_entry(vm_offset_t va, vm_offset_t pa, vm_size_t size,
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tlb1_set_entry(vm_offset_t va, vm_paddr_t pa, vm_size_t size,
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uint32_t flags)
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{
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uint32_t ts, tid;
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@ -3160,7 +3160,7 @@ tlb1_init()
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tlb1[i].phys = mas3 & MAS3_RPN;
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if (i == 0)
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kernload = mas3 & MAS3_RPN;
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kernload = tlb1[i].phys;
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tsz = (mas1 & MAS1_TSIZE_MASK) >> MAS1_TSIZE_SHIFT;
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tlb1[i].size = (tsz > 0) ? tsize2size(tsz) : 0;
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*/
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#ifndef LOCORE
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struct pte {
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vm_offset_t rpn;
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vm_paddr_t rpn;
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uint32_t flags;
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};
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typedef struct pte pte_t;
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@ -273,5 +273,5 @@ typedef struct pte pte_t;
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#define PTE_ISMODIFIED(pte) ((pte)->flags & PTE_MODIFIED)
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#define PTE_ISREFERENCED(pte) ((pte)->flags & PTE_REFERENCED)
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#endif /* BOOKE_PPC4XX */
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#endif /* BOOKE */
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#endif /* _MACHINE_PTE_H_ */
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@ -107,14 +107,14 @@ CODE {
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return;
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}
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static void *mmu_null_mapdev_attr(mmu_t mmu, vm_offset_t pa,
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static void *mmu_null_mapdev_attr(mmu_t mmu, vm_paddr_t pa,
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vm_size_t size, vm_memattr_t ma)
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{
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return MMU_MAPDEV(mmu, pa, size);
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}
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static void mmu_null_kenter_attr(mmu_t mmu, vm_offset_t va,
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vm_offset_t pa, vm_memattr_t ma)
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vm_paddr_t pa, vm_memattr_t ma)
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{
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MMU_KENTER(mmu, va, pa);
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}
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@ -792,7 +792,7 @@ METHOD void * mapdev {
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*/
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METHOD void * mapdev_attr {
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mmu_t _mmu;
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vm_offset_t _pa;
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vm_paddr_t _pa;
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vm_size_t _size;
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vm_memattr_t _attr;
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} DEFAULT mmu_null_mapdev_attr;
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@ -859,7 +859,7 @@ METHOD void kenter {
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METHOD void kenter_attr {
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mmu_t _mmu;
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vm_offset_t _va;
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vm_offset_t _pa;
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vm_paddr_t _pa;
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vm_memattr_t _ma;
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} DEFAULT mmu_null_kenter_attr;
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