Make this compile without depending on the FreeBSD 2.2 compatability

defines.
This commit is contained in:
Peter Wemm 2000-05-28 16:31:35 +00:00
parent 55b161a4d3
commit 0a8e3ce8a5
4 changed files with 26 additions and 24 deletions

View File

@ -67,7 +67,7 @@ pd6832_legacy_init(device_t dev)
io_port = PCIC_INDEX_0 + num6832 * CLPD6832_NUM_REGS;
if (unit == 0)
pci_write_config(dev, CLPD6832_LEGACY_16BIT_IOADDR,
io_port & ~PCI_MAP_IO, 4);
io_port & ~CLPD6832_LEGACY_16BIT_IOENABLE, 4);
/*
* I think this should be a call to pci_map_port, but that
@ -75,7 +75,7 @@ pd6832_legacy_init(device_t dev)
* need to map is 0x44.
*/
io_port = pci_read_config(dev, CLPD6832_LEGACY_16BIT_IOADDR, 4) &
~PCI_MAP_IO;
~CLPD6832_LEGACY_16BIT_IOENABLE;
/*
* Configure the first I/O window to contain CLPD6832_NUM_REGS
@ -93,8 +93,7 @@ pd6832_legacy_init(device_t dev)
* Set default operating mode (I/O port space) and allocate
* this socket to the current unit.
*/
pci_write_config(dev, PCI_COMMAND_STATUS_REG,
CLPD6832_COMMAND_DEFAULTS, 4);
pci_write_config(dev, PCIR_COMMAND, CLPD6832_COMMAND_DEFAULTS, 4);
pci_write_config(dev, CLPD6832_SOCKET, unit, 4);
/*
@ -200,13 +199,13 @@ generic_cardbus_attach(device_t dev)
if (unit != 0)
return;
iobase = pci_read_config(dev, CB_PCI_LEGACY16_IOADDR, 2)
& ~PCI_MAP_IO;
iobase = pci_read_config(dev, CB_PCI_LEGACY16_IOADDR, 2) &
~CB_PCI_LEGACY16_IOENABLE;
if (!iobase) {
iobase = 0x3e0 | PCI_MAP_IO;
iobase = 0x3e0 | CB_PCI_LEGACY16_IOENABLE;
pci_write_config(dev, CB_PCI_LEGACY16_IOADDR, iobase, 2);
iobase = pci_read_config(dev, CB_PCI_LEGACY16_IOADDR, 2)
& ~PCI_MAP_IO;
& ~CB_PCI_LEGACY16_IOENABLE;
}
PRVERB((dev, "Legacy address set to %#x\n", iobase));
return;
@ -326,13 +325,13 @@ pcic_pci_attach(device_t dev)
/* Place any per "slot" initialization here */
/*
* In sys/pci/pcireg.h, PCI_COMMAND_STATUS_REG must be separated
* In sys/pci/pcireg.h, PCIR_COMMAND must be separated
* PCI_COMMAND_REG(0x04) and PCI_STATUS_REG(0x06).
* Takeshi Shibagaki(shiba@jp.freebsd.org).
*/
command = pci_read_config(dev, PCI_COMMAND_STATUS_REG, 4);
command |= PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MEM_ENABLE;
pci_write_config(dev, PCI_COMMAND_STATUS_REG, command, 4);
command = pci_read_config(dev, PCIR_COMMAND, 4);
command |= PCIM_CMD_PORTEN | PCIM_CMD_MEMEN;
pci_write_config(dev, PCIR_COMMAND, command, 4);
switch (device_id) {
case PCI_DEVICE_ID_PCIC_TI1130:

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@ -61,6 +61,7 @@
#define CLPD6832_IO_LIMIT1 0x0038
#define CLPD6832_BRIDGE_CONTROL 0x003c
#define CLPD6832_LEGACY_16BIT_IOADDR 0x0044
#define CLPD6832_LEGACY_16BIT_IOENABLE 0x0001
#define CLPD6832_SOCKET 0x004c
/* Configuration constants */
@ -149,3 +150,4 @@
#define CB_PCI_SUBSYS_VENDOR_ID 0x40 /* Subsystem Vendor ID */
#define CB_PCI_SUBSYS_ID 0x42 /* Subsystem ID */
#define CB_PCI_LEGACY16_IOADDR 0x44 /* Legacy 16bit I/O address */
#define CB_PCI_LEGACY16_IOENABLE 0x01 /* Enable Legacy 16bit I/O address */

View File

@ -67,7 +67,7 @@ pd6832_legacy_init(device_t dev)
io_port = PCIC_INDEX_0 + num6832 * CLPD6832_NUM_REGS;
if (unit == 0)
pci_write_config(dev, CLPD6832_LEGACY_16BIT_IOADDR,
io_port & ~PCI_MAP_IO, 4);
io_port & ~CLPD6832_LEGACY_16BIT_IOENABLE, 4);
/*
* I think this should be a call to pci_map_port, but that
@ -75,7 +75,7 @@ pd6832_legacy_init(device_t dev)
* need to map is 0x44.
*/
io_port = pci_read_config(dev, CLPD6832_LEGACY_16BIT_IOADDR, 4) &
~PCI_MAP_IO;
~CLPD6832_LEGACY_16BIT_IOENABLE;
/*
* Configure the first I/O window to contain CLPD6832_NUM_REGS
@ -93,8 +93,7 @@ pd6832_legacy_init(device_t dev)
* Set default operating mode (I/O port space) and allocate
* this socket to the current unit.
*/
pci_write_config(dev, PCI_COMMAND_STATUS_REG,
CLPD6832_COMMAND_DEFAULTS, 4);
pci_write_config(dev, PCIR_COMMAND, CLPD6832_COMMAND_DEFAULTS, 4);
pci_write_config(dev, CLPD6832_SOCKET, unit, 4);
/*
@ -200,13 +199,13 @@ generic_cardbus_attach(device_t dev)
if (unit != 0)
return;
iobase = pci_read_config(dev, CB_PCI_LEGACY16_IOADDR, 2)
& ~PCI_MAP_IO;
iobase = pci_read_config(dev, CB_PCI_LEGACY16_IOADDR, 2) &
~CB_PCI_LEGACY16_IOENABLE;
if (!iobase) {
iobase = 0x3e0 | PCI_MAP_IO;
iobase = 0x3e0 | CB_PCI_LEGACY16_IOENABLE;
pci_write_config(dev, CB_PCI_LEGACY16_IOADDR, iobase, 2);
iobase = pci_read_config(dev, CB_PCI_LEGACY16_IOADDR, 2)
& ~PCI_MAP_IO;
& ~CB_PCI_LEGACY16_IOENABLE;
}
PRVERB((dev, "Legacy address set to %#x\n", iobase));
return;
@ -326,13 +325,13 @@ pcic_pci_attach(device_t dev)
/* Place any per "slot" initialization here */
/*
* In sys/pci/pcireg.h, PCI_COMMAND_STATUS_REG must be separated
* In sys/pci/pcireg.h, PCIR_COMMAND must be separated
* PCI_COMMAND_REG(0x04) and PCI_STATUS_REG(0x06).
* Takeshi Shibagaki(shiba@jp.freebsd.org).
*/
command = pci_read_config(dev, PCI_COMMAND_STATUS_REG, 4);
command |= PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MEM_ENABLE;
pci_write_config(dev, PCI_COMMAND_STATUS_REG, command, 4);
command = pci_read_config(dev, PCIR_COMMAND, 4);
command |= PCIM_CMD_PORTEN | PCIM_CMD_MEMEN;
pci_write_config(dev, PCIR_COMMAND, command, 4);
switch (device_id) {
case PCI_DEVICE_ID_PCIC_TI1130:

View File

@ -61,6 +61,7 @@
#define CLPD6832_IO_LIMIT1 0x0038
#define CLPD6832_BRIDGE_CONTROL 0x003c
#define CLPD6832_LEGACY_16BIT_IOADDR 0x0044
#define CLPD6832_LEGACY_16BIT_IOENABLE 0x0001
#define CLPD6832_SOCKET 0x004c
/* Configuration constants */
@ -149,3 +150,4 @@
#define CB_PCI_SUBSYS_VENDOR_ID 0x40 /* Subsystem Vendor ID */
#define CB_PCI_SUBSYS_ID 0x42 /* Subsystem ID */
#define CB_PCI_LEGACY16_IOADDR 0x44 /* Legacy 16bit I/O address */
#define CB_PCI_LEGACY16_IOENABLE 0x01 /* Enable Legacy 16bit I/O address */