Make this compile without depending on the FreeBSD 2.2 compatability
defines.
This commit is contained in:
parent
55b161a4d3
commit
0a8e3ce8a5
@ -67,7 +67,7 @@ pd6832_legacy_init(device_t dev)
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io_port = PCIC_INDEX_0 + num6832 * CLPD6832_NUM_REGS;
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if (unit == 0)
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pci_write_config(dev, CLPD6832_LEGACY_16BIT_IOADDR,
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io_port & ~PCI_MAP_IO, 4);
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io_port & ~CLPD6832_LEGACY_16BIT_IOENABLE, 4);
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/*
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* I think this should be a call to pci_map_port, but that
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@ -75,7 +75,7 @@ pd6832_legacy_init(device_t dev)
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* need to map is 0x44.
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*/
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io_port = pci_read_config(dev, CLPD6832_LEGACY_16BIT_IOADDR, 4) &
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~PCI_MAP_IO;
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~CLPD6832_LEGACY_16BIT_IOENABLE;
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/*
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* Configure the first I/O window to contain CLPD6832_NUM_REGS
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@ -93,8 +93,7 @@ pd6832_legacy_init(device_t dev)
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* Set default operating mode (I/O port space) and allocate
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* this socket to the current unit.
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*/
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pci_write_config(dev, PCI_COMMAND_STATUS_REG,
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CLPD6832_COMMAND_DEFAULTS, 4);
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pci_write_config(dev, PCIR_COMMAND, CLPD6832_COMMAND_DEFAULTS, 4);
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pci_write_config(dev, CLPD6832_SOCKET, unit, 4);
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/*
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@ -200,13 +199,13 @@ generic_cardbus_attach(device_t dev)
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if (unit != 0)
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return;
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iobase = pci_read_config(dev, CB_PCI_LEGACY16_IOADDR, 2)
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& ~PCI_MAP_IO;
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iobase = pci_read_config(dev, CB_PCI_LEGACY16_IOADDR, 2) &
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~CB_PCI_LEGACY16_IOENABLE;
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if (!iobase) {
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iobase = 0x3e0 | PCI_MAP_IO;
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iobase = 0x3e0 | CB_PCI_LEGACY16_IOENABLE;
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pci_write_config(dev, CB_PCI_LEGACY16_IOADDR, iobase, 2);
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iobase = pci_read_config(dev, CB_PCI_LEGACY16_IOADDR, 2)
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& ~PCI_MAP_IO;
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& ~CB_PCI_LEGACY16_IOENABLE;
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}
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PRVERB((dev, "Legacy address set to %#x\n", iobase));
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return;
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@ -326,13 +325,13 @@ pcic_pci_attach(device_t dev)
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/* Place any per "slot" initialization here */
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/*
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* In sys/pci/pcireg.h, PCI_COMMAND_STATUS_REG must be separated
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* In sys/pci/pcireg.h, PCIR_COMMAND must be separated
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* PCI_COMMAND_REG(0x04) and PCI_STATUS_REG(0x06).
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* Takeshi Shibagaki(shiba@jp.freebsd.org).
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*/
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command = pci_read_config(dev, PCI_COMMAND_STATUS_REG, 4);
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command |= PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MEM_ENABLE;
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pci_write_config(dev, PCI_COMMAND_STATUS_REG, command, 4);
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command = pci_read_config(dev, PCIR_COMMAND, 4);
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command |= PCIM_CMD_PORTEN | PCIM_CMD_MEMEN;
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pci_write_config(dev, PCIR_COMMAND, command, 4);
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switch (device_id) {
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case PCI_DEVICE_ID_PCIC_TI1130:
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@ -61,6 +61,7 @@
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#define CLPD6832_IO_LIMIT1 0x0038
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#define CLPD6832_BRIDGE_CONTROL 0x003c
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#define CLPD6832_LEGACY_16BIT_IOADDR 0x0044
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#define CLPD6832_LEGACY_16BIT_IOENABLE 0x0001
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#define CLPD6832_SOCKET 0x004c
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/* Configuration constants */
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@ -149,3 +150,4 @@
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#define CB_PCI_SUBSYS_VENDOR_ID 0x40 /* Subsystem Vendor ID */
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#define CB_PCI_SUBSYS_ID 0x42 /* Subsystem ID */
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#define CB_PCI_LEGACY16_IOADDR 0x44 /* Legacy 16bit I/O address */
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#define CB_PCI_LEGACY16_IOENABLE 0x01 /* Enable Legacy 16bit I/O address */
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@ -67,7 +67,7 @@ pd6832_legacy_init(device_t dev)
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io_port = PCIC_INDEX_0 + num6832 * CLPD6832_NUM_REGS;
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if (unit == 0)
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pci_write_config(dev, CLPD6832_LEGACY_16BIT_IOADDR,
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io_port & ~PCI_MAP_IO, 4);
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io_port & ~CLPD6832_LEGACY_16BIT_IOENABLE, 4);
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/*
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* I think this should be a call to pci_map_port, but that
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@ -75,7 +75,7 @@ pd6832_legacy_init(device_t dev)
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* need to map is 0x44.
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*/
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io_port = pci_read_config(dev, CLPD6832_LEGACY_16BIT_IOADDR, 4) &
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~PCI_MAP_IO;
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~CLPD6832_LEGACY_16BIT_IOENABLE;
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/*
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* Configure the first I/O window to contain CLPD6832_NUM_REGS
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@ -93,8 +93,7 @@ pd6832_legacy_init(device_t dev)
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* Set default operating mode (I/O port space) and allocate
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* this socket to the current unit.
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*/
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pci_write_config(dev, PCI_COMMAND_STATUS_REG,
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CLPD6832_COMMAND_DEFAULTS, 4);
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pci_write_config(dev, PCIR_COMMAND, CLPD6832_COMMAND_DEFAULTS, 4);
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pci_write_config(dev, CLPD6832_SOCKET, unit, 4);
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/*
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@ -200,13 +199,13 @@ generic_cardbus_attach(device_t dev)
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if (unit != 0)
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return;
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iobase = pci_read_config(dev, CB_PCI_LEGACY16_IOADDR, 2)
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& ~PCI_MAP_IO;
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iobase = pci_read_config(dev, CB_PCI_LEGACY16_IOADDR, 2) &
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~CB_PCI_LEGACY16_IOENABLE;
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if (!iobase) {
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iobase = 0x3e0 | PCI_MAP_IO;
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iobase = 0x3e0 | CB_PCI_LEGACY16_IOENABLE;
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pci_write_config(dev, CB_PCI_LEGACY16_IOADDR, iobase, 2);
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iobase = pci_read_config(dev, CB_PCI_LEGACY16_IOADDR, 2)
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& ~PCI_MAP_IO;
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& ~CB_PCI_LEGACY16_IOENABLE;
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}
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PRVERB((dev, "Legacy address set to %#x\n", iobase));
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return;
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@ -326,13 +325,13 @@ pcic_pci_attach(device_t dev)
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/* Place any per "slot" initialization here */
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/*
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* In sys/pci/pcireg.h, PCI_COMMAND_STATUS_REG must be separated
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* In sys/pci/pcireg.h, PCIR_COMMAND must be separated
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* PCI_COMMAND_REG(0x04) and PCI_STATUS_REG(0x06).
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* Takeshi Shibagaki(shiba@jp.freebsd.org).
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*/
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command = pci_read_config(dev, PCI_COMMAND_STATUS_REG, 4);
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command |= PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MEM_ENABLE;
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pci_write_config(dev, PCI_COMMAND_STATUS_REG, command, 4);
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command = pci_read_config(dev, PCIR_COMMAND, 4);
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command |= PCIM_CMD_PORTEN | PCIM_CMD_MEMEN;
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pci_write_config(dev, PCIR_COMMAND, command, 4);
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switch (device_id) {
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case PCI_DEVICE_ID_PCIC_TI1130:
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@ -61,6 +61,7 @@
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#define CLPD6832_IO_LIMIT1 0x0038
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#define CLPD6832_BRIDGE_CONTROL 0x003c
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#define CLPD6832_LEGACY_16BIT_IOADDR 0x0044
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#define CLPD6832_LEGACY_16BIT_IOENABLE 0x0001
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#define CLPD6832_SOCKET 0x004c
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/* Configuration constants */
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@ -149,3 +150,4 @@
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#define CB_PCI_SUBSYS_VENDOR_ID 0x40 /* Subsystem Vendor ID */
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#define CB_PCI_SUBSYS_ID 0x42 /* Subsystem ID */
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#define CB_PCI_LEGACY16_IOADDR 0x44 /* Legacy 16bit I/O address */
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#define CB_PCI_LEGACY16_IOENABLE 0x01 /* Enable Legacy 16bit I/O address */
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