Minimal fix for DV part.
- Don't panic on contigmalloc failure. - Calculate timestamp by feedforward rather than feedback which depends on unreliable interrupt timing. - Overwrite timestamp in CIP header correctly. - Add debug code for timestamp synchronization. - Add comments.
This commit is contained in:
Hidetoshi Shimokawa
parent
d0035474c3
commit
0aaa9a23cd
@ -129,7 +129,7 @@ fw_tbuf_update(struct firewire_comm *fc, int sub, int flag){
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struct fw_xferq *it;
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int s, err = 0, i, j, chtag;
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struct fw_pkt *fp;
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u_int64_t tmpsync, dvsync;
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u_int64_t cycle, dvsync;
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it = fc->it[sub];
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@ -193,17 +193,27 @@ fw_tbuf_update(struct firewire_comm *fc, int sub, int flag){
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}else{
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return err;
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}
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/*
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* Insert least significant 12 bits timestamp value by computation.
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* Highest significant 4 bits is insert at just before packet sending.
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*/
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fp = (struct fw_pkt *)(it->stproc->buf);
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/* XXX: Parameter relies on NTSC type DV video */
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tmpsync = (u_int64_t)3072 * 8000 * 100 / 2997;
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tmpsync *= it->dvsync;
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dvsync = tmpsync;
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dvsync %= 0xc00;
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fp->mode.ld[2] = htonl(0x80000000 | (dvsync % 0xc00));
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#if 1
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#define DVSEC 100
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#define DVFRAC 2997 /* NTSC: 29.97 Hz (2997 = 29.97 * 100) */
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#define DVDIFF 203 /* 203 = (8000/250 - 29.97) * 100 */
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#else
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#define DVSEC 3
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#define DVFRAC 75 /* PAL: 25 Hz (1875 = 25 * 3) */
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#define DVDIFF 5 /* 125 = (8000/300 - 25) * 3 */
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#endif
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#define CYCLEFRAC 0xc00
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cycle = (u_int64_t) 8000 * DVSEC * it->dvsync;
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/* least significant 12 bits */
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dvsync = (cycle * CYCLEFRAC / DVFRAC) % CYCLEFRAC;
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/* most significat 4 bits */
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cycle = (cycle / DVFRAC + it->dvoffset) & 0xf;
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fp = (struct fw_pkt *)(it->dvdma->buf);
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#if 1
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fp->mode.ld[2] = htonl(0x80000000 | (cycle << 12) | dvsync);
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#else
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fp->mode.ld[2] = htonl(0x80000000 | dvsync);
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#endif
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it->dvsync ++;
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it->dvsync %= 2997;
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@ -219,14 +229,6 @@ fw_tbuf_update(struct firewire_comm *fc, int sub, int flag){
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it->dvdbc %= 256;
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it->queued ++;
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j++;
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/* XXX: Parameter relies on NTSC type DV video */
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#if 1
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#define DVDIFF 203
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#define DVFRAC 2997
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#else
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#define DVDIFF 127
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#define DVFRAC 1875
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#endif
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it->dvdiff += DVDIFF;
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if(it->dvdiff >= DVFRAC){
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it->dvdiff %= DVFRAC;
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@ -176,7 +176,7 @@ struct firewire_comm{
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struct fw_bulkxfer *stdma2;
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struct fw_bulkxfer *stproc;
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u_int procptr;
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int dvdbc, dvdiff, dvsync;
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int dvdbc, dvdiff, dvsync, dvoffset;
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struct fw_dvbuf *dvbuf;
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STAILQ_HEAD(, fw_dvbuf) dvvalid;
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STAILQ_HEAD(, fw_dvbuf) dvfree;
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@ -383,8 +383,10 @@ fw_write (dev_t dev, struct uio *uio, int ioflag)
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return err;
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}
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}
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#if 0 /* What's this for? (overwritten by the following uiomove)*/
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fp = (struct fw_pkt *)(it->stproc->buf + it->queued * it->psize);
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fp->mode.stream.len = htons(uio->uio_resid - sizeof(u_int32_t));
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#endif
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err = uiomove(it->stproc->buf + it->queued * it->psize,
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uio->uio_resid, uio);
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it->queued ++;
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@ -422,8 +424,10 @@ fw_write (dev_t dev, struct uio *uio, int ioflag)
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return err;
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}
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}
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#if 0 /* What's this for? (it->dvptr? overwritten by the following uiomove)*/
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fp = (struct fw_pkt *)(it->dvproc->buf + it->queued * it->psize);
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fp->mode.stream.len = htons(uio->uio_resid - sizeof(u_int32_t));
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#endif
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err = uiomove(it->dvproc->buf + it->dvptr,
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uio->uio_resid, uio);
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it->dvptr += it->psize;
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@ -564,7 +568,7 @@ fw_ioctl (dev_t dev, u_long cmd, caddr_t data, int flag, fw_proc *td)
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err = ENOMEM;
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break;
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}
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#define FWDVPACKET 250
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#define FWDVPACKET 250 /* NTSC (300 for PAL) */
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#define FWDVPMAX 512
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ibufreq->rx.nchunk = 8;
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ibufreq->rx.npacket = 50;
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@ -582,11 +586,13 @@ fw_ioctl (dev_t dev, u_long cmd, caddr_t data, int flag, fw_proc *td)
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sc->fc->it[sub]->dvproc = NULL;
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sc->fc->it[sub]->dvdma = NULL;
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sc->fc->it[sub]->flag |= FWXFERQ_DV;
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/* XXX check malloc failure */
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sc->fc->it[sub]->dvbuf
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= (struct fw_dvbuf *)malloc(sizeof(struct fw_dvbuf) * NDVCHUNK, M_DEVBUF, M_DONTWAIT);
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STAILQ_INIT(&sc->fc->it[sub]->dvvalid);
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STAILQ_INIT(&sc->fc->it[sub]->dvfree);
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for( i = 0 ; i < NDVCHUNK ; i++){
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/* XXX check malloc failure */
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sc->fc->it[sub]->dvbuf[i].buf
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= malloc(FWDVPMAX * sc->fc->it[sub]->dvpacket, M_DEVBUF, M_DONTWAIT);
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STAILQ_INSERT_TAIL(&sc->fc->it[sub]->dvfree,
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@ -663,6 +669,7 @@ fw_ioctl (dev_t dev, u_long cmd, caddr_t data, int flag, fw_proc *td)
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it->dvdbc = 0;
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it->dvdiff = 0;
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it->dvsync = 0;
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it->dvoffset = 0;
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STAILQ_INIT(&ir->stvalid);
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STAILQ_INIT(&ir->stfree);
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@ -74,6 +74,8 @@
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#include <dev/firewire/fwohcivar.h>
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#include <dev/firewire/firewire_phy.h>
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#include <dev/firewire/iec68113.h>
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#undef OHCI_DEBUG
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static char dbcode[16][0x10]={"OUTM", "OUTL","INPM","INPL",
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@ -1248,6 +1250,8 @@ fwohci_irxpp_enable(struct firewire_comm *fc, int dmach)
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sc->ir[dmach].xferq.psize = FWPMAX_S400;
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sc->ir[dmach].ndesc = 1;
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fwohci_db_init(&sc->ir[dmach]);
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if ((sc->ir[dmach].flags & FWOHCI_DBCH_INIT) == 0)
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return ENOMEM;
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err = fwohci_rx_enable(sc, &sc->ir[dmach]);
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}
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if(err){
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@ -1414,11 +1418,13 @@ fwohci_itxbuf_enable(struct firewire_comm *fc, int dmach)
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tag = (sc->it[dmach].xferq.flag >> 6) & 3;
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ich = sc->it[dmach].xferq.flag & 0x3f;
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dbch = &sc->it[dmach];
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if(dbch->ndb == 0){
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if ((dbch->flags & FWOHCI_DBCH_INIT) == 0) {
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dbch->xferq.queued = 0;
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dbch->ndb = dbch->xferq.bnpacket * dbch->xferq.bnchunk;
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dbch->ndesc = 3;
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fwohci_db_init(dbch);
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if ((dbch->flags & FWOHCI_DBCH_INIT) == 0)
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return ENOMEM;
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err = fwohci_tx_enable(sc, dbch);
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}
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if(err)
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@ -1469,8 +1475,12 @@ fwohci_itxbuf_enable(struct firewire_comm *fc, int dmach)
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if(dbch->xferq.flag & FWXFERQ_DV){
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db_tr = (struct fwohcidb_tr *)dbch->xferq.stdma->start;
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fp = (struct fw_pkt *)db_tr->buf;
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fp->mode.ld[2] = htonl(0x80000000 +
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((fc->cyctimer(fc) + 0x3000) & 0xf000));
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dbch->xferq.dvoffset =
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((fc->cyctimer(fc) >> 12) + 4) & 0xf;
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#if 0
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printf("dvoffset: %d\n", dbch->xferq.dvoffset);
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#endif
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fp->mode.ld[2] |= htonl(dbch->xferq.dvoffset << 12);
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}
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OWRITE(sc, OHCI_ITCTL(dmach), OHCI_CNTL_DMA_RUN);
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@ -1503,6 +1513,8 @@ fwohci_irxbuf_enable(struct firewire_comm *fc, int dmach)
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}
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sc->ir[dmach].ndesc = 2;
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fwohci_db_init(&sc->ir[dmach]);
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if ((sc->ir[dmach].flags & FWOHCI_DBCH_INIT) == 0)
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return ENOMEM;
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err = fwohci_rx_enable(sc, &sc->ir[dmach]);
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}
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if(err)
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@ -1890,40 +1902,71 @@ fwohci_tbuf_update(struct fwohci_softc *sc, int dmach)
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struct fwohcidb_tr *db_tr;
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dbch = &sc->it[dmach];
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#if 0 /* XXX OHCI interrupt before the last packet is really on the wire */
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if((dbch->xferq.flag & FWXFERQ_DV) && (dbch->xferq.stdma2 != NULL)){
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db_tr = (struct fwohcidb_tr *)dbch->xferq.stdma2->start;
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/*
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* Overwrite highest significant 4 bits timestamp information
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*/
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fp = (struct fw_pkt *)db_tr->buf;
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fp->mode.ld[2] |= htonl(0x80000000 |
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((fc->cyctimer(fc) + 0x4000) & 0xf000));
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fp->mode.ld[2] &= htonl(0xffff0fff);
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fp->mode.ld[2] |= htonl((fc->cyctimer(fc) + 0x4000) & 0xf000);
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}
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#endif
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stat = OREAD(sc, OHCI_ITCTL(dmach)) & 0x1f;
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switch(stat){
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case FWOHCIEV_ACKCOMPL:
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#if 1
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if (dbch->xferq.flag & FWXFERQ_DV) {
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struct ciphdr *ciph;
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int timer, timestamp, cycl, diff;
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static int last_timer=0;
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timer = (fc->cyctimer(fc) >> 12) & 0xffff;
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db_tr = (struct fwohcidb_tr *)dbch->xferq.stdma->start;
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fp = (struct fw_pkt *)db_tr->buf;
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ciph = (struct ciphdr *) &fp->mode.ld[1];
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timestamp = db_tr->db[2].db.desc.count & 0xffff;
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cycl = ntohs(ciph->fdf.dv.cyc) >> 12;
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diff = cycl - (timestamp & 0xf) - 1;
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if (diff < 0)
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diff += 16;
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if (diff > 8)
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diff -= 16;
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if (firewire_debug)
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printf("dbc: %3d timer: 0x%04x packet: 0x%04x"
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" cyc: 0x%x diff: %+1d\n",
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ciph->dbc, last_timer, timestamp, cycl, diff);
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last_timer = timer;
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/* XXX adjust dbch->xferq.dvoffset if diff != 0 or 1 */
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}
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#endif
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fw_tbuf_update(fc, dmach, 1);
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break;
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default:
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device_printf(fc->dev, "Isochronous transmit err %02x\n", stat);
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fw_tbuf_update(fc, dmach, 0);
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break;
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}
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fwohci_itxbuf_enable(&sc->fc, dmach);
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fwohci_itxbuf_enable(fc, dmach);
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}
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static void
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fwohci_rbuf_update(struct fwohci_softc *sc, int dmach)
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{
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struct firewire_comm *fc = &sc->fc;
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int stat;
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stat = OREAD(sc, OHCI_IRCTL(dmach)) & 0x1f;
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switch(stat){
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case FWOHCIEV_ACKCOMPL:
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fw_rbuf_update(&sc->fc, dmach, 1);
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wakeup(sc->fc.ir[dmach]);
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fwohci_irx_enable(&sc->fc, dmach);
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fw_rbuf_update(fc, dmach, 1);
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wakeup(fc->ir[dmach]);
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fwohci_irx_enable(fc, dmach);
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break;
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default:
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device_printf(sc->fc.dev, "Isochronous receive err %02x\n", stat);
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device_printf(fc->dev, "Isochronous receive err %02x\n",
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stat);
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break;
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}
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}
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