diff --git a/sys/dev/bwn/if_bwn.c b/sys/dev/bwn/if_bwn.c
index f15a8953208e..91c63093afa6 100644
--- a/sys/dev/bwn/if_bwn.c
+++ b/sys/dev/bwn/if_bwn.c
@@ -1421,7 +1421,7 @@ bwn_phy_getinfo(struct bwn_mac *mac, int gmode)
 	    (phy->type == BWN_PHYTYPE_B && phy->rev != 2 &&
 		phy->rev != 4 && phy->rev != 6 && phy->rev != 7) ||
 	    (phy->type == BWN_PHYTYPE_G && phy->rev > 9) ||
-	    (phy->type == BWN_PHYTYPE_N && phy->rev > 4) ||
+	    (phy->type == BWN_PHYTYPE_N && phy->rev > 6) ||
 	    (phy->type == BWN_PHYTYPE_LP && phy->rev > 2))
 		goto unsupphy;
 
@@ -3110,6 +3110,7 @@ bwn_dma_setup(struct bwn_dma_ring *dr)
 			addrext = ((ring64 >> 32) & SIBA_DMA_TRANSLATION_MASK)
 			    >> 30;
 			value = BWN_DMA64_TXENABLE;
+			value |= BWN_DMA64_TXPARITY_DISABLE;
 			value |= (addrext << BWN_DMA64_TXADDREXT_SHIFT)
 			    & BWN_DMA64_TXADDREXT_MASK;
 			BWN_DMA_WRITE(dr, BWN_DMA64_TXCTL, value);
@@ -3122,6 +3123,7 @@ bwn_dma_setup(struct bwn_dma_ring *dr)
 			ring32 = (uint32_t)(dr->dr_ring_dmabase);
 			addrext = (ring32 & SIBA_DMA_TRANSLATION_MASK) >> 30;
 			value = BWN_DMA32_TXENABLE;
+			value |= BWN_DMA32_TXPARITY_DISABLE;
 			value |= (addrext << BWN_DMA32_TXADDREXT_SHIFT)
 			    & BWN_DMA32_TXADDREXT_MASK;
 			BWN_DMA_WRITE(dr, BWN_DMA32_TXCTL, value);
@@ -3141,6 +3143,7 @@ bwn_dma_setup(struct bwn_dma_ring *dr)
 		addrext = ((ring64 >> 32) & SIBA_DMA_TRANSLATION_MASK) >> 30;
 		value = (dr->dr_frameoffset << BWN_DMA64_RXFROFF_SHIFT);
 		value |= BWN_DMA64_RXENABLE;
+		value |= BWN_DMA64_RXPARITY_DISABLE;
 		value |= (addrext << BWN_DMA64_RXADDREXT_SHIFT)
 		    & BWN_DMA64_RXADDREXT_MASK;
 		BWN_DMA_WRITE(dr, BWN_DMA64_RXCTL, value);
@@ -3155,6 +3158,7 @@ bwn_dma_setup(struct bwn_dma_ring *dr)
 		addrext = (ring32 & SIBA_DMA_TRANSLATION_MASK) >> 30;
 		value = (dr->dr_frameoffset << BWN_DMA32_RXFROFF_SHIFT);
 		value |= BWN_DMA32_RXENABLE;
+		value |= BWN_DMA32_RXPARITY_DISABLE;
 		value |= (addrext << BWN_DMA32_RXADDREXT_SHIFT)
 		    & BWN_DMA32_RXADDREXT_MASK;
 		BWN_DMA_WRITE(dr, BWN_DMA32_RXCTL, value);
diff --git a/sys/dev/bwn/if_bwn_bhnd.c b/sys/dev/bwn/if_bwn_bhnd.c
index d3c352b6a7c6..305fee0243c9 100644
--- a/sys/dev/bwn/if_bwn_bhnd.c
+++ b/sys/dev/bwn/if_bwn_bhnd.c
@@ -68,11 +68,14 @@ __FBSDID("$FreeBSD$");
 #include "if_bwnvar.h"
 
 /* Supported device identifiers */
+#define	BWN_DEV(_hwrev)	{{					\
+	BHND_MATCH_CORE(BHND_MFGID_BCM, BHND_COREID_D11),	\
+	BHND_MATCH_CORE_REV(_hwrev),				\
+}}
+
 static const struct bhnd_device bwn_devices[] = {
-	{{
-		BHND_MATCH_CORE		(BHND_MFGID_BCM, BHND_COREID_D11),
-		BHND_MATCH_CORE_REV	(HWREV_RANGE(5, 16))
-	}},
+	BWN_DEV(HWREV_RANGE(5, 16)),
+	BWN_DEV(HWREV_EQ(23)),
 
 	BHND_DEVICE_END
 };
diff --git a/sys/dev/bwn/if_bwn_pci.c b/sys/dev/bwn/if_bwn_pci.c
index c41647014e44..e01e819149ca 100644
--- a/sys/dev/bwn/if_bwn_pci.c
+++ b/sys/dev/bwn/if_bwn_pci.c
@@ -98,6 +98,7 @@ static const struct bwn_pci_device bcma_devices[] = {
 	BWN_BCM_DEV(BCM4331_D11N2G,	"BCM4331 802.11n 2GHz",		0),
 	BWN_BCM_DEV(BCM4331_D11N5G,	"BCM4331 802.11n 5GHz",		0),
 	BWN_BCM_DEV(BCM43224_D11N,	"BCM43224 802.11n Dual-Band",	0),
+	BWN_BCM_DEV(BCM43224_D11N_ID_VEN1, "BCM43224 802.11n Dual-Band",0),
 	BWN_BCM_DEV(BCM43225_D11N2G,	"BCM43225 802.11n 2GHz",	0),
 
 	{ 0, 0, NULL, 0}
diff --git a/sys/dev/bwn/if_bwnreg.h b/sys/dev/bwn/if_bwnreg.h
index b499439f79e4..2437a68e0513 100644
--- a/sys/dev/bwn/if_bwnreg.h
+++ b/sys/dev/bwn/if_bwnreg.h
@@ -410,6 +410,7 @@
 #define	BWN_DMA32_TXCTL			0x00
 #define	BWN_DMA32_TXENABLE		0x00000001
 #define	BWN_DMA32_TXSUSPEND		0x00000002
+#define	BWN_DMA32_TXPARITY_DISABLE	0x00000800
 #define	BWN_DMA32_TXADDREXT_MASK	0x00030000
 #define	BWN_DMA32_TXADDREXT_SHIFT	16
 #define	BWN_DMA32_TXRING		0x04
@@ -423,6 +424,7 @@
 #define	BWN_DMA32_RXENABLE		0x00000001
 #define	BWN_DMA32_RXFROFF_SHIFT		1
 #define	BWN_DMA32_RXDIRECTFIFO		0x00000100
+#define	BWN_DMA32_RXPARITY_DISABLE	0x00000800
 #define	BWN_DMA32_RXADDREXT_MASK	0x00030000
 #define	BWN_DMA32_RXADDREXT_SHIFT	16
 #define	BWN_DMA32_RXRING		0x14
@@ -434,6 +436,7 @@
 #define	BWN_DMA64_TXCTL			0x00
 #define	BWN_DMA64_TXENABLE		0x00000001
 #define	BWN_DMA64_TXSUSPEND		0x00000002
+#define	BWN_DMA64_TXPARITY_DISABLE	0x00000800
 #define	BWN_DMA64_TXADDREXT_MASK	0x00030000
 #define	BWN_DMA64_TXADDREXT_SHIFT	16
 #define	BWN_DMA64_TXINDEX		0x04
@@ -448,6 +451,7 @@
 #define	BWN_DMA64_RXENABLE		0x00000001
 #define	BWN_DMA64_RXFROFF_SHIFT		1
 #define	BWN_DMA64_RXDIRECTFIFO		0x00000100
+#define	BWN_DMA64_RXPARITY_DISABLE	0x00000800
 #define	BWN_DMA64_RXADDREXT_MASK	0x00030000
 #define	BWN_DMA64_RXADDREXT_SHIFT	16
 #define	BWN_DMA64_RXINDEX		0x24