Use fixed enum values for PMC_CLASSES().
This removes one of the frequent causes of ABI breakage when new CPU types are added to hwpmc(4). Differential Revision: https://reviews.freebsd.org/D2586 Reviewed by: davide, emaste, gnn (earlier version) MFC after: 2 weeks
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@ -423,9 +423,14 @@ static const char * pmc_capability_names[] = {
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__PMC_CAPS()
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};
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static const char * pmc_class_names[] = {
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struct pmc_class_map {
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enum pmc_class pm_class;
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const char *pm_name;
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};
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static const struct pmc_class_map pmc_class_names[] = {
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#undef __PMC_CLASS
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#define __PMC_CLASS(C) #C ,
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#define __PMC_CLASS(S,V,D) { .pm_class = PMC_CLASS_##S, .pm_name = #S } ,
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__PMC_CLASSES()
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};
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@ -3362,9 +3367,11 @@ pmc_name_of_capability(enum pmc_caps cap)
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const char *
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pmc_name_of_class(enum pmc_class pc)
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{
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if ((int) pc >= PMC_CLASS_FIRST &&
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pc <= PMC_CLASS_LAST)
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return (pmc_class_names[pc]);
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size_t n;
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for (n = 0; n < PMC_TABLE_SIZE(pmc_class_names); n++)
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if (pc == pmc_class_names[n].pm_class)
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return (pmc_class_names[n].pm_name);
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errno = EINVAL;
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return (NULL);
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@ -4625,12 +4625,20 @@ pmc_kld_unload(void *arg __unused, const char *filename __unused,
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/*
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* initialization
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*/
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static const char *
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pmc_name_of_pmcclass(enum pmc_class class)
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{
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static const char *pmc_name_of_pmcclass[] = {
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switch (class) {
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#undef __PMC_CLASS
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#define __PMC_CLASS(N) #N ,
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__PMC_CLASSES()
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};
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#define __PMC_CLASS(S,V,D) \
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case PMC_CLASS_##S: \
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return #S;
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__PMC_CLASSES();
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default:
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return ("<unknown>");
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}
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}
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/*
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* Base class initializer: allocate structure and set default classes.
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@ -4909,7 +4917,7 @@ pmc_initialize(void)
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for (n = 0; n < (int) md->pmd_nclass; n++) {
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pcd = &md->pmd_classdep[n];
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printf(" %s/%d/%d/0x%b",
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pmc_name_of_pmcclass[pcd->pcd_class],
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pmc_name_of_pmcclass(pcd->pcd_class),
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pcd->pcd_num,
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pcd->pcd_width,
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pcd->pcd_caps,
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@ -123,30 +123,30 @@ enum pmc_cputype {
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*/
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#define __PMC_CLASSES() \
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__PMC_CLASS(TSC) /* CPU Timestamp counter */ \
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__PMC_CLASS(K7) /* AMD K7 performance counters */ \
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__PMC_CLASS(K8) /* AMD K8 performance counters */ \
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__PMC_CLASS(P5) /* Intel Pentium counters */ \
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__PMC_CLASS(P6) /* Intel Pentium Pro counters */ \
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__PMC_CLASS(P4) /* Intel Pentium-IV counters */ \
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__PMC_CLASS(IAF) /* Intel Core2/Atom, fixed function */ \
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__PMC_CLASS(IAP) /* Intel Core...Atom, programmable */ \
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__PMC_CLASS(UCF) /* Intel Uncore fixed function */ \
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__PMC_CLASS(UCP) /* Intel Uncore programmable */ \
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__PMC_CLASS(XSCALE) /* Intel XScale counters */ \
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__PMC_CLASS(ARMV7) /* ARMv7 */ \
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__PMC_CLASS(ARMV8) /* ARMv8 */ \
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__PMC_CLASS(MIPS24K) /* MIPS 24K */ \
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__PMC_CLASS(OCTEON) /* Cavium Octeon */ \
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__PMC_CLASS(MIPS74K) /* MIPS 74K */ \
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__PMC_CLASS(PPC7450) /* Motorola MPC7450 class */ \
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__PMC_CLASS(PPC970) /* IBM PowerPC 970 class */ \
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__PMC_CLASS(E500) /* Freescale e500 class */ \
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__PMC_CLASS(SOFT) /* Software events */
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__PMC_CLASS(TSC, 0x000, "CPU Timestamp counter") \
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__PMC_CLASS(K7, 0x100, "AMD K7 performance counters") \
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__PMC_CLASS(K8, 0x101, "AMD K8 performance counters") \
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__PMC_CLASS(P5, 0x102, "Intel Pentium counters") \
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__PMC_CLASS(P6, 0x103, "Intel Pentium Pro counters") \
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__PMC_CLASS(P4, 0x104, "Intel Pentium-IV counters") \
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__PMC_CLASS(IAF, 0x105, "Intel Core2/Atom, fixed function") \
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__PMC_CLASS(IAP, 0x106, "Intel Core...Atom, programmable") \
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__PMC_CLASS(UCF, 0x107, "Intel Uncore fixed function") \
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__PMC_CLASS(UCP, 0x108, "Intel Uncore programmable") \
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__PMC_CLASS(XSCALE, 0x200, "Intel XScale counters") \
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__PMC_CLASS(ARMV7, 0x201, "ARMv7") \
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__PMC_CLASS(ARMV8, 0x202, "ARMv8") \
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__PMC_CLASS(MIPS24K, 0x300, "MIPS 24K") \
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__PMC_CLASS(OCTEON, 0x301, "Cavium Octeon") \
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__PMC_CLASS(MIPS74K, 0x302, "MIPS 74K") \
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__PMC_CLASS(PPC7450, 0x400, "Motorola MPC7450 class") \
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__PMC_CLASS(PPC970, 0x401, "IBM PowerPC 970 class") \
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__PMC_CLASS(E500, 0x402, "Freescale e500 class") \
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__PMC_CLASS(SOFT, 0x8000, "Software events")
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enum pmc_class {
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#undef __PMC_CLASS
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#define __PMC_CLASS(N) PMC_CLASS_##N ,
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#define __PMC_CLASS(S,V,D) PMC_CLASS_##S = V,
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__PMC_CLASSES()
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};
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