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Replace handrolled CRC calculation with ether_crc32_[lb]e().

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This commit is contained in:
Christian Weisgerber 2004-06-09 14:34:04 +00:00
parent 6c27c6039b
commit 0e939c0cea
32 changed files with 77 additions and 795 deletions
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25
sys/dev/bge/if_bge.c
View File

@ -211,7 +211,6 @@ static void bge_ifmedia_sts (struct ifnet *, struct ifmediareq *);
static u_int8_t bge_eeprom_getbyte (struct bge_softc *, int, u_int8_t *);
static int bge_read_eeprom (struct bge_softc *, caddr_t, int, int);
static uint32_t bge_mchash (const uint8_t *);
static void bge_setmulti (struct bge_softc *);
static void bge_handle_events (struct bge_softc *);
@ -1133,27 +1132,6 @@ bge_init_tx_ring(sc)
return(0);
}
#define BGE_POLY 0xEDB88320
static uint32_t
bge_mchash(addr)
const uint8_t *addr;
{
uint32_t crc;
int idx, bit;
uint8_t data;
/* Compute CRC for the address value. */
crc = 0xFFFFFFFF; /* initial value */
for (idx = 0; idx < 6; idx++) {
for (data = *addr++, bit = 0; bit < 8; bit++, data >>= 1)
crc = (crc >> 1) ^ (((crc ^ data) & 1) ? BGE_POLY : 0);
}
return(crc & 0x7F);
}
static void
bge_setmulti(sc)
struct bge_softc *sc;
@ -1181,7 +1159,8 @@ bge_setmulti(sc)
TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) {
if (ifma->ifma_addr->sa_family != AF_LINK)
continue;
h = bge_mchash(LLADDR((struct sockaddr_dl *)ifma->ifma_addr));
h = ether_crc32_le(LLADDR((struct sockaddr_dl *)
ifma->ifma_addr), ETHER_ADDR_LEN) & 0x7F;
hashes[(h & 0x60) >> 5] |= 1 << (h & 0x1F);
}

26
sys/dev/dc/if_dc.c
View File

@ -1023,7 +1023,6 @@ dc_miibus_mediainit(device_t dev)
ifmedia_add(ifm, IFM_ETHER | IFM_HPNA_1, 0, NULL);
}
#define DC_POLY 0xEDB88320
#define DC_BITS_512 9
#define DC_BITS_128 7
#define DC_BITS_64 6
@ -1032,16 +1031,9 @@ static uint32_t
dc_mchash_le(struct dc_softc *sc, const uint8_t *addr)
{
uint32_t crc;
int idx, bit;
uint8_t data;
/* Compute CRC for the address value. */
crc = 0xFFFFFFFF; /* initial value */
for (idx = 0; idx < 6; idx++) {
for (data = *addr++, bit = 0; bit < 8; bit++, data >>= 1)
crc = (crc >> 1) ^ (((crc ^ data) & 1) ? DC_POLY : 0);
}
crc = ether_crc32_le(addr, ETHER_ADDR_LEN);
/*
* The hash table on the PNIC II and the MX98715AEC-C/D/E
@ -1073,22 +1065,10 @@ dc_mchash_le(struct dc_softc *sc, const uint8_t *addr)
static uint32_t
dc_mchash_be(const uint8_t *addr)
{
uint32_t crc, carry;
int idx, bit;
uint8_t data;
uint32_t crc;
/* Compute CRC for the address value. */
crc = 0xFFFFFFFF; /* initial value */
for (idx = 0; idx < 6; idx++) {
for (data = *addr++, bit = 0; bit < 8; bit++, data >>= 1) {
carry = ((crc & 0x80000000) ? 1 : 0) ^ (data & 0x01);
data >>= 1;
crc <<= 1;
if (carry)
crc = (crc ^ 0x04c11db6) | carry;
}
}
crc = ether_crc32_be(addr, ETHER_ADDR_LEN);
/* Return the filter bit position. */
return ((crc >> 26) & 0x0000003F);

25
sys/dev/de/if_de.c
View File

@ -1992,31 +1992,10 @@ tulip_mii_writereg(
#endif
}
#define tulip_mchash(mca) (tulip_crc32(mca, 6) & 0x1FF)
#define tulip_mchash(mca) (ether_crc32_le(mca, 6) & 0x1FF)
#define tulip_srom_crcok(databuf) ( \
((tulip_crc32(databuf, 126) & 0xFFFFU) ^ 0xFFFFU) == \
((ether_crc32_le(databuf, 126) & 0xFFFFU) ^ 0xFFFFU) == \
((databuf)[126] | ((databuf)[127] << 8)))
static unsigned
tulip_crc32(
const unsigned char *databuf,
size_t datalen)
{
u_int idx, crc = 0xFFFFFFFFUL;
static const u_int crctab[] = {
0x00000000, 0x1db71064, 0x3b6e20c8, 0x26d930ac,
0x76dc4190, 0x6b6b51f4, 0x4db26158, 0x5005713c,
0xedb88320, 0xf00f9344, 0xd6d6a3e8, 0xcb61b38c,
0x9b64c2b0, 0x86d3d2d4, 0xa00ae278, 0xbdbdf21c
};
for (idx = 0; idx < datalen; idx++) {
crc ^= *databuf++;
crc = (crc >> 4) ^ crctab[crc & 0xf];
crc = (crc >> 4) ^ crctab[crc & 0xf];
}
return crc;
}
static void
tulip_identify_dec_nic(

30
sys/dev/ed/if_ed.c
View File

@ -104,8 +104,6 @@ static u_short ed_pio_write_mbufs(struct ed_softc *, struct mbuf *, long);
static void ed_setrcr (struct ed_softc *);
static uint32_t ds_mchash (const uint8_t *);
/*
* Interrupt conversion table for WD/SMC ASIC/83C584
*/
@ -3519,30 +3517,6 @@ ed_setrcr(sc)
ed_nic_outb(sc, ED_P0_CR, sc->cr_proto | ED_CR_STA);
}
/*
* Compute crc for ethernet address
*/
static uint32_t
ds_mchash(addr)
const uint8_t *addr;
{
#define ED_POLYNOMIAL 0x04c11db6
register uint32_t crc = 0xffffffff;
register int carry, idx, bit;
register uint8_t data;
for (idx = 6; --idx >= 0;) {
for (data = *addr++, bit = 8; --bit >= 0; data >>=1 ) {
carry = ((crc & 0x80000000) ? 1 : 0) ^ (data & 0x01);
crc <<= 1;
if (carry)
crc = (crc ^ ED_POLYNOMIAL) | carry;
}
}
return crc;
#undef POLYNOMIAL
}
/*
* Compute the multicast address filter from the
* list of multicast addresses we need to listen to.
@ -3562,8 +3536,8 @@ ds_getmcaf(sc, mcaf)
TAILQ_FOREACH(ifma, &sc->arpcom.ac_if.if_multiaddrs, ifma_link) {
if (ifma->ifma_addr->sa_family != AF_LINK)
continue;
index = ds_mchash(LLADDR((struct sockaddr_dl *)ifma->ifma_addr))
>> 26;
index = ether_crc32_be(LLADDR((struct sockaddr_dl *)
ifma->ifma_addr), ETHER_ADDR_LEN) >> 26;
af[index >> 3] |= 1 << (index & 7);
}
}

26
sys/dev/fe/if_fe.c
View File

@ -2032,29 +2032,6 @@ fe_write_mbufs (struct fe_softc *sc, struct mbuf *m)
}
}
/*
* Compute hash value for an Ethernet address
*/
static uint32_t
fe_mchash (const uint8_t *addr)
{
#define FE_POLY 0xEDB88320L
uint32_t carry, crc = 0xFFFFFFFFL;
int idx, bit;
uint8_t data;
for ( idx = ETHER_ADDR_LEN; --idx >= 0; ) {
for (data = *addr++, bit = 8; --bit >= 0; data >>= 1) {
carry = crc;
crc >>= 1;
if ((carry ^ data) & 1)
crc ^= FE_POLY;
}
}
return (crc >> 26);
}
/*
* Compute the multicast address filter from the
* list of multicast addresses we need to listen to.
@ -2070,7 +2047,8 @@ fe_mcaf ( struct fe_softc *sc )
TAILQ_FOREACH(ifma, &sc->arpcom.ac_if.if_multiaddrs, ifma_link) {
if (ifma->ifma_addr->sa_family != AF_LINK)
continue;
index = fe_mchash(LLADDR((struct sockaddr_dl *)ifma->ifma_addr));
index = ether_crc32_le(LLADDR((struct sockaddr_dl *)
ifma->ifma_addr), ETHER_ADDR_LEN) >> 26;
#ifdef FE_DEBUG
printf("%s: hash(%6D) == %d\n",
sc->sc_xname, enm->enm_addrlo , ":", index);

18
sys/dev/gem/if_gem.c
View File

@ -1847,7 +1847,6 @@ gem_setladrf(sc)
struct sockaddr_dl *sdl;
bus_space_tag_t t = sc->sc_bustag;
bus_space_handle_t h = sc->sc_h;
u_char *cp;
u_int32_t crc;
u_int32_t hash[16];
u_int32_t v;
@ -1892,23 +1891,8 @@ gem_setladrf(sc)
if (inm->ifma_addr->sa_family != AF_LINK)
continue;
sdl = (struct sockaddr_dl *)inm->ifma_addr;
cp = LLADDR(sdl);
crc = 0xffffffff;
for (len = sdl->sdl_alen; --len >= 0;) {
int octet = *cp++;
int i;
crc = ether_crc32_le(LLADDR(sdl), ETHER_ADDR_LEN);
#define MC_POLY_LE 0xedb88320UL /* mcast crc, little endian */
for (i = 0; i < 8; i++) {
if ((crc & 1) ^ (octet & 1)) {
crc >>= 1;
crc ^= MC_POLY_LE;
} else {
crc >>= 1;
}
octet >>= 1;
}
}
/* Just want the 8 most significant bits. */
crc >>= 24;

18
sys/dev/hme/if_hme.c
View File

@ -1405,7 +1405,6 @@ hme_setladrf(struct hme_softc *sc, int reenable)
struct ifnet *ifp = &sc->sc_arpcom.ac_if;
struct ifmultiaddr *inm;
struct sockaddr_dl *sdl;
u_char *cp;
u_int32_t crc;
u_int32_t hash[4];
u_int32_t macc;
@ -1459,23 +1458,8 @@ hme_setladrf(struct hme_softc *sc, int reenable)
if (inm->ifma_addr->sa_family != AF_LINK)
continue;
sdl = (struct sockaddr_dl *)inm->ifma_addr;
cp = LLADDR(sdl);
crc = 0xffffffff;
for (len = sdl->sdl_alen; --len >= 0;) {
int octet = *cp++;
int i;
crc = ether_crc32_le(sdl, ETHER_ADDR_LEN);
#define MC_POLY_LE 0xedb88320UL /* mcast crc, little endian */
for (i = 0; i < 8; i++) {
if ((crc & 1) ^ (octet & 1)) {
crc >>= 1;
crc ^= MC_POLY_LE;
} else {
crc >>= 1;
}
octet >>= 1;
}
}
/* Just want the 6 most significant bits. */
crc >>= 26;

30
sys/dev/lge/if_lge.c
View File

@ -150,7 +150,6 @@ static int lge_miibus_writereg(device_t, int, int, int);
static void lge_miibus_statchg(device_t);
static void lge_setmulti(struct lge_softc *);
static uint32_t lge_mchash(const uint8_t *);
static void lge_reset(struct lge_softc *);
static int lge_list_rx_init(struct lge_softc *);
static int lge_list_tx_init(struct lge_softc *);
@ -368,32 +367,6 @@ lge_miibus_statchg(dev)
return;
}
static uint32_t
lge_mchash(addr)
const uint8_t *addr;
{
uint32_t crc, carry;
int idx, bit;
uint8_t data;
/* Compute CRC for the address value. */
crc = 0xFFFFFFFF; /* initial value */
for (idx = 0; idx < 6; idx++) {
for (data = *addr++, bit = 0; bit < 8; bit++, data >>= 1) {
carry = ((crc & 0x80000000) ? 1 : 0) ^ (data & 0x01);
crc <<= 1;
if (carry)
crc = (crc ^ 0x04c11db6) | carry;
}
}
/*
* return the filter bit position
*/
return((crc >> 26) & 0x0000003F);
}
static void
lge_setmulti(sc)
struct lge_softc *sc;
@ -421,7 +394,8 @@ lge_setmulti(sc)
TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) {
if (ifma->ifma_addr->sa_family != AF_LINK)
continue;
h = lge_mchash(LLADDR((struct sockaddr_dl *)ifma->ifma_addr));
h = ether_crc32_be(LLADDR((struct sockaddr_dl *)
ifma->ifma_addr), ETHER_ADDR_LEN) >> 26;
if (h < 32)
hashes[0] |= (1 << h);
else

22
sys/dev/lnc/if_lnc.c
View File

@ -189,24 +189,6 @@ lance_probe(struct lnc_softc *sc)
return (UNKNOWN);
}
static __inline uint32_t
lnc_mchash(const uint8_t *ether_addr)
{
#define LNC_POLYNOMIAL 0xEDB88320UL
uint32_t crc = 0xFFFFFFFF;
int idx, bit;
uint8_t data;
for (idx = 0; idx < ETHER_ADDR_LEN; idx++) {
for (data = *ether_addr++, bit = 0; bit < MULTICAST_FILTER_LEN; bit++) {
crc = (crc >> 1) ^ (((crc ^ data) & 1) ? LNC_POLYNOMIAL : 0);
data >>= 1;
}
}
return crc;
#undef LNC_POLYNOMIAL
}
void
lnc_release_resources(device_t dev)
{
@ -261,8 +243,8 @@ lnc_setladrf(struct lnc_softc *sc)
if (ifma->ifma_addr->sa_family != AF_LINK)
continue;
index = lnc_mchash(
LLADDR((struct sockaddr_dl *)ifma->ifma_addr)) >> 26;
index = ether_crc32_le(LLADDR((struct sockaddr_dl *)
ifma->ifma_addr), ETHER_ADDR_LEN) >> 26;
sc->init_block->ladrf[index >> 3] |= 1 << (index & 7);
}
}

32
sys/dev/my/if_my.c
View File

@ -142,7 +142,6 @@ static void my_autoneg_mii(struct my_softc *, int, int);
static void my_setmode_mii(struct my_softc *, int);
static void my_getmode_mii(struct my_softc *);
static void my_setcfg(struct my_softc *, int);
static uint32_t my_mchash(const uint8_t *);
static void my_setmulti(struct my_softc *);
static void my_reset(struct my_softc *);
static int my_list_rx_init(struct my_softc *);
@ -313,34 +312,6 @@ my_phy_writereg(struct my_softc * sc, int reg, int data)
return;
}
static uint32_t
my_mchash(const uint8_t *addr)
{
uint32_t crc, carry;
int idx, bit;
uint8_t data;
/* Compute CRC for the address value. */
crc = 0xFFFFFFFF; /* initial value */
for (idx = 0; idx < 6; idx++) {
for (data = *addr++, bit = 0; bit < 8; bit++, data >>= 1) {
carry = ((crc & 0x80000000) ? 1 : 0) ^ (data & 0x01);
crc <<= 1;
if (carry)
crc = (crc ^ 0x04c11db6) | carry;
}
}
/*
* return the filter bit position Note: I arrived at the following
* nonsense through experimentation. It's not the usual way to
* generate the bit position but it's the only thing I could come up
* with that works.
*/
return (~(crc >> 26) & 0x0000003F);
}
/*
* Program the 64-bit multicast hash filter.
@ -379,7 +350,8 @@ my_setmulti(struct my_softc * sc)
TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) {
if (ifma->ifma_addr->sa_family != AF_LINK)
continue;
h = my_mchash(LLADDR((struct sockaddr_dl *) ifma->ifma_addr));
h = ~ether_crc32_be(LLADDR((struct sockaddr_dl *)
ifma->ifma_addr), ETHER_ADDR_LEN) >> 26;
if (h < 32)
hashes[0] |= (1 << h);
else

31
sys/dev/nge/if_nge.c
View File

@ -185,7 +185,6 @@ static int nge_miibus_writereg(device_t, int, int, int);
static void nge_miibus_statchg(device_t);
static void nge_setmulti(struct nge_softc *);
static uint32_t nge_mchash(const uint8_t *);
static void nge_reset(struct nge_softc *);
static int nge_list_rx_init(struct nge_softc *);
static int nge_list_tx_init(struct nge_softc *);
@ -672,33 +671,6 @@ nge_miibus_statchg(dev)
return;
}
static u_int32_t
nge_mchash(addr)
const uint8_t *addr;
{
uint32_t crc, carry;
int idx, bit;
uint8_t data;
/* Compute CRC for the address value. */
crc = 0xFFFFFFFF; /* initial value */
for (idx = 0; idx < 6; idx++) {
for (data = *addr++, bit = 0; bit < 8; bit++, data >>= 1) {
carry = ((crc & 0x80000000) ? 1 : 0) ^ (data & 0x01);
crc <<= 1;
if (carry)
crc = (crc ^ 0x04c11db6) | carry;
}
}
/*
* return the filter bit position
*/
return((crc >> 21) & 0x00000FFF);
}
static void
nge_setmulti(sc)
struct nge_softc *sc;
@ -744,7 +716,8 @@ nge_setmulti(sc)
TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) {
if (ifma->ifma_addr->sa_family != AF_LINK)
continue;
h = nge_mchash(LLADDR((struct sockaddr_dl *)ifma->ifma_addr));
h = ether_crc32_be(LLADDR((struct sockaddr_dl *)
ifma->ifma_addr), ETHER_ADDR_LEN) >> 21;
index = (h >> 4) & 0x7F;
bit = h & 0xF;
CSR_WRITE_4(sc, NGE_RXFILT_CTL,

31
sys/dev/re/if_re.c
View File

@ -226,7 +226,6 @@ static int re_miibus_readreg (device_t, int, int);
static int re_miibus_writereg (device_t, int, int, int);
static void re_miibus_statchg (device_t);
static uint32_t re_mchash (const uint8_t *);
static void re_setmulti (struct rl_softc *);
static void re_reset (struct rl_softc *);
@ -573,33 +572,6 @@ re_miibus_statchg(dev)
return;
}
/*
* Calculate CRC of a multicast group address, return the upper 6 bits.
*/
static uint32_t
re_mchash(addr)
const uint8_t *addr;
{
uint32_t crc, carry;
int idx, bit;
uint8_t data;
/* Compute CRC for the address value. */
crc = 0xFFFFFFFF; /* initial value */
for (idx = 0; idx < 6; idx++) {
for (data = *addr++, bit = 0; bit < 8; bit++, data >>= 1) {
carry = ((crc & 0x80000000) ? 1 : 0) ^ (data & 0x01);
crc <<= 1;
if (carry)
crc = (crc ^ 0x04c11db6) | carry;
}
}
/* return the filter bit position */
return(crc >> 26);
}
/*
* Program the 64-bit multicast hash filter.
*/
@ -634,7 +606,8 @@ re_setmulti(sc)
TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) {
if (ifma->ifma_addr->sa_family != AF_LINK)
continue;
h = re_mchash(LLADDR((struct sockaddr_dl *)ifma->ifma_addr));
h = ether_crc32_be(LLADDR((struct sockaddr_dl *)
ifma->ifma_addr), ETHER_ADDR_LEN) >> 26;
if (h < 32)
hashes[0] |= (1 << h);
else

29
sys/dev/sf/if_sf.c
View File

@ -160,7 +160,6 @@ static int sf_setvlan (struct sf_softc *, int, u_int32_t);
#endif
static u_int8_t sf_read_eeprom (struct sf_softc *, int);
static uint32_t sf_mchash (const uint8_t *);
static int sf_miibus_readreg (device_t, int, int);
static int sf_miibus_writereg (device_t, int, int, int);
@ -259,30 +258,6 @@ csr_write_4(sc, reg, val)
return;
}
static u_int32_t
sf_mchash(addr)
const uint8_t *addr;
{
uint32_t crc, carry;
int idx, bit;
uint8_t data;
/* Compute CRC for the address value. */
crc = 0xFFFFFFFF; /* initial value */
for (idx = 0; idx < 6; idx++) {
for (data = *addr++, bit = 0; bit < 8; bit++, data >>= 1) {
carry = ((crc & 0x80000000) ? 1 : 0) ^ (data & 0x01);
crc <<= 1;
if (carry)
crc = (crc ^ 0x04c11db6) | carry;
}
}
/* return the filter bit position */
return(crc >> 23 & 0x1FF);
}
/*
* Copy the address 'mac' into the perfect RX filter entry at
* offset 'idx.' The perfect filter only has 16 entries so do
@ -325,12 +300,12 @@ sf_sethash(sc, mac, prio)
caddr_t mac;
int prio;
{
u_int32_t h = 0;
u_int32_t h;
if (mac == NULL)
return(EINVAL);
h = sf_mchash(mac);
h = ether_crc32_be(mac, ETHER_ADDR_LEN) >> 23;
if (prio) {
SF_SETBIT(sc, SF_RXFILT_HASH_BASE + SF_RXFILT_HASH_PRIOOFF +

26
sys/dev/sk/if_sk.c
View File

@ -723,8 +723,6 @@ sk_marv_miibus_statchg(sc_if)
return;
}
#define XMAC_POLY 0xEDB88320
#define GMAC_POLY 0x04C11DB7L
#define HASH_BITS 6
static u_int32_t
@ -732,16 +730,9 @@ sk_xmchash(addr)
const uint8_t *addr;
{
uint32_t crc;
int idx, bit;
uint8_t data;
/* Compute CRC for the address value. */
crc = 0xFFFFFFFF; /* initial value */
for (idx = 0; idx < 6; idx++) {
for (data = *addr++, bit = 0; bit < 8; bit++, data >>= 1)
crc = (crc >> 1) ^ (((crc ^ data) & 1) ? XMAC_POLY : 0);
}
crc = ether_crc32_le(addr, ETHER_ADDR_LEN);
return (~crc & ((1 << HASH_BITS) - 1));
}
@ -751,21 +742,10 @@ static u_int32_t
sk_gmchash(addr)
const uint8_t *addr;
{
uint32_t crc, carry;
int idx, bit;
uint8_t data;
uint32_t crc;
/* Compute CRC for the address value. */
crc = 0xFFFFFFFF; /* initial value */
for (idx = 0; idx < 6; idx++) {
for (data = *addr++, bit = 0; bit < 8; bit++, data >>= 1) {
carry = ((crc & 0x80000000) ? 1 : 0) ^ (data & 0x01);
crc <<= 1;
if (carry)
crc = (crc ^ GMAC_POLY) | carry;
}
}
crc = ether_crc32_be(addr, ETHER_ADDR_LEN);
return (crc & ((1 << HASH_BITS) - 1));
}

24
sys/dev/sn/if_sn.c
View File

@ -133,7 +133,6 @@ static void snwatchdog(struct ifnet *);
static void sn_setmcast(struct sn_softc *);
static int sn_getmcf(struct arpcom *ac, u_char *mcf);
static uint32_t sn_mchash(const uint8_t *);
/* I (GB) have been unlucky getting the hardware padding
* to work properly.
@ -1417,8 +1416,8 @@ sn_getmcf(struct arpcom *ac, uint8_t *mcf)
TAILQ_FOREACH(ifma, &ac->ac_if.if_multiaddrs, ifma_link) {
if (ifma->ifma_addr->sa_family != AF_LINK)
return 0;
index = sn_mchash(
LLADDR((struct sockaddr_dl *)ifma->ifma_addr)) & 0x3f;
index = ether_crc32_le(LLADDR((struct sockaddr_dl *)
ifma->ifma_addr), ETHER_ADDR_LEN) & 0x3f;
index2 = 0;
for (i = 0; i < 6; i++) {
index2 <<= 1;
@ -1429,22 +1428,3 @@ sn_getmcf(struct arpcom *ac, uint8_t *mcf)
}
return 1; /* use multicast filter */
}
static uint32_t
sn_mchash(const uint8_t *addr)
{
const uint32_t poly = 0xedb88320;
uint32_t crc;
int idx, bit;
uint8_t data;
/* Compute CRC for the address value. */
crc = 0xFFFFFFFF; /* initial value */
for (idx = 0; idx < ETHER_ADDR_LEN; idx++) {
for (data = *addr++, bit = 0; bit < 8; bit++, data >>= 1) {
crc = (crc >> 1)^(((crc ^ data) & 0x01) ? poly : 0);
}
}
return crc;
}

30
sys/dev/tx/if_tx.c
View File

@ -102,7 +102,6 @@ static void epic_start_activity(epic_softc_t *);
static void epic_set_rx_mode(epic_softc_t *);
static void epic_set_tx_mode(epic_softc_t *);
static void epic_set_mc_table(epic_softc_t *);
static uint32_t tx_mchash(const uint8_t *);
static int epic_read_eeprom(epic_softc_t *,u_int16_t);
static void epic_output_eepromw(epic_softc_t *, u_int16_t);
static u_int16_t epic_input_eepromw(epic_softc_t *);
@ -1410,7 +1409,8 @@ epic_set_mc_table(sc)
#endif
if (ifma->ifma_addr->sa_family != AF_LINK)
continue;
h = tx_mchash(LLADDR((struct sockaddr_dl *)ifma->ifma_addr));
h = ether_crc32_be(LLADDR((struct sockaddr_dl *)
ifma->ifma_addr), ETHER_ADDR_LEN) >> 26;
filter[h >> 4] |= 1 << (h & 0xF);
}
@ -1420,32 +1420,6 @@ epic_set_mc_table(sc)
CSR_WRITE_4(sc, MC3, filter[3]);
}
/*
* Synopsis: calculate EPIC's hash of multicast address.
*/
static uint32_t
tx_mchash(addr)
const uint8_t *addr;
{
uint32_t crc, carry;
int idx, bit;
uint8_t data;
/* Compute CRC for the address value. */
crc = 0xFFFFFFFF; /* initial value */
for (idx = 0; idx < 6; idx++) {
for (data = *addr++, bit = 0; bit < 8; bit++, data >>= 1) {
carry = ((crc & 0x80000000) ? 1 : 0) ^ (data & 0x01);
crc <<= 1;
if (carry)
crc = (crc ^ 0x04c11db6) | carry;
}
}
return ((crc >> 26) & 0x3F);
}
/*
* Synopsis: Start receive process and transmit one, if they need.

23
sys/dev/usb/if_aue.c
View File

@ -208,7 +208,6 @@ Static int aue_miibus_writereg(device_ptr_t, int, int, int);
Static void aue_miibus_statchg(device_ptr_t);
Static void aue_setmulti(struct aue_softc *);
Static uint32_t aue_mchash(const uint8_t *);
Static void aue_reset(struct aue_softc *);
Static int aue_csr_read_1(struct aue_softc *, int);
@ -519,27 +518,8 @@ aue_miibus_statchg(device_ptr_t dev)
return;
}
#define AUE_POLY 0xEDB88320
#define AUE_BITS 6
Static u_int32_t
aue_mchash(const uint8_t *addr)
{
uint32_t crc;
int idx, bit;
uint8_t data;
/* Compute CRC for the address value. */
crc = 0xFFFFFFFF; /* initial value */
for (idx = 0; idx < 6; idx++) {
for (data = *addr++, bit = 0; bit < 8; bit++, data >>= 1)
crc = (crc >> 1) ^ (((crc ^ data) & 1) ? AUE_POLY : 0);
}
return (crc & ((1 << AUE_BITS) - 1));
}
Static void
aue_setmulti(struct aue_softc *sc)
{
@ -569,7 +549,8 @@ aue_setmulti(struct aue_softc *sc)
{
if (ifma->ifma_addr->sa_family != AF_LINK)
continue;
h = aue_mchash(LLADDR((struct sockaddr_dl *)ifma->ifma_addr));
h = ether_crc32_le(LLADDR((struct sockaddr_dl *)
ifma->ifma_addr), ETHER_ADDR_LEN) & ((1 << AUE_BITS) - 1);
AUE_SETBIT(sc, AUE_MAR + (h >> 3), 1 << (h & 0x7));
}

27
sys/dev/usb/if_axe.c
View File

@ -140,7 +140,6 @@ Static int axe_ifmedia_upd(struct ifnet *);
Static void axe_ifmedia_sts(struct ifnet *, struct ifmediareq *);
Static void axe_setmulti(struct axe_softc *);
Static uint32_t axe_mchash(const uint8_t *);
Static device_method_t axe_methods[] = {
/* Device interface */
@ -313,29 +312,6 @@ axe_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr)
return;
}
Static uint32_t
axe_mchash(const uint8_t *addr)
{
uint32_t crc, carry;
int idx, bit;
uint8_t data;
/* Compute CRC for the address value. */
crc = 0xFFFFFFFF; /* initial value */
for (idx = 0; idx < 6; idx++) {
for (data = *addr++, bit = 0; bit < 8; bit++, data >>= 1) {
carry = ((crc & 0x80000000) ? 1 : 0) ^ (data & 0x01);
crc <<= 1;
if (carry)
crc = (crc ^ 0x04c11db6) | carry;
}
}
/* return the filter bit position */
return((crc >> 26) & 0x0000003F);
}
Static void
axe_setmulti(struct axe_softc *sc)
{
@ -361,7 +337,8 @@ axe_setmulti(struct axe_softc *sc)
TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) {
if (ifma->ifma_addr->sa_family != AF_LINK)
continue;
h = axe_mchash(LLADDR((struct sockaddr_dl *)ifma->ifma_addr));
h = ether_crc32_be(LLADDR((struct sockaddr_dl *)
ifma->ifma_addr), ETHER_ADDR_LEN) >> 26;
hashtbl[h / 8] |= 1 << (h % 8);
}

10
sys/dev/usb/if_cue.c
View File

@ -323,23 +323,15 @@ cue_getmac(struct cue_softc *sc, void *buf)
return(0);
}
#define CUE_POLY 0xEDB88320
#define CUE_BITS 9
Static uint32_t
cue_mchash(const uint8_t *addr)
{
uint32_t crc;
int idx, bit;
uint8_t data;
/* Compute CRC for the address value. */
crc = 0xFFFFFFFF; /* initial value */
for (idx = 0; idx < 6; idx++) {
for (data = *addr++, bit = 0; bit < 8; bit++, data >>= 1)
crc = (crc >> 1) ^ (((crc ^ data) & 1) ? CUE_POLY : 0);
}
crc = ether_crc32_le(addr, ETHER_ADDR_LEN);
return (crc & ((1 << CUE_BITS) - 1));
}

31
sys/dev/usb/if_rue.c
View File

@ -156,7 +156,6 @@ Static int rue_miibus_readreg(device_ptr_t, int, int);
Static int rue_miibus_writereg(device_ptr_t, int, int, int);
Static void rue_miibus_statchg(device_ptr_t);
Static uint32_t rue_mchash(const uint8_t *);
Static void rue_setmulti(struct rue_softc *);
Static void rue_reset(struct rue_softc *);
@ -459,33 +458,6 @@ rue_miibus_statchg(device_ptr_t dev)
RUE_SETBIT(sc, RUE_CR, (RUE_CR_RE | RUE_CR_TE));
}
/*
* Calculate CRC of a multicast group address, return the upper 6 bits.
*/
Static uint32_t
rue_mchash(const uint8_t *addr)
{
uint32_t crc, carry;
int idx, bit;
uint8_t data;
/* Compute CRC for the address value. */
crc = 0xFFFFFFFF; /* initial value */
for (idx = 0; idx < 6; idx++) {
for (data = *addr++, bit = 0; bit < 8; bit++, data >>= 1) {
carry = ((crc & 0x80000000) ? 1 : 0) ^ (data & 0x01);
crc <<= 1;
if (carry)
crc = (crc ^ 0x04c11db6) | carry;
}
}
/* return the filter bit position */
return (crc >> 26);
}
/*
* Program the 64-bit multicast hash filter.
*/
@ -526,7 +498,8 @@ rue_setmulti(struct rue_softc *sc)
{
if (ifma->ifma_addr->sa_family != AF_LINK)
continue;
h = rue_mchash(LLADDR((struct sockaddr_dl *)ifma->ifma_addr));
h = ether_crc32_be(LLADDR((struct sockaddr_dl *)
ifma->ifma_addr), ETHER_ADDR_LEN) >> 26;
if (h < 32)
hashes[0] |= (1 << h);
else

31
sys/dev/vr/if_vr.c
View File

@ -160,7 +160,6 @@ static int vr_miibus_writereg (device_t, int, int, int);
static void vr_miibus_statchg (device_t);
static void vr_setcfg (struct vr_softc *, int);
static uint32_t vr_mchash (const uint8_t *);
static void vr_setmulti (struct vr_softc *);
static void vr_reset (struct vr_softc *);
static int vr_list_rx_init (struct vr_softc *);
@ -561,33 +560,6 @@ vr_miibus_statchg(dev)
return;
}
/*
* Calculate CRC of a multicast group address, return the lower 6 bits.
*/
static u_int32_t
vr_mchash(addr)
const uint8_t *addr;
{
uint32_t crc, carry;
int idx, bit;
uint8_t data;
/* Compute CRC for the address value. */
crc = 0xFFFFFFFF; /* initial value */
for (idx = 0; idx < 6; idx++) {
for (data = *addr++, bit = 0; bit < 8; bit++, data >>= 1) {
carry = ((crc & 0x80000000) ? 1 : 0) ^ (data & 0x01);
crc <<= 1;
if (carry)
crc = (crc ^ 0x04c11db6) | carry;
}
}
/* return the filter bit position */
return((crc >> 26) & 0x0000003F);
}
/*
* Program the 64-bit multicast hash filter.
*/
@ -622,7 +594,8 @@ vr_setmulti(sc)
TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) {
if (ifma->ifma_addr->sa_family != AF_LINK)
continue;
h = vr_mchash(LLADDR((struct sockaddr_dl *)ifma->ifma_addr));
h = ether_crc32_be(LLADDR((struct sockaddr_dl *)
ifma->ifma_addr), ETHER_ADDR_LEN) >> 26;
if (h < 32)
hashes[0] |= (1 << h);
else

26
sys/pci/if_dc.c
View File

@ -1023,7 +1023,6 @@ dc_miibus_mediainit(device_t dev)
ifmedia_add(ifm, IFM_ETHER | IFM_HPNA_1, 0, NULL);
}
#define DC_POLY 0xEDB88320
#define DC_BITS_512 9
#define DC_BITS_128 7
#define DC_BITS_64 6
@ -1032,16 +1031,9 @@ static uint32_t
dc_mchash_le(struct dc_softc *sc, const uint8_t *addr)
{
uint32_t crc;
int idx, bit;
uint8_t data;
/* Compute CRC for the address value. */
crc = 0xFFFFFFFF; /* initial value */
for (idx = 0; idx < 6; idx++) {
for (data = *addr++, bit = 0; bit < 8; bit++, data >>= 1)
crc = (crc >> 1) ^ (((crc ^ data) & 1) ? DC_POLY : 0);
}
crc = ether_crc32_le(addr, ETHER_ADDR_LEN);
/*
* The hash table on the PNIC II and the MX98715AEC-C/D/E
@ -1073,22 +1065,10 @@ dc_mchash_le(struct dc_softc *sc, const uint8_t *addr)
static uint32_t
dc_mchash_be(const uint8_t *addr)
{
uint32_t crc, carry;
int idx, bit;
uint8_t data;
uint32_t crc;
/* Compute CRC for the address value. */
crc = 0xFFFFFFFF; /* initial value */
for (idx = 0; idx < 6; idx++) {
for (data = *addr++, bit = 0; bit < 8; bit++, data >>= 1) {
carry = ((crc & 0x80000000) ? 1 : 0) ^ (data & 0x01);
data >>= 1;
crc <<= 1;
if (carry)
crc = (crc ^ 0x04c11db6) | carry;
}
}
crc = ether_crc32_be(addr, ETHER_ADDR_LEN);
/* Return the filter bit position. */
return ((crc >> 26) & 0x0000003F);

25
sys/pci/if_de.c
View File

@ -1992,31 +1992,10 @@ tulip_mii_writereg(
#endif
}
#define tulip_mchash(mca) (tulip_crc32(mca, 6) & 0x1FF)
#define tulip_mchash(mca) (ether_crc32_le(mca, 6) & 0x1FF)
#define tulip_srom_crcok(databuf) ( \
((tulip_crc32(databuf, 126) & 0xFFFFU) ^ 0xFFFFU) == \
((ether_crc32_le(databuf, 126) & 0xFFFFU) ^ 0xFFFFU) == \
((databuf)[126] | ((databuf)[127] << 8)))
static unsigned
tulip_crc32(
const unsigned char *databuf,
size_t datalen)
{
u_int idx, crc = 0xFFFFFFFFUL;
static const u_int crctab[] = {
0x00000000, 0x1db71064, 0x3b6e20c8, 0x26d930ac,
0x76dc4190, 0x6b6b51f4, 0x4db26158, 0x5005713c,
0xedb88320, 0xf00f9344, 0xd6d6a3e8, 0xcb61b38c,
0x9b64c2b0, 0x86d3d2d4, 0xa00ae278, 0xbdbdf21c
};
for (idx = 0; idx < datalen; idx++) {
crc ^= *databuf++;
crc = (crc >> 4) ^ crctab[crc & 0xf];
crc = (crc >> 4) ^ crctab[crc & 0xf];
}
return crc;
}
static void
tulip_identify_dec_nic(

25
sys/pci/if_pcn.c
View File

@ -137,7 +137,6 @@ static void pcn_miibus_statchg (device_t);
static void pcn_setfilt (struct ifnet *);
static void pcn_setmulti (struct pcn_softc *);
static uint32_t pcn_mchash (const uint8_t *);
static void pcn_reset (struct pcn_softc *);
static int pcn_list_rx_init (struct pcn_softc *);
static int pcn_list_tx_init (struct pcn_softc *);
@ -307,27 +306,6 @@ pcn_miibus_statchg(dev)
return;
}
#define DC_POLY 0xEDB88320
static u_int32_t
pcn_mchash(addr)
const uint8_t *addr;
{
uint32_t crc;
int idx, bit;
uint8_t data;
/* Compute CRC for the address value. */
crc = 0xFFFFFFFF; /* initial value */
for (idx = 0; idx < 6; idx++) {
for (data = *addr++, bit = 0; bit < 8; bit++, data >>= 1)
crc = (crc >> 1) ^ (((crc ^ data) & 1) ? DC_POLY : 0);
}
return ((crc >> 26) & 0x3F);
}
static void
pcn_setmulti(sc)
struct pcn_softc *sc;
@ -356,7 +334,8 @@ pcn_setmulti(sc)
TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) {
if (ifma->ifma_addr->sa_family != AF_LINK)
continue;
h = pcn_mchash(LLADDR((struct sockaddr_dl *)ifma->ifma_addr));
h = ether_crc32_le(LLADDR((struct sockaddr_dl *)
ifma->ifma_addr), ETHER_ADDR_LEN) >> 26;
hashes[h >> 4] |= 1 << (h & 0xF);
}

31
sys/pci/if_rl.c
View File

@ -207,7 +207,6 @@ static int rl_miibus_readreg (device_t, int, int);
static int rl_miibus_writereg (device_t, int, int, int);
static void rl_miibus_statchg (device_t);
static uint32_t rl_mchash (const uint8_t *);
static void rl_setmulti (struct rl_softc *);
static void rl_reset (struct rl_softc *);
static int rl_list_tx_init (struct rl_softc *);
@ -733,33 +732,6 @@ rl_miibus_statchg(dev)
return;
}
/*
* Calculate CRC of a multicast group address, return the upper 6 bits.
*/
static u_int32_t
rl_mchash(addr)
const uint8_t *addr;
{
uint32_t crc, carry;
int idx, bit;
uint8_t data;
/* Compute CRC for the address value. */
crc = 0xFFFFFFFF; /* initial value */
for (idx = 0; idx < 6; idx++) {
for (data = *addr++, bit = 0; bit < 8; bit++, data >>=1 ) {
carry = ((crc & 0x80000000) ? 1 : 0) ^ (data & 0x01);
crc <<= 1;
if (carry)
crc = (crc ^ 0x04c11db6) | carry;
}
}
/* return the filter bit position */
return(crc >> 26);
}
/*
* Program the 64-bit multicast hash filter.
*/
@ -794,7 +766,8 @@ rl_setmulti(sc)
TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) {
if (ifma->ifma_addr->sa_family != AF_LINK)
continue;
h = rl_mchash(LLADDR((struct sockaddr_dl *)ifma->ifma_addr));
h = ether_crc32_be(LLADDR((struct sockaddr_dl *)
ifma->ifma_addr), ETHER_ADDR_LEN) >> 26;
if (h < 32)
hashes[0] |= (1 << h);
else

29
sys/pci/if_sf.c
View File

@ -160,7 +160,6 @@ static int sf_setvlan (struct sf_softc *, int, u_int32_t);
#endif
static u_int8_t sf_read_eeprom (struct sf_softc *, int);
static uint32_t sf_mchash (const uint8_t *);
static int sf_miibus_readreg (device_t, int, int);
static int sf_miibus_writereg (device_t, int, int, int);
@ -259,30 +258,6 @@ csr_write_4(sc, reg, val)
return;
}
static u_int32_t
sf_mchash(addr)
const uint8_t *addr;
{
uint32_t crc, carry;
int idx, bit;
uint8_t data;
/* Compute CRC for the address value. */
crc = 0xFFFFFFFF; /* initial value */
for (idx = 0; idx < 6; idx++) {
for (data = *addr++, bit = 0; bit < 8; bit++, data >>= 1) {
carry = ((crc & 0x80000000) ? 1 : 0) ^ (data & 0x01);
crc <<= 1;
if (carry)
crc = (crc ^ 0x04c11db6) | carry;
}
}
/* return the filter bit position */
return(crc >> 23 & 0x1FF);
}
/*
* Copy the address 'mac' into the perfect RX filter entry at
* offset 'idx.' The perfect filter only has 16 entries so do
@ -325,12 +300,12 @@ sf_sethash(sc, mac, prio)
caddr_t mac;
int prio;
{
u_int32_t h = 0;
u_int32_t h;
if (mac == NULL)
return(EINVAL);
h = sf_mchash(mac);
h = ether_crc32_be(mac, ETHER_ADDR_LEN) >> 23;
if (prio) {
SF_SETBIT(sc, SF_RXFILT_HASH_BASE + SF_RXFILT_HASH_PRIOOFF +

15
sys/pci/if_sis.c
View File

@ -842,21 +842,10 @@ sis_mchash(sc, addr)
struct sis_softc *sc;
const uint8_t *addr;
{
uint32_t crc, carry;
int idx, bit;
uint8_t data;
uint32_t crc;
/* Compute CRC for the address value. */
crc = 0xFFFFFFFF; /* initial value */
for (idx = 0; idx < 6; idx++) {
for (data = *addr++, bit = 0; bit < 8; bit++, data >>= 1) {
carry = ((crc & 0x80000000) ? 1 : 0) ^ (data & 0x01);
crc <<= 1;
if (carry)
crc = (crc ^ 0x04c11db6) | carry;
}
}
crc = ether_crc32_be(addr, ETHER_ADDR_LEN);
/*
* return the filter bit position

26
sys/pci/if_sk.c
View File

@ -723,8 +723,6 @@ sk_marv_miibus_statchg(sc_if)
return;
}
#define XMAC_POLY 0xEDB88320
#define GMAC_POLY 0x04C11DB7L
#define HASH_BITS 6
static u_int32_t
@ -732,16 +730,9 @@ sk_xmchash(addr)
const uint8_t *addr;
{
uint32_t crc;
int idx, bit;
uint8_t data;
/* Compute CRC for the address value. */
crc = 0xFFFFFFFF; /* initial value */
for (idx = 0; idx < 6; idx++) {
for (data = *addr++, bit = 0; bit < 8; bit++, data >>= 1)
crc = (crc >> 1) ^ (((crc ^ data) & 1) ? XMAC_POLY : 0);
}
crc = ether_crc32_le(addr, ETHER_ADDR_LEN);
return (~crc & ((1 << HASH_BITS) - 1));
}
@ -751,21 +742,10 @@ static u_int32_t
sk_gmchash(addr)
const uint8_t *addr;
{
uint32_t crc, carry;
int idx, bit;
uint8_t data;
uint32_t crc;
/* Compute CRC for the address value. */
crc = 0xFFFFFFFF; /* initial value */
for (idx = 0; idx < 6; idx++) {
for (data = *addr++, bit = 0; bit < 8; bit++, data >>= 1) {
carry = ((crc & 0x80000000) ? 1 : 0) ^ (data & 0x01);
crc <<= 1;
if (carry)
crc = (crc ^ GMAC_POLY) | carry;
}
}
crc = ether_crc32_be(addr, ETHER_ADDR_LEN);
return (crc & ((1 << HASH_BITS) - 1));
}

31
sys/pci/if_ste.c
View File

@ -122,7 +122,6 @@ static void ste_miibus_statchg (device_t);
static int ste_eeprom_wait (struct ste_softc *);
static int ste_read_eeprom (struct ste_softc *, caddr_t, int, int, int);
static void ste_wait (struct ste_softc *);
static u_int8_t ste_calchash (caddr_t);
static void ste_setmulti (struct ste_softc *);
static int ste_init_rx_list (struct ste_softc *);
static void ste_init_tx_list (struct ste_softc *);
@ -560,33 +559,6 @@ ste_read_eeprom(sc, dest, off, cnt, swap)
return(err ? 1 : 0);
}
static u_int8_t
ste_calchash(addr)
caddr_t addr;
{
u_int32_t crc, carry;
int i, j;
u_int8_t c;
/* Compute CRC for the address value. */
crc = 0xFFFFFFFF; /* initial value */
for (i = 0; i < 6; i++) {
c = *(addr + i);
for (j = 0; j < 8; j++) {
carry = ((crc & 0x80000000) ? 1 : 0) ^ (c & 0x01);
crc <<= 1;
c >>= 1;
if (carry)
crc = (crc ^ 0x04c11db6) | carry;
}
}
/* return the filter bit position */
return(crc & 0x0000003F);
}
static void
ste_setmulti(sc)
struct ste_softc *sc;
@ -613,7 +585,8 @@ ste_setmulti(sc)
TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) {
if (ifma->ifma_addr->sa_family != AF_LINK)
continue;
h = ste_calchash(LLADDR((struct sockaddr_dl *)ifma->ifma_addr));
h = ether_crc32_be(LLADDR((struct sockaddr_dl *)
ifma->ifma_addr), ETHER_ADDR_LEN) & 0x3F;
if (h < 32)
hashes[0] |= (1 << h);
else

31
sys/pci/if_vr.c
View File

@ -160,7 +160,6 @@ static int vr_miibus_writereg (device_t, int, int, int);
static void vr_miibus_statchg (device_t);
static void vr_setcfg (struct vr_softc *, int);
static uint32_t vr_mchash (const uint8_t *);
static void vr_setmulti (struct vr_softc *);
static void vr_reset (struct vr_softc *);
static int vr_list_rx_init (struct vr_softc *);
@ -561,33 +560,6 @@ vr_miibus_statchg(dev)
return;
}
/*
* Calculate CRC of a multicast group address, return the lower 6 bits.
*/
static u_int32_t
vr_mchash(addr)
const uint8_t *addr;
{
uint32_t crc, carry;
int idx, bit;
uint8_t data;
/* Compute CRC for the address value. */
crc = 0xFFFFFFFF; /* initial value */
for (idx = 0; idx < 6; idx++) {
for (data = *addr++, bit = 0; bit < 8; bit++, data >>= 1) {
carry = ((crc & 0x80000000) ? 1 : 0) ^ (data & 0x01);
crc <<= 1;
if (carry)
crc = (crc ^ 0x04c11db6) | carry;
}
}
/* return the filter bit position */
return((crc >> 26) & 0x0000003F);
}
/*
* Program the 64-bit multicast hash filter.
*/
@ -622,7 +594,8 @@ vr_setmulti(sc)
TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) {
if (ifma->ifma_addr->sa_family != AF_LINK)
continue;
h = vr_mchash(LLADDR((struct sockaddr_dl *)ifma->ifma_addr));
h = ether_crc32_be(LLADDR((struct sockaddr_dl *)
ifma->ifma_addr), ETHER_ADDR_LEN) >> 26;
if (h < 32)
hashes[0] |= (1 << h);
else

34
sys/pci/if_wb.c
View File

@ -175,7 +175,6 @@ static int wb_mii_readreg (struct wb_softc *, struct wb_mii_frame *);
static int wb_mii_writereg (struct wb_softc *, struct wb_mii_frame *);
static void wb_setcfg (struct wb_softc *, u_int32_t);
static uint32_t wb_mchash (const uint8_t *);
static void wb_setmulti (struct wb_softc *);
static void wb_reset (struct wb_softc *);
static void wb_fixmedia (struct wb_softc *);
@ -587,36 +586,6 @@ wb_miibus_statchg(dev)
return;
}
static u_int32_t
wb_mchash(addr)
const uint8_t *addr;
{
uint32_t crc, carry;
int idx, bit;
uint8_t data;
/* Compute CRC for the address value. */
crc = 0xFFFFFFFF; /* initial value */
for (idx = 0; idx < 6; idx++) {
for (data = *addr++, bit = 0; bit < 8; bit++, data >>= 1) {
carry = ((crc & 0x80000000) ? 1 : 0) ^ (data & 0x01);
crc <<= 1;
if (carry)
crc = (crc ^ 0x04c11db6) | carry;
}
}
/*
* return the filter bit position
* Note: I arrived at the following nonsense
* through experimentation. It's not the usual way to
* generate the bit position but it's the only thing
* I could come up with that works.
*/
return(~(crc >> 26) & 0x0000003F);
}
/*
* Program the 64-bit multicast hash filter.
*/
@ -651,7 +620,8 @@ wb_setmulti(sc)
TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) {
if (ifma->ifma_addr->sa_family != AF_LINK)
continue;
h = wb_mchash(LLADDR((struct sockaddr_dl *)ifma->ifma_addr));
h = ~ether_crc32_be(LLADDR((struct sockaddr_dl *)
ifma->ifma_addr), ETHER_ADDR_LEN) >> 26;
if (h < 32)
hashes[0] |= (1 << h);
else

54
sys/pci/if_xl.c
View File

@ -253,7 +253,6 @@ static int xl_mii_writereg (struct xl_softc *, struct xl_mii_frame *);
static void xl_setcfg (struct xl_softc *);
static void xl_setmode (struct xl_softc *, int);
static uint32_t xl_mchash (const uint8_t *);
static void xl_setmulti (struct xl_softc *);
static void xl_setmulti_hash (struct xl_softc *);
static void xl_reset (struct xl_softc *);
@ -811,44 +810,6 @@ xl_read_eeprom(sc, dest, off, cnt, swap)
return(err ? 1 : 0);
}
/*
* This routine is taken from the 3Com Etherlink XL manual,
* page 10-7. It calculates a CRC of the supplied multicast
* group address and returns the lower 8 bits, which are used
* as the multicast filter position.
* Note: the 3c905B currently only supports a 64-bit hash table,
* which means we really only need 6 bits, but the manual indicates
* that future chip revisions will have a 256-bit hash table,
* hence the routine is set up to calculate 8 bits of position
* info in case we need it some day.
* Note II, The Sequel: _CURRENT_ versions of the 3c905B have a
* 256 bit hash table. This means we have to use all 8 bits regardless.
* On older cards, the upper 2 bits will be ignored. Grrrr....
*/
static u_int32_t
xl_mchash(addr)
const uint8_t *addr;
{
uint32_t crc, carry;
int idx, bit;
uint8_t data;
/* Compute CRC for the address value. */
crc = 0xFFFFFFFF; /* initial value */
for (idx = 0; idx < 6; idx++) {
for (data = *addr++, bit = 0; bit < 8; bit++, data >>= 1) {
carry = ((crc & 0x80000000) ? 1 : 0) ^ (data & 0x01);
crc <<= 1;
if (carry)
crc = (crc ^ 0x04c11db6) | carry;
}
}
/* return the filter bit position */
return(crc & 0x000000FF);
}
/*
* NICs older than the 3c905B have only one multicast option, which
* is to enable reception of all multicast frames.
@ -920,7 +881,20 @@ xl_setmulti_hash(sc)
TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) {
if (ifma->ifma_addr->sa_family != AF_LINK)
continue;
h = xl_mchash(LLADDR((struct sockaddr_dl *)ifma->ifma_addr));
/*
* Note: the 3c905B currently only supports a 64-bit hash
* table, which means we really only need 6 bits, but the
* manual indicates that future chip revisions will have a
* 256-bit hash table, hence the routine is set up to
* calculate 8 bits of position info in case we need it some
* day.
* Note II, The Sequel: _CURRENT_ versions of the 3c905B have
* a 256 bit hash table. This means we have to use all 8 bits
* regardless. On older cards, the upper 2 bits will be
* ignored. Grrrr....
*/
h = ether_crc32_be(LLADDR((struct sockaddr_dl *)
ifma->ifma_addr), ETHER_ADDR_LEN) & 0xFF;
CSR_WRITE_2(sc, XL_COMMAND, XL_CMD_RX_SET_HASH|XL_HASH_SET|h);
mcnt++;
}