Implement basic support for memory attributes. At this time we only
distinguish between UC and WB memory so that we can map the page to either a region 6 address (for UC) or a region 7 address (for WB). This change is only now possible, because previously we would map regions 6 and 7 with 256MB translations and on top of that had the kernel mapped in region 7 using a wired translation. The introduction of the PBVM moved the kernel into its own region and freed up region 7 and allowed us to revert to standard page-sized translations. This commit inroduces pmap_page_to_va() that respects the attribute.
This commit is contained in:
Marcel Moolenaar
parent
18abed0c9b
commit
0eb8c1410a
@ -483,6 +483,18 @@ pmap_vhpt_population(SYSCTL_HANDLER_ARGS)
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return (error);
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}
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vm_offset_t
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pmap_page_to_va(vm_page_t m)
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{
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vm_paddr_t pa;
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vm_offset_t va;
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pa = VM_PAGE_TO_PHYS(m);
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va = (m->md.memattr == VM_MEMATTR_UNCACHEABLE) ? IA64_PHYS_TO_RR6(pa) :
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IA64_PHYS_TO_RR7(pa);
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return (va);
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}
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/*
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* Initialize a vm_page's machine-dependent fields.
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*/
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@ -492,6 +504,7 @@ pmap_page_init(vm_page_t m)
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TAILQ_INIT(&m->md.pv_list);
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m->md.pv_list_count = 0;
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m->md.memattr = VM_MEMATTR_DEFAULT;
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}
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/*
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@ -702,8 +715,7 @@ pmap_growkernel(vm_offset_t addr)
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if (!nkpg)
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panic("%s: cannot add dir. page", __func__);
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dir1 = (struct ia64_lpte **)
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IA64_PHYS_TO_RR7(VM_PAGE_TO_PHYS(nkpg));
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dir1 = (struct ia64_lpte **)pmap_page_to_va(nkpg);
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bzero(dir1, PAGE_SIZE);
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ia64_kptdir[KPTE_DIR0_INDEX(kernel_vm_end)] = dir1;
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}
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@ -713,8 +725,7 @@ pmap_growkernel(vm_offset_t addr)
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if (!nkpg)
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panic("%s: cannot add PTE page", __func__);
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leaf = (struct ia64_lpte *)
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IA64_PHYS_TO_RR7(VM_PAGE_TO_PHYS(nkpg));
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leaf = (struct ia64_lpte *)pmap_page_to_va(nkpg);
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bzero(leaf, PAGE_SIZE);
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dir1[KPTE_DIR1_INDEX(kernel_vm_end)] = leaf;
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@ -1125,6 +1136,14 @@ pmap_pte_prot(pmap_t pm, struct ia64_lpte *pte, vm_prot_t prot)
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pte->pte |= prot2ar[(prot & VM_PROT_ALL) >> 1];
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}
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static PMAP_INLINE void
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pmap_pte_attr(struct ia64_lpte *pte, vm_memattr_t ma)
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{
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pte->pte &= ~PTE_MA_MASK;
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pte->pte |= (ma & PTE_MA_MASK);
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}
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/*
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* Set a pte to contain a valid mapping and enter it in the VHPT. If
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* the pte was orginally valid, then its assumed to already be in the
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@ -1137,8 +1156,9 @@ pmap_set_pte(struct ia64_lpte *pte, vm_offset_t va, vm_offset_t pa,
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boolean_t wired, boolean_t managed)
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{
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pte->pte &= PTE_PROT_MASK | PTE_PL_MASK | PTE_AR_MASK | PTE_ED;
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pte->pte |= PTE_PRESENT | PTE_MA_WB;
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pte->pte &= PTE_PROT_MASK | PTE_MA_MASK | PTE_PL_MASK |
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PTE_AR_MASK | PTE_ED;
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pte->pte |= PTE_PRESENT;
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pte->pte |= (managed) ? PTE_MANAGED : (PTE_DIRTY | PTE_ACCESSED);
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pte->pte |= (wired) ? PTE_WIRED : 0;
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pte->pte |= pa & PTE_PPN_MASK;
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@ -1255,6 +1275,7 @@ pmap_qenter(vm_offset_t va, vm_page_t *m, int count)
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else
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pmap_enter_vhpt(pte, va);
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pmap_pte_prot(kernel_pmap, pte, VM_PROT_ALL);
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pmap_pte_attr(pte, m[i]->md.memattr);
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pmap_set_pte(pte, va, VM_PAGE_TO_PHYS(m[i]), FALSE, FALSE);
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va += PAGE_SIZE;
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}
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@ -1296,6 +1317,7 @@ pmap_kenter(vm_offset_t va, vm_offset_t pa)
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else
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pmap_enter_vhpt(pte, va);
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pmap_pte_prot(kernel_pmap, pte, VM_PROT_ALL);
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pmap_pte_attr(pte, VM_MEMATTR_DEFAULT);
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pmap_set_pte(pte, va, pa, FALSE, FALSE);
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}
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@ -1606,6 +1628,7 @@ pmap_enter(pmap_t pmap, vm_offset_t va, vm_prot_t access, vm_page_t m,
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* adds the pte to the VHPT if necessary.
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*/
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pmap_pte_prot(pmap, pte, prot);
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pmap_pte_attr(pte, m->md.memattr);
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pmap_set_pte(pte, va, pa, wired, managed);
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/* Invalidate the I-cache when needed. */
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@ -1711,6 +1734,7 @@ pmap_enter_quick_locked(pmap_t pmap, vm_offset_t va, vm_page_t m,
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pmap_enter_vhpt(pte, va);
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pmap_pte_prot(pmap, pte,
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prot & (VM_PROT_READ | VM_PROT_EXECUTE));
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pmap_pte_attr(pte, m->md.memattr);
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pmap_set_pte(pte, va, VM_PAGE_TO_PHYS(m), FALSE, managed);
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if (prot & VM_PROT_EXECUTE)
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@ -1793,8 +1817,10 @@ pmap_copy(pmap_t dst_pmap, pmap_t src_pmap, vm_offset_t dst_addr, vm_size_t len,
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void
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pmap_zero_page(vm_page_t m)
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{
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vm_offset_t va = IA64_PHYS_TO_RR7(VM_PAGE_TO_PHYS(m));
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bzero((caddr_t) va, PAGE_SIZE);
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void *p;
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p = (void *)pmap_page_to_va(m);
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bzero(p, PAGE_SIZE);
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}
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@ -1809,8 +1835,10 @@ pmap_zero_page(vm_page_t m)
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void
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pmap_zero_page_area(vm_page_t m, int off, int size)
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{
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vm_offset_t va = IA64_PHYS_TO_RR7(VM_PAGE_TO_PHYS(m));
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bzero((char *)(caddr_t)va + off, size);
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char *p;
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p = (void *)pmap_page_to_va(m);
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bzero(p + off, size);
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}
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@ -1823,8 +1851,10 @@ pmap_zero_page_area(vm_page_t m, int off, int size)
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void
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pmap_zero_page_idle(vm_page_t m)
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{
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vm_offset_t va = IA64_PHYS_TO_RR7(VM_PAGE_TO_PHYS(m));
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bzero((caddr_t) va, PAGE_SIZE);
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void *p;
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p = (void *)pmap_page_to_va(m);
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bzero(p, PAGE_SIZE);
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}
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@ -1837,9 +1867,11 @@ pmap_zero_page_idle(vm_page_t m)
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void
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pmap_copy_page(vm_page_t msrc, vm_page_t mdst)
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{
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vm_offset_t src = IA64_PHYS_TO_RR7(VM_PAGE_TO_PHYS(msrc));
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vm_offset_t dst = IA64_PHYS_TO_RR7(VM_PAGE_TO_PHYS(mdst));
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bcopy((caddr_t) src, (caddr_t) dst, PAGE_SIZE);
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void *dst, *src;
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src = (void *)pmap_page_to_va(msrc);
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dst = (void *)pmap_page_to_va(mdst);
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bcopy(src, dst, PAGE_SIZE);
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}
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/*
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@ -2186,6 +2218,7 @@ pmap_remove_write(vm_page_t m)
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}
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prot &= ~VM_PROT_WRITE;
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pmap_pte_prot(pmap, pte, prot);
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pmap_pte_attr(pte, m->md.memattr);
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pmap_invalidate_page(pv->pv_va);
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}
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pmap_switch(oldpmap);
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@ -2218,6 +2251,63 @@ pmap_unmapdev(vm_offset_t va, vm_size_t size)
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{
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}
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/*
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* Sets the memory attribute for the specified page.
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*/
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static void
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pmap_page_set_memattr_1(void *arg)
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{
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struct ia64_pal_result res;
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register_t is;
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uintptr_t pp = (uintptr_t)arg;
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is = intr_disable();
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res = ia64_call_pal_static(pp, 0, 0, 0);
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intr_restore(is);
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}
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void
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pmap_page_set_memattr(vm_page_t m, vm_memattr_t ma)
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{
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struct ia64_lpte *pte;
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pmap_t oldpmap;
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pv_entry_t pv;
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void *va;
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vm_page_lock_queues();
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m->md.memattr = ma;
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TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) {
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PMAP_LOCK(pv->pv_pmap);
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oldpmap = pmap_switch(pv->pv_pmap);
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pte = pmap_find_vhpt(pv->pv_va);
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KASSERT(pte != NULL, ("pte"));
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pmap_pte_attr(pte, ma);
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pmap_invalidate_page(pv->pv_va);
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pmap_switch(oldpmap);
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PMAP_UNLOCK(pv->pv_pmap);
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}
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vm_page_unlock_queues();
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if (ma == VM_MEMATTR_UNCACHEABLE) {
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#ifdef SMP
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smp_rendezvous(NULL, pmap_page_set_memattr_1, NULL,
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(void *)PAL_PREFETCH_VISIBILITY);
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#else
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pmap_page_set_memattr_1((void *)PAL_PREFETCH_VISIBILITY);
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#endif
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va = (void *)pmap_page_to_va(m);
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critical_enter();
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cpu_flush_dcache(va, PAGE_SIZE);
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critical_exit();
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#ifdef SMP
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smp_rendezvous(NULL, pmap_page_set_memattr_1, NULL,
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(void *)PAL_MC_DRAIN);
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#else
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pmap_page_set_memattr_1((void *)PAL_MC_DRAIN);
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#endif
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}
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}
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/*
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* perform the pmap work for mincore
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*/
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@ -2228,7 +2318,7 @@ pmap_mincore(pmap_t pmap, vm_offset_t addr, vm_paddr_t *locked_pa)
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struct ia64_lpte *pte, tpte;
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vm_paddr_t pa;
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int val;
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PMAP_LOCK(pmap);
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retry:
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oldpmap = pmap_switch(pmap);
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@ -68,6 +68,7 @@ struct pv_entry;
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struct md_page {
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int pv_list_count;
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TAILQ_HEAD(,pv_entry) pv_list;
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vm_memattr_t memattr;
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};
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struct pmap {
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@ -115,21 +116,22 @@ extern vm_offset_t virtual_end;
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extern uint64_t pmap_vhpt_base[];
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extern int pmap_vhpt_log2size;
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#define pmap_page_get_memattr(m) VM_MEMATTR_DEFAULT
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#define pmap_page_get_memattr(m) ((m)->md.memattr)
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#define pmap_page_is_mapped(m) (!TAILQ_EMPTY(&(m)->md.pv_list))
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#define pmap_page_set_memattr(m, ma) (void)0
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#define pmap_mapbios(pa, sz) pmap_mapdev(pa, sz)
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#define pmap_unmapbios(va, sz) pmap_unmapdev(va, sz)
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vm_offset_t pmap_steal_memory(vm_size_t);
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vm_offset_t pmap_alloc_vhpt(void);
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void pmap_bootstrap(void);
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void pmap_kenter(vm_offset_t va, vm_offset_t pa);
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vm_paddr_t pmap_kextract(vm_offset_t va);
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void pmap_kremove(vm_offset_t);
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void *pmap_mapdev(vm_paddr_t, vm_size_t);
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void pmap_unmapdev(vm_offset_t, vm_size_t);
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void pmap_page_set_memattr(vm_page_t, vm_memattr_t);
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vm_offset_t pmap_page_to_va(vm_page_t);
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vm_offset_t pmap_steal_memory(vm_size_t);
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struct pmap *pmap_switch(struct pmap *pmap);
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void pmap_unmapdev(vm_offset_t, vm_size_t);
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#endif /* _KERNEL */
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@ -41,18 +41,20 @@
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*/
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struct sf_buf;
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static __inline vm_offset_t
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sf_buf_kva(struct sf_buf *sf)
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{
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return (IA64_PHYS_TO_RR7(VM_PAGE_TO_PHYS((vm_page_t)sf)));
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}
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static __inline vm_page_t
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sf_buf_page(struct sf_buf *sf)
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{
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return ((vm_page_t)sf);
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}
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static __inline vm_offset_t
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sf_buf_kva(struct sf_buf *sf)
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{
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vm_page_t m;
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m = sf_buf_page(sf);
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return (pmap_page_to_va(m));
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}
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#endif /* !_MACHINE_SF_BUF_H_ */
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