Don't enable RX and TX before their initial configuration is done, i. e.

after setting up interrupt moderation but before turning interrupts on.
This matches what Realtek's r8168 Linux driver does as of version 8.039.00
and fixes problems with certain incarnations of certain MAC revisions
like the interface requiring an extra up/down-cycle after boot to start
working or DMA configuration not being adhered to.

PR:		193743, 197535
MFC after:	1 week
This commit is contained in:
Marius Strobl 2015-04-09 21:35:44 +00:00
parent e4474f161b
commit 0f55f9d67b

View File

@ -3195,11 +3195,6 @@ re_init_locked(struct rl_softc *sc)
CSR_WRITE_4(sc, RL_MISC, CSR_READ_4(sc, RL_MISC) &
~0x00080000);
/*
* Enable transmit and receive.
*/
CSR_WRITE_1(sc, RL_COMMAND, RL_CMD_TX_ENB|RL_CMD_RX_ENB);
/*
* Set the initial TX configuration.
*/
@ -3226,6 +3221,11 @@ re_init_locked(struct rl_softc *sc)
CSR_WRITE_2(sc, RL_INTRMOD, 0x5100);
}
/*
* Enable transmit and receive.
*/
CSR_WRITE_1(sc, RL_COMMAND, RL_CMD_TX_ENB | RL_CMD_RX_ENB);
#ifdef DEVICE_POLLING
/*
* Disable interrupts if we are polling.
@ -3249,10 +3249,6 @@ re_init_locked(struct rl_softc *sc)
/* Start RX/TX process. */
CSR_WRITE_4(sc, RL_MISSEDPKT, 0);
#ifdef notdef
/* Enable receiver and transmitter. */
CSR_WRITE_1(sc, RL_COMMAND, RL_CMD_TX_ENB|RL_CMD_RX_ENB);
#endif
/*
* Initialize the timer interrupt register so that