bhyve: intercept AMD SVM instructions.
Intercept and report #UD to VM on SVM/AMD in case VM tried to execute an SVM instruction. Otherwise, SVM allows execution of them, and instructions operate on host physical addresses despite being executed in guest mode. Reported by: Maxime Villard <max@m00nbsd.net> admbug: 972 CVE: CVE-2020-7467 Reviewed by: grehan, markj Differential revision: https://reviews.freebsd.org/D26313
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@ -488,10 +488,23 @@ vmcb_init(struct svm_softc *sc, int vcpu, uint64_t iopm_base_pa,
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svm_enable_intercept(sc, vcpu, VMCB_CTRL1_INTCPT, VMCB_INTCPT_SHUTDOWN);
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svm_enable_intercept(sc, vcpu, VMCB_CTRL1_INTCPT,
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VMCB_INTCPT_FERR_FREEZE);
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svm_enable_intercept(sc, vcpu, VMCB_CTRL1_INTCPT, VMCB_INTCPT_INVD);
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svm_enable_intercept(sc, vcpu, VMCB_CTRL1_INTCPT, VMCB_INTCPT_INVLPGA);
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svm_enable_intercept(sc, vcpu, VMCB_CTRL2_INTCPT, VMCB_INTCPT_MONITOR);
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svm_enable_intercept(sc, vcpu, VMCB_CTRL2_INTCPT, VMCB_INTCPT_MWAIT);
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/*
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* Intercept SVM instructions since AMD enables them in guests otherwise.
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* Non-intercepted VMMCALL causes #UD, skip it.
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*/
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svm_enable_intercept(sc, vcpu, VMCB_CTRL2_INTCPT, VMCB_INTCPT_VMLOAD);
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svm_enable_intercept(sc, vcpu, VMCB_CTRL2_INTCPT, VMCB_INTCPT_VMSAVE);
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svm_enable_intercept(sc, vcpu, VMCB_CTRL2_INTCPT, VMCB_INTCPT_STGI);
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svm_enable_intercept(sc, vcpu, VMCB_CTRL2_INTCPT, VMCB_INTCPT_CLGI);
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svm_enable_intercept(sc, vcpu, VMCB_CTRL2_INTCPT, VMCB_INTCPT_SKINIT);
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svm_enable_intercept(sc, vcpu, VMCB_CTRL2_INTCPT, VMCB_INTCPT_ICEBP);
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/*
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* From section "Canonicalization and Consistency Checks" in APMv2
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* the VMRUN intercept bit must be set to pass the consistency check.
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@ -1236,43 +1249,45 @@ emulate_rdmsr(struct svm_softc *sc, int vcpu, u_int num, bool *retu)
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static const char *
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exit_reason_to_str(uint64_t reason)
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{
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int i;
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static char reasonbuf[32];
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static const struct {
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int reason;
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const char *str;
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} reasons[] = {
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{ .reason = VMCB_EXIT_INVALID, .str = "invalvmcb" },
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{ .reason = VMCB_EXIT_SHUTDOWN, .str = "shutdown" },
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{ .reason = VMCB_EXIT_NPF, .str = "nptfault" },
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{ .reason = VMCB_EXIT_PAUSE, .str = "pause" },
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{ .reason = VMCB_EXIT_HLT, .str = "hlt" },
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{ .reason = VMCB_EXIT_CPUID, .str = "cpuid" },
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{ .reason = VMCB_EXIT_IO, .str = "inout" },
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{ .reason = VMCB_EXIT_MC, .str = "mchk" },
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{ .reason = VMCB_EXIT_INTR, .str = "extintr" },
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{ .reason = VMCB_EXIT_NMI, .str = "nmi" },
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{ .reason = VMCB_EXIT_VINTR, .str = "vintr" },
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{ .reason = VMCB_EXIT_MSR, .str = "msr" },
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{ .reason = VMCB_EXIT_IRET, .str = "iret" },
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{ .reason = VMCB_EXIT_MONITOR, .str = "monitor" },
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{ .reason = VMCB_EXIT_MWAIT, .str = "mwait" },
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{ .reason = VMCB_EXIT_VMRUN, .str = "vmrun" },
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{ .reason = VMCB_EXIT_VMMCALL, .str = "vmmcall" },
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{ .reason = VMCB_EXIT_VMLOAD, .str = "vmload" },
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{ .reason = VMCB_EXIT_VMSAVE, .str = "vmsave" },
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{ .reason = VMCB_EXIT_STGI, .str = "stgi" },
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{ .reason = VMCB_EXIT_CLGI, .str = "clgi" },
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{ .reason = VMCB_EXIT_SKINIT, .str = "skinit" },
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{ .reason = VMCB_EXIT_ICEBP, .str = "icebp" },
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{ .reason = VMCB_EXIT_INVD, .str = "invd" },
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{ .reason = VMCB_EXIT_INVLPGA, .str = "invlpga" },
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};
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switch (reason) {
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case VMCB_EXIT_INVALID:
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return ("invalvmcb");
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case VMCB_EXIT_SHUTDOWN:
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return ("shutdown");
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case VMCB_EXIT_NPF:
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return ("nptfault");
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case VMCB_EXIT_PAUSE:
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return ("pause");
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case VMCB_EXIT_HLT:
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return ("hlt");
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case VMCB_EXIT_CPUID:
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return ("cpuid");
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case VMCB_EXIT_IO:
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return ("inout");
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case VMCB_EXIT_MC:
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return ("mchk");
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case VMCB_EXIT_INTR:
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return ("extintr");
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case VMCB_EXIT_NMI:
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return ("nmi");
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case VMCB_EXIT_VINTR:
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return ("vintr");
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case VMCB_EXIT_MSR:
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return ("msr");
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case VMCB_EXIT_IRET:
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return ("iret");
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case VMCB_EXIT_MONITOR:
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return ("monitor");
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case VMCB_EXIT_MWAIT:
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return ("mwait");
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default:
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snprintf(reasonbuf, sizeof(reasonbuf), "%#lx", reason);
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return (reasonbuf);
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for (i = 0; i < nitems(reasons); i++) {
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if (reasons[i].reason == reason)
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return (reasons[i].str);
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}
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snprintf(reasonbuf, sizeof(reasonbuf), "%#lx", reason);
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return (reasonbuf);
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}
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#endif /* KTR */
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@ -1524,6 +1539,20 @@ svm_vmexit(struct svm_softc *svm_sc, int vcpu, struct vm_exit *vmexit)
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case VMCB_EXIT_MWAIT:
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vmexit->exitcode = VM_EXITCODE_MWAIT;
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break;
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case VMCB_EXIT_SHUTDOWN:
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case VMCB_EXIT_VMRUN:
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case VMCB_EXIT_VMMCALL:
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case VMCB_EXIT_VMLOAD:
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case VMCB_EXIT_VMSAVE:
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case VMCB_EXIT_STGI:
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case VMCB_EXIT_CLGI:
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case VMCB_EXIT_SKINIT:
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case VMCB_EXIT_ICEBP:
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case VMCB_EXIT_INVD:
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case VMCB_EXIT_INVLPGA:
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vm_inject_ud(svm_sc->vm, vcpu);
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handled = 1;
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break;
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default:
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vmm_stat_incr(svm_sc->vm, vcpu, VMEXIT_UNKNOWN, 1);
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break;
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@ -71,8 +71,8 @@
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#define VMCB_INTCPT_INVD BIT(22)
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#define VMCB_INTCPT_PAUSE BIT(23)
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#define VMCB_INTCPT_HLT BIT(24)
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#define VMCB_INTCPT_INVPG BIT(25)
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#define VMCB_INTCPT_INVPGA BIT(26)
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#define VMCB_INTCPT_INVLPG BIT(25)
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#define VMCB_INTCPT_INVLPGA BIT(26)
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#define VMCB_INTCPT_IO BIT(27)
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#define VMCB_INTCPT_MSR BIT(28)
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#define VMCB_INTCPT_TASK_SWITCH BIT(29)
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@ -134,12 +134,21 @@
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#define VMCB_EXIT_POPF 0x71
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#define VMCB_EXIT_CPUID 0x72
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#define VMCB_EXIT_IRET 0x74
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#define VMCB_EXIT_INVD 0x76
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#define VMCB_EXIT_PAUSE 0x77
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#define VMCB_EXIT_HLT 0x78
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#define VMCB_EXIT_INVLPGA 0x7A
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#define VMCB_EXIT_IO 0x7B
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#define VMCB_EXIT_MSR 0x7C
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#define VMCB_EXIT_SHUTDOWN 0x7F
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#define VMCB_EXIT_VMRUN 0x80
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#define VMCB_EXIT_VMMCALL 0x81
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#define VMCB_EXIT_VMLOAD 0x82
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#define VMCB_EXIT_VMSAVE 0x83
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#define VMCB_EXIT_STGI 0x84
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#define VMCB_EXIT_CLGI 0x85
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#define VMCB_EXIT_SKINIT 0x86
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#define VMCB_EXIT_ICEBP 0x88
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#define VMCB_EXIT_MONITOR 0x8A
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#define VMCB_EXIT_MWAIT 0x8B
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#define VMCB_EXIT_NPF 0x400
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