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Use proper fields to check for interrupt trigger mode.

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This commit is contained in:
Alexander Kabaev 2017-04-13 14:23:27 +00:00
parent d6a0af236d
commit 11011dfc94
2 changed files with 4 additions and 4 deletions
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2
sys/arm/arm/gic.c
View File

@ -987,7 +987,7 @@ arm_gic_setup_intr(device_t dev, struct intr_irqsrc *isrc,
gi->gi_trig = trig;
/* Edge triggered interrupts need an early EOI sent */
if (gi->gi_pol == INTR_TRIGGER_EDGE)
if (gi->gi_trig == INTR_TRIGGER_EDGE)
gi->gi_flags |= GI_FLAG_EARLY_EOI;
}

6
sys/arm64/arm64/gic_v3.c
View File

@ -437,11 +437,11 @@ arm_gic_v3_intr(void *arg)
#endif
} else if (active_irq >= GIC_FIRST_PPI &&
active_irq <= GIC_LAST_SPI) {
if (gi->gi_pol == INTR_TRIGGER_EDGE)
if (gi->gi_trig == INTR_TRIGGER_EDGE)
gic_icc_write(EOIR1, gi->gi_irq);
if (intr_isrc_dispatch(&gi->gi_isrc, tf) != 0) {
if (gi->gi_pol != INTR_TRIGGER_EDGE)
if (gi->gi_trig != INTR_TRIGGER_EDGE)
gic_icc_write(EOIR1, gi->gi_irq);
gic_v3_disable_intr(sc->dev, &gi->gi_isrc);
device_printf(sc->dev,
@ -781,7 +781,7 @@ gic_v3_post_filter(device_t dev, struct intr_irqsrc *isrc)
{
struct gic_v3_irqsrc *gi = (struct gic_v3_irqsrc *)isrc;
if (gi->gi_pol == INTR_TRIGGER_EDGE)
if (gi->gi_trig == INTR_TRIGGER_EDGE)
return;
gic_icc_write(EOIR1, gi->gi_irq);