The TLB1 TSIZE is a multiple of 4, not 2, so shift 2 bits, not 1.
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@ -2817,7 +2817,7 @@ mmu_booke_mapdev_attr(mmu_t mmu, vm_paddr_t pa, vm_size_t size, vm_memattr_t ma)
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sz = 1 << (ilog2(size) & ~1);
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if (va % sz != 0) {
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do {
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sz >>= 1;
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sz >>= 2;
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} while (va % sz != 0);
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}
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if (bootverbose)
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