The TLB1 TSIZE is a multiple of 4, not 2, so shift 2 bits, not 1.

This commit is contained in:
Justin Hibbits 2015-08-29 06:52:14 +00:00
parent 8f1111cf0b
commit 12d44566ae

View File

@ -2817,7 +2817,7 @@ mmu_booke_mapdev_attr(mmu_t mmu, vm_paddr_t pa, vm_size_t size, vm_memattr_t ma)
sz = 1 << (ilog2(size) & ~1);
if (va % sz != 0) {
do {
sz >>= 1;
sz >>= 2;
} while (va % sz != 0);
}
if (bootverbose)