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With the advent of interrupt remapping, Intel has repurposed bit 11

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(now: Interrupt_Index[15]) and assigned the previously reserved bits
55:48 (Interrupt_Index[14:0] goes into 63:49 while Destination Field
used 63:56 and bit 48 now is Interrupt_Format) in the IO redirection
tables (see the VT-d specification, "5.1.5.1 I/OxAPIC Programming").
Thus, when not using interrupt remapping, ensure that all previously
reserved bits in the high part of the RTEs are zero instead of doing
a read-modify-write for their Destination Field bits only.
Otherwise, on machines based on Apollo Lake and its derivatives such
as Denverton, typically some of the previously preserved bits remain
set after boot when not employing interrupt remapping. The result is
that INTx interrupts are not getting delivered.
Note: With an AMD IOMMU, interrupt remapping apparently bypasses the
IO APIC altogether.

Submitted by:	loos (modulo comment)
Reviewed by:	jhb (modulo comment)
This commit is contained in:
Marius Strobl 2017-12-28 21:46:09 +00:00
parent 9a1bf495b1
commit 15f0034553
1 changed files with 7 additions and 6 deletions
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13
sys/x86/x86/io_apic.c
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@ -308,7 +308,7 @@ static void
ioapic_program_intpin(struct ioapic_intsrc *intpin)
{
struct ioapic *io = (struct ioapic *)intpin->io_intsrc.is_pic;
uint32_t low, high, value;
uint32_t low, high;
#ifdef ACPI_DMAR
int error;
#endif
@ -354,7 +354,11 @@ ioapic_program_intpin(struct ioapic_intsrc *intpin)
}
#endif
/* Set the destination. */
/*
* Set the destination. Note that with Intel interrupt remapping,
* the previously reserved bits 55:48 now have a purpose so ensure
* these are zero.
*/
low = IOART_DESTPHY;
high = intpin->io_cpu << APIC_ID_SHIFT;
@ -392,10 +396,7 @@ ioapic_program_intpin(struct ioapic_intsrc *intpin)
}
/* Write the values to the APIC. */
value = ioapic_read(io->io_addr, IOAPIC_REDTBL_HI(intpin->io_intpin));
value &= ~IOART_DEST;
value |= high;
ioapic_write(io->io_addr, IOAPIC_REDTBL_HI(intpin->io_intpin), value);
ioapic_write(io->io_addr, IOAPIC_REDTBL_HI(intpin->io_intpin), high);
intpin->io_lowreg = low;
ioapic_write(io->io_addr, IOAPIC_REDTBL_LO(intpin->io_intpin), low);
}