Remove some duplicate code from the AR9285 TX power configuration path.
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39c60b6cff
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@ -246,6 +246,8 @@ extern void ar5416InitChainMasks(struct ath_hal *ah);
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extern void ar5416RestoreChainMask(struct ath_hal *ah);
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extern void ar5416EepromSetAddac(struct ath_hal *ah,
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const struct ieee80211_channel *chan);
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extern uint16_t ar5416GetMaxEdgePower(uint16_t freq,
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CAL_CTL_EDGES *pRdEdgesPower, HAL_BOOL is2GHz);
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/* TX power setup related routines in ar5416_reset.c */
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extern void ar5416GetGainBoundariesAndPdadcs(struct ath_hal *ah,
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@ -61,8 +61,6 @@ static HAL_BOOL ar5416SetPowerPerRateTable(struct ath_hal *ah,
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uint16_t cfgCtl, uint16_t AntennaReduction,
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uint16_t twiceMaxRegulatoryPower,
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uint16_t powerLimit);
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static uint16_t ar5416GetMaxEdgePower(uint16_t freq,
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CAL_CTL_EDGES *pRdEdgesPower, HAL_BOOL is2GHz);
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static void ar5416Set11nRegs(struct ath_hal *ah, const struct ieee80211_channel *chan);
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/*
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@ -1779,7 +1777,7 @@ fbin2freq(uint8_t fbin, HAL_BOOL is2GHz)
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*
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* Find the maximum conformance test limit for the given channel and CTL info
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*/
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static uint16_t
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uint16_t
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ar5416GetMaxEdgePower(uint16_t freq, CAL_CTL_EDGES *pRdEdgesPower, HAL_BOOL is2GHz)
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{
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uint16_t twiceMaxEdgePower = AR5416_MAX_RATE_POWER;
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@ -65,7 +65,6 @@ static void ar9285GetGainBoundariesAndPdadcs(struct ath_hal *ah,
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uint16_t tPdGainOverlap, int16_t *pMinCalPower,
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uint16_t * pPdGainBoundaries, uint8_t * pPDADCValues,
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uint16_t numXpdGains);
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static uint16_t ar9285GetMaxEdgePower(uint16_t, CAL_CTL_EDGES *);
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HAL_BOOL
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ar9285SetTransmitPower(struct ath_hal *ah,
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@ -558,9 +557,9 @@ ar9285SetPowerPerRateTable(struct ath_hal *ah, struct ar5416eeprom_4k *pEepData,
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(((cfgCtl & ~CTL_MODE_M) | (pCtlMode[ctlMode] & CTL_MODE_M)) ==
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((pEepData->ctlIndex[i] & CTL_MODE_M) | SD_NO_CTL))) {
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rep = &(pEepData->ctlData[i]);
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twiceMinEdgePower = ar9285GetMaxEdgePower(freq,
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twiceMinEdgePower = ar5416GetMaxEdgePower(freq,
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rep->ctlEdges[
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owl_get_ntxchains(AH5416(ah)->ah_tx_chainmask) - 1]);
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owl_get_ntxchains(AH5416(ah)->ah_tx_chainmask) - 1], AH_TRUE);
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if ((cfgCtl & ~CTL_MODE_M) == SD_NO_CTL) {
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/* Find the minimum of all CTL edge powers that apply to this channel */
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twiceMaxEdgePower = AH_MIN(twiceMaxEdgePower, twiceMinEdgePower);
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@ -643,58 +642,6 @@ ar9285SetPowerPerRateTable(struct ath_hal *ah, struct ar5416eeprom_4k *pEepData,
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#undef N
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}
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/**************************************************************************
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* fbin2freq
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*
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* Get channel value from binary representation held in eeprom
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* RETURNS: the frequency in MHz
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*/
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static uint16_t
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fbin2freq(uint8_t fbin)
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{
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/*
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* Reserved value 0xFF provides an empty definition both as
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* an fbin and as a frequency - do not convert
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*/
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if (fbin == AR5416_BCHAN_UNUSED) {
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return fbin;
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}
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return (uint16_t)(2300 + fbin);
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}
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/*
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* XXX almost the same as ar5416GetMaxEdgePower.
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*/
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static uint16_t
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ar9285GetMaxEdgePower(uint16_t freq, CAL_CTL_EDGES *pRdEdgesPower)
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{
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uint16_t twiceMaxEdgePower = AR5416_MAX_RATE_POWER;
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int i;
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/* Get the edge power */
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for (i = 0; (i < AR5416_NUM_BAND_EDGES) && (pRdEdgesPower[i].bChannel != AR5416_BCHAN_UNUSED) ; i++) {
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/*
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* If there's an exact channel match or an inband flag set
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* on the lower channel use the given rdEdgePower
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*/
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if (freq == fbin2freq(pRdEdgesPower[i].bChannel)) {
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twiceMaxEdgePower = MS(pRdEdgesPower[i].tPowerFlag, CAL_CTL_EDGES_POWER);
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break;
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} else if ((i > 0) && (freq < fbin2freq(pRdEdgesPower[i].bChannel))) {
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if (fbin2freq(pRdEdgesPower[i - 1].bChannel) < freq && (pRdEdgesPower[i - 1].tPowerFlag & CAL_CTL_EDGES_FLAG) != 0) {
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twiceMaxEdgePower = MS(pRdEdgesPower[i - 1].tPowerFlag, CAL_CTL_EDGES_POWER);
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}
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/* Leave loop - no more affecting edges possible in this monotonic increasing list */
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break;
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}
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}
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HALASSERT(twiceMaxEdgePower > 0);
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return twiceMaxEdgePower;
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}
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static HAL_BOOL
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ar9285SetPowerCalTable(struct ath_hal *ah, struct ar5416eeprom_4k *pEepData,
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const struct ieee80211_channel *chan, int16_t *pTxPowerIndexOffset)
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