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sfxge(4): support inner checksum offload on transmit

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Inner checksum offloads may be used only if firmware supports
these tunnels.

Sponsored by:   Solarflare Communications, Inc.
Differential Revision:  https://reviews.freebsd.org/D18102
This commit is contained in:
Andrew Rybchenko 2018-11-23 13:12:04 +00:00
parent 831f467904
commit 18b602f954
3 changed files with 37 additions and 7 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

27
sys/dev/sfxge/common/ef10_tx.c
View File

@ -87,12 +87,16 @@ efx_mcdi_init_txq(
MCDI_IN_SET_DWORD(req, INIT_TXQ_IN_LABEL, label);
MCDI_IN_SET_DWORD(req, INIT_TXQ_IN_INSTANCE, instance);
MCDI_IN_POPULATE_DWORD_7(req, INIT_TXQ_IN_FLAGS,
MCDI_IN_POPULATE_DWORD_9(req, INIT_TXQ_IN_FLAGS,
INIT_TXQ_IN_FLAG_BUFF_MODE, 0,
INIT_TXQ_IN_FLAG_IP_CSUM_DIS,
(flags & EFX_TXQ_CKSUM_IPV4) ? 0 : 1,
INIT_TXQ_IN_FLAG_TCP_CSUM_DIS,
(flags & EFX_TXQ_CKSUM_TCPUDP) ? 0 : 1,
INIT_TXQ_EXT_IN_FLAG_INNER_IP_CSUM_EN,
(flags & EFX_TXQ_CKSUM_INNER_IPV4) ? 1 : 0,
INIT_TXQ_EXT_IN_FLAG_INNER_TCP_CSUM_EN,
(flags & EFX_TXQ_CKSUM_INNER_TCPUDP) ? 1 : 0,
INIT_TXQ_EXT_IN_FLAG_TSOV2_EN, (flags & EFX_TXQ_FATSOV2) ? 1 : 0,
INIT_TXQ_IN_FLAG_TCP_UDP_ONLY, 0,
INIT_TXQ_IN_CRC_MODE, 0,
@ -197,14 +201,23 @@ ef10_tx_qcreate(
__in efx_txq_t *etp,
__out unsigned int *addedp)
{
efx_nic_cfg_t *encp = &enp->en_nic_cfg;
uint16_t inner_csum;
efx_qword_t desc;
efx_rc_t rc;
_NOTE(ARGUNUSED(id))
inner_csum = EFX_TXQ_CKSUM_INNER_IPV4 | EFX_TXQ_CKSUM_INNER_TCPUDP;
if (((flags & inner_csum) != 0) &&
(encp->enc_tunnel_encapsulations_supported == 0)) {
rc = EINVAL;
goto fail1;
}
if ((rc = efx_mcdi_init_txq(enp, n, eep->ee_index, label, index, flags,
esmp)) != 0)
goto fail1;
goto fail2;
/*
* A previous user of this TX queue may have written a descriptor to the
@ -215,19 +228,25 @@ ef10_tx_qcreate(
* a no-op TX option descriptor. See bug29981 for details.
*/
*addedp = 1;
EFX_POPULATE_QWORD_4(desc,
EFX_POPULATE_QWORD_6(desc,
ESF_DZ_TX_DESC_IS_OPT, 1,
ESF_DZ_TX_OPTION_TYPE, ESE_DZ_TX_OPTION_DESC_CRC_CSUM,
ESF_DZ_TX_OPTION_UDP_TCP_CSUM,
(flags & EFX_TXQ_CKSUM_TCPUDP) ? 1 : 0,
ESF_DZ_TX_OPTION_IP_CSUM,
(flags & EFX_TXQ_CKSUM_IPV4) ? 1 : 0);
(flags & EFX_TXQ_CKSUM_IPV4) ? 1 : 0,
ESF_DZ_TX_OPTION_INNER_UDP_TCP_CSUM,
(flags & EFX_TXQ_CKSUM_INNER_TCPUDP) ? 1 : 0,
ESF_DZ_TX_OPTION_INNER_IP_CSUM,
(flags & EFX_TXQ_CKSUM_INNER_IPV4) ? 1 : 0);
EFSYS_MEM_WRITEQ(etp->et_esmp, 0, &desc);
ef10_tx_qpush(etp, *addedp, 0);
return (0);
fail2:
EFSYS_PROBE(fail2);
fail1:
EFSYS_PROBE1(fail1, efx_rc_t, rc);

8
sys/dev/sfxge/common/efx.h
View File

@ -2111,9 +2111,11 @@ efx_tx_fini(
#define EFX_TXQ_MAX_BUFS 8 /* Maximum independent of EFX_BUG35388_WORKAROUND. */
#define EFX_TXQ_CKSUM_IPV4 0x0001
#define EFX_TXQ_CKSUM_TCPUDP 0x0002
#define EFX_TXQ_FATSOV2 0x0004
#define EFX_TXQ_CKSUM_IPV4 0x0001
#define EFX_TXQ_CKSUM_TCPUDP 0x0002
#define EFX_TXQ_FATSOV2 0x0004
#define EFX_TXQ_CKSUM_INNER_IPV4 0x0008
#define EFX_TXQ_CKSUM_INNER_TCPUDP 0x0010
extern __checkReturn efx_rc_t
efx_tx_qcreate(

9
sys/dev/sfxge/common/efx_tx.c
View File

@ -905,6 +905,7 @@ siena_tx_qcreate(
efx_nic_cfg_t *encp = &(enp->en_nic_cfg);
efx_oword_t oword;
uint32_t size;
uint16_t inner_csum;
efx_rc_t rc;
_NOTE(ARGUNUSED(esmp))
@ -934,6 +935,12 @@ siena_tx_qcreate(
goto fail3;
}
inner_csum = EFX_TXQ_CKSUM_INNER_IPV4 | EFX_TXQ_CKSUM_INNER_TCPUDP;
if ((flags & inner_csum) != 0) {
rc = EINVAL;
goto fail4;
}
/* Set up the new descriptor queue */
*addedp = 0;
@ -956,6 +963,8 @@ siena_tx_qcreate(
return (0);
fail4:
EFSYS_PROBE(fail4);
fail3:
EFSYS_PROBE(fail3);
fail2: