Mask out SRR1 bits that aren't exported to the MSR.
This appears to fix a strange condition with X on 32-bit PowerBooks I observed, caused by one of these bits getting set in the mcontext, but not set in the thread, which may be a symptom of another problem, more difficult to diagnose. Since these bits aren't exported anyway, this change makes it more explicit that the bits aren't MSR-related in SRR1. MFC after: 3 weeks
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@ -88,15 +88,17 @@
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#define PSL_KERNSET (PSL_CE | PSL_ME | PSL_EE)
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#elif defined(BOOKE_PPC4XX)
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#define PSL_KERNSET (PSL_CE | PSL_ME | PSL_EE | PSL_FP)
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#define PSL_SRR1_MASK 0x00000000UL /* No mask on Book-E */
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#elif defined(AIM)
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#ifdef __powerpc64__
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#define PSL_KERNSET (PSL_SF | PSL_EE | PSL_ME | PSL_IR | PSL_DR | PSL_RI)
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#else
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#define PSL_KERNSET (PSL_EE | PSL_ME | PSL_IR | PSL_DR | PSL_RI)
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#endif
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#define PSL_SRR1_MASK 0x78300000UL /* Bits 1-4, 10-15 (ppc32), 33-36, 42-47 (ppc64) */
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#endif
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#define PSL_USERSET (PSL_KERNSET | PSL_PR)
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#define PSL_USERSTATIC ~(PSL_VEC | PSL_FP | PSL_FE0 | PSL_FE1)
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#define PSL_USERSTATIC (~(PSL_VEC | PSL_FP | PSL_FE0 | PSL_FE1) & ~PSL_SRR1_MASK)
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#endif /* _MACHINE_PSL_H_ */
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