Mask out SRR1 bits that aren't exported to the MSR.

This appears to fix a strange condition with X on 32-bit PowerBooks I observed,
caused by one of these bits getting set in the mcontext, but not set in the
thread, which may be a symptom of another problem, more difficult to diagnose.
Since these bits aren't exported anyway, this change makes it more explicit that
the bits aren't MSR-related in SRR1.

MFC after:	3 weeks
This commit is contained in:
Justin Hibbits 2014-03-21 04:45:57 +00:00
parent ca73017a2d
commit 196321d6b0

View File

@ -88,15 +88,17 @@
#define PSL_KERNSET (PSL_CE | PSL_ME | PSL_EE)
#elif defined(BOOKE_PPC4XX)
#define PSL_KERNSET (PSL_CE | PSL_ME | PSL_EE | PSL_FP)
#define PSL_SRR1_MASK 0x00000000UL /* No mask on Book-E */
#elif defined(AIM)
#ifdef __powerpc64__
#define PSL_KERNSET (PSL_SF | PSL_EE | PSL_ME | PSL_IR | PSL_DR | PSL_RI)
#else
#define PSL_KERNSET (PSL_EE | PSL_ME | PSL_IR | PSL_DR | PSL_RI)
#endif
#define PSL_SRR1_MASK 0x78300000UL /* Bits 1-4, 10-15 (ppc32), 33-36, 42-47 (ppc64) */
#endif
#define PSL_USERSET (PSL_KERNSET | PSL_PR)
#define PSL_USERSTATIC ~(PSL_VEC | PSL_FP | PSL_FE0 | PSL_FE1)
#define PSL_USERSTATIC (~(PSL_VEC | PSL_FP | PSL_FE0 | PSL_FE1) & ~PSL_SRR1_MASK)
#endif /* _MACHINE_PSL_H_ */