PowerPC atomic operation functions.
Some of these are dependant on an inline function (powerpc_mb()) that is yet to come. Reviewed by: obrien
This commit is contained in:
Benno Rice
parent
6a76a4e1af
commit
199a2415c0
@ -1,4 +1,5 @@
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/*-
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* Copyright (c) 2001 Benno Rice
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* Copyright (c) 2001 David E. O'Brien
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* Copyright (c) 1998 Doug Rabson
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* All rights reserved.
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@ -30,6 +31,8 @@
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#ifndef _MACHINE_ATOMIC_H_
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#define _MACHINE_ATOMIC_H_
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#include <machine/cpufunc.h>
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/*
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* Various simple arithmetic on memory which is atomic in the presence
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* of interrupts and SMP safe.
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@ -45,138 +48,284 @@ void atomic_clear_16(volatile u_int16_t *, u_int16_t);
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void atomic_add_16(volatile u_int16_t *, u_int16_t);
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void atomic_subtract_16(volatile u_int16_t *, u_int16_t);
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static __inline void atomic_set_32(volatile u_int32_t *p, u_int32_t v)
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static __inline void
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atomic_set_32(volatile u_int32_t *p, u_int32_t v)
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{
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u_int32_t temp;
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__asm __volatile (
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: "=&r" (temp), "=m" (*p)
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: "m" (*p), "r" (v)
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"1:\tlwarx %0, 0, %2\n\t" /* load old value */
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"or %0, %0, %3\n\t" /* calculate new value */
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"stwcx. %0, 0, %1\n\t" /* attempt to store */
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"bne- 1\n\t" /* spin if failed */
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"eieio\n" /* drain to memory */
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: "=&r" (temp), "=r" (*p)
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: "r" (*p), "r" (v)
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: "memory");
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}
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static __inline void atomic_clear_32(volatile u_int32_t *p, u_int32_t v)
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static __inline void
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atomic_clear_32(volatile u_int32_t *p, u_int32_t v)
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{
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u_int32_t temp;
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__asm __volatile (
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: "=&r" (temp), "=m" (*p)
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: "m" (*p), "r" (v)
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"1:\tlwarx %0, 0, %2\n\t" /* load old value */
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"andc %0, %0, %3\n\t" /* calculate new value */
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"stwcx. %0, 0, %1\n\t" /* attempt to store */
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"bne- 1\n\t" /* spin if failed */
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"eieio\n" /* drain to memory */
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: "=&r" (temp), "=r" (*p)
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: "r" (*p), "r" (v)
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: "memory");
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}
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static __inline void atomic_add_32(volatile u_int32_t *p, u_int32_t v)
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static __inline void
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atomic_add_32(volatile u_int32_t *p, u_int32_t v)
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{
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u_int32_t temp;
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__asm __volatile (
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: "=&r" (temp), "=m" (*p)
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: "m" (*p), "r" (v)
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"1:\tlwarx %0, 0, %2\n\t" /* load old value */
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"add %0, %0, %3\n\t" /* calculate new value */
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"stwcx. %0, 0, %1\n\t" /* attempt to store */
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"bne- 1\n\t" /* spin if failed */
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"eieio\n" /* Old McDonald had a farm */
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: "=&r" (temp), "=r" (*p)
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: "r" (*p), "r" (v)
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: "memory");
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}
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static __inline void atomic_subtract_32(volatile u_int32_t *p, u_int32_t v)
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static __inline void
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atomic_subtract_32(volatile u_int32_t *p, u_int32_t v)
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{
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u_int32_t temp;
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__asm __volatile (
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: "=&r" (temp), "=m" (*p)
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: "m" (*p), "r" (v)
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"1:\tlwarx %0, 0, %2\n\t" /* load old value */
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"sub %0, %3, %0\n\t" /* calculate new value */
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"stwcx. %0, 0, %1\n\t" /* attempt to store */
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"bne- 1\n\t" /* spin if failed */
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"eieio\n" /* drain to memory */
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: "=&r" (temp), "=r" (*p)
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: "r" (*p), "r" (v)
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: "memory");
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}
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static __inline u_int32_t atomic_readandclear_32(volatile u_int32_t *addr)
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static __inline u_int32_t
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atomic_readandclear_32(volatile u_int32_t *addr)
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{
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u_int32_t result,temp;
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__asm __volatile (
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: "=&r"(result), "=&r"(temp), "=m" (*addr)
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: "m"(*addr)
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"\teieio\n" /* memory barrier */
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"1:\tlwarx %0, 0, %3\n\t" /* load old value */
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"li %1, 0\n\t" /* load new value */
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"stwcx. %1, 0, %2\n\t" /* attempt to store */
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"bne- 1\n\t" /* spin if failed */
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"eieio\n" /* drain to memory */
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: "=&r"(result), "=&r"(temp), "=r" (*addr)
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: "r"(*addr)
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: "memory");
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return result;
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}
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static __inline void atomic_set_64(volatile u_int64_t *p, u_int64_t v)
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#if 0
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/*
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* So far I haven't found a way to implement atomic 64-bit ops on the
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* 32-bit PowerPC without involving major headaches. If anyone has
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* any ideas, please let me know. =)
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* - benno@FreeBSD.org
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*/
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static __inline void
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atomic_set_64(volatile u_int64_t *p, u_int64_t v)
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{
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u_int64_t temp;
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__asm __volatile (
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: "=&r" (temp), "=m" (*p)
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: "m" (*p), "r" (v)
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: "=&r" (temp), "=r" (*p)
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: "r" (*p), "r" (v)
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: "memory");
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}
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static __inline void atomic_clear_64(volatile u_int64_t *p, u_int64_t v)
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static __inline void
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atomic_clear_64(volatile u_int64_t *p, u_int64_t v)
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{
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u_int64_t temp;
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__asm __volatile (
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: "=&r" (temp), "=m" (*p)
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: "m" (*p), "r" (v)
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: "=&r" (temp), "=r" (*p)
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: "r" (*p), "r" (v)
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: "memory");
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}
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static __inline void atomic_add_64(volatile u_int64_t *p, u_int64_t v)
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static __inline void
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atomic_add_64(volatile u_int64_t *p, u_int64_t v)
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{
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u_int64_t temp;
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__asm __volatile (
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: "=&r" (temp), "=m" (*p)
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: "m" (*p), "r" (v)
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: "=&r" (temp), "=r" (*p)
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: "r" (*p), "r" (v)
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: "memory");
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}
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static __inline void atomic_subtract_64(volatile u_int64_t *p, u_int64_t v)
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static __inline void
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atomic_subtract_64(volatile u_int64_t *p, u_int64_t v)
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{
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u_int64_t temp;
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__asm __volatile (
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: "=&r" (temp), "=m" (*p)
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: "m" (*p), "r" (v)
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: "=&r" (temp), "=r" (*p)
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: "r" (*p), "r" (v)
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: "memory");
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}
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static __inline u_int64_t atomic_readandclear_64(volatile u_int64_t *addr)
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static __inline u_int64_t
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atomic_readandclear_64(volatile u_int64_t *addr)
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{
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u_int64_t result,temp;
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__asm __volatile (
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: "=&r"(result), "=&r"(temp), "=m" (*addr)
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: "m"(*addr)
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: "=&r"(result), "=&r"(temp), "=r" (*addr)
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: "r"(*addr)
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: "memory");
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return result;
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}
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#define atomic_set_char atomic_set_8
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#define atomic_clear_char atomic_clear_8
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#define atomic_add_char atomic_add_8
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#define atomic_subtract_char atomic_subtract_8
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#endif /* 0 */
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#define atomic_set_short atomic_set_16
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#define atomic_clear_short atomic_clear_16
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#define atomic_add_short atomic_add_16
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#define atomic_subtract_short atomic_subtract_16
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#define atomic_set_char atomic_set_8
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#define atomic_clear_char atomic_clear_8
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#define atomic_add_char atomic_add_8
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#define atomic_subtract_char atomic_subtract_8
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#define atomic_set_int atomic_set_32
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#define atomic_clear_int atomic_clear_32
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#define atomic_add_int atomic_add_32
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#define atomic_subtract_int atomic_subtract_32
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#define atomic_readandclear_int atomic_readandclear_32
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#define atomic_set_short atomic_set_16
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#define atomic_clear_short atomic_clear_16
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#define atomic_add_short atomic_add_16
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#define atomic_subtract_short atomic_subtract_16
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#define atomic_set_long atomic_set_32
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#define atomic_clear_long atomic_clear_32
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#define atomic_add_long atomic_add_32
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#define atomic_subtract_long atomic_subtract_32
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#define atomic_set_int atomic_set_32
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#define atomic_clear_int atomic_clear_32
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#define atomic_add_int atomic_add_32
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#define atomic_subtract_int atomic_subtract_32
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#define atomic_readandclear_int atomic_readandclear_32
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#define atomic_set_long atomic_set_32
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#define atomic_clear_long atomic_clear_32
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#define atomic_add_long atomic_add_32
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#define atomic_subtract_long atomic_subtract_32
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#define atomic_readandclear_long atomic_readandclear_32
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#define atomic_set_long_long atomic_set_64
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#define atomic_clear_long_long atomic_clear_64
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#define atomic_add_long_long atomic_add_64
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#if 0
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/* See above. */
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#define atomic_set_long_long atomic_set_64
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#define atomic_clear_long_long atomic_clear_64
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#define atomic_add_long_long atomic_add_64
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#define atomic_subtract_long_long atomic_subtract_64
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#define atomic_readandclear_long_long atomic_readandclear_64
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#endif /* 0 */
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#define ATOMIC_ACQ_REL(NAME, WIDTH, TYPE) \
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static __inline void \
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atomic_##NAME##_acq_##WIDTH(volatile u_int##WIDTH##_t *p, u_int##WIDTH##_t v) \
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{ \
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powerpc_mb(); \
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atomic_##NAME##_##WIDTH(p, v); \
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} \
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\
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static __inline void \
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atomic_##NAME##_rel_##WIDTH(volatile u_int##WIDTH##_t *p, u_int##WIDTH##_t v) \
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{ \
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atomic_##NAME##_##WIDTH(p, v); \
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powerpc_mb(); \
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} \
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\
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static __inline void \
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atomic_##NAME##_acq_##TYPE(volatile u_int##WIDTH##_t *p, u_int##WIDTH##_t v) \
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{ \
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powerpc_mb(); \
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atomic_##NAME##_##WIDTH(p, v); \
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} \
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\
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static __inline void \
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atomic_##NAME##_rel_##TYPE(volatile u_int##WIDTH##_t *p, u_int##WIDTH##_t v) \
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{ \
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atomic_##NAME##_##WIDTH(p, v); \
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powerpc_mb(); \
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}
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ATOMIC_ACQ_REL(set, 8, char)
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ATOMIC_ACQ_REL(clear, 8, char)
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ATOMIC_ACQ_REL(add, 8, char)
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ATOMIC_ACQ_REL(subtract, 8, char)
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ATOMIC_ACQ_REL(set, 16, short)
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ATOMIC_ACQ_REL(clear, 16, short)
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ATOMIC_ACQ_REL(add, 16, short)
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ATOMIC_ACQ_REL(subtract, 16, short)
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ATOMIC_ACQ_REL(set, 32, int)
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ATOMIC_ACQ_REL(clear, 32, int)
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ATOMIC_ACQ_REL(add, 32, int)
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ATOMIC_ACQ_REL(subtract, 32, int)
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#define atomic_set_acq_long atomic_set_acq_32
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#define atomic_set_rel_long atomic_set_rel_32
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#define atomic_clear_acq_long atomic_clear_acq_32
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#define atomic_clear_rel_long atomic_clear_rel_32
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#define atomic_add_acq_long atomic_add_acq_32
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#define atomic_add_rel_long atomic_add_rel_32
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#define atomic_subtract_acq_long atomic_subtract_acq_32
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#define atomic_subtract_rel_long atomic_subtract_rel_32
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#undef ATOMIC_ACQ_REL
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/*
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* We assume that a = b will do atomic loads and stores.
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*/
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#define ATOMIC_STORE_LOAD(TYPE, WIDTH) \
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static __inline u_##TYPE \
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atomic_load_acq_##WIDTH(volatile u_##TYPE *p) \
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{ \
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powerpc_mb(); \
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return (*p); \
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} \
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\
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static __inline void \
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atomic_store_rel_##WIDTH(volatile u_##TYPE *p, u_##TYPE v) \
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{ \
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*p = v; \
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powerpc_mb(); \
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} \
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static __inline u_##TYPE \
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atomic_load_acq_##TYPE(volatile u_##TYPE *p) \
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{ \
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powerpc_mb(); \
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return (*p); \
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} \
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\
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static __inline void \
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atomic_store_rel_##TYPE(volatile u_##TYPE *p, u_##TYPE v) \
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{ \
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*p = v; \
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powerpc_mb(); \
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}
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ATOMIC_STORE_LOAD(char, 8)
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ATOMIC_STORE_LOAD(short, 16)
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ATOMIC_STORE_LOAD(int, 32)
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#define atomic_load_acq_long atomic_load_acq_32
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#define atomic_store_rel_long atomic_store_rel_32
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#undef ATOMIC_STORE_LOAD
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/*
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* Atomically compare the value stored at *p with cmpval and if the
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* two values are equal, update the value of *p with newval. Returns
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@ -188,13 +337,23 @@ atomic_cmpset_32(volatile u_int32_t* p, u_int32_t cmpval, u_int32_t newval)
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u_int32_t ret;
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__asm __volatile (
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: "=&r" (ret), "=m" (*p)
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: "r" (cmpval), "r" (newval), "m" (*p)
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"1:\tlwarx %0, 0, %4\n\t" /* load old value */
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"cmplw 0, %2, %0\n\t" /* compare */
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"bne 2\n\t" /* exit if not equal */
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"mr %0, %3\n\t" /* value to store */
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"stwcx. %0, 0, %1\n\t" /* attempt to store */
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"bne- 1\n\t" /* spin if failed */
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"eieio\n" /* memory barrier */
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"2:\t\n"
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: "=&r" (ret), "=r" (*p)
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: "r" (cmpval), "r" (newval), "r" (*p)
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: "memory");
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return ret;
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}
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#if 0
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/*
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* Atomically compare the value stored at *p with cmpval and if the
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* two values are equal, update the value of *p with newval. Returns
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@ -206,23 +365,106 @@ atomic_cmpset_64(volatile u_int64_t* p, u_int64_t cmpval, u_int64_t newval)
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u_int64_t ret;
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__asm __volatile (
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: "=&r" (ret), "=m" (*p)
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: "r" (cmpval), "r" (newval), "m" (*p)
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: "=&r" (ret), "=r" (*p)
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: "r" (cmpval), "r" (newval), "r" (*p)
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: "memory");
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return ret;
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}
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#endif /* 0 */
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#define atomic_cmpset_int atomic_cmpset_32
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#define atomic_cmpset_long atomic_cmpset_32
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#if 0
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#define atomic_cmpset_long_long atomic_cmpset_64
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#endif /* 0 */
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static __inline int
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atomic_cmpset_ptr(volatile void *dst, void *exp, void *src)
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{
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return (
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atomic_cmpset_long((volatile u_long *)dst, (u_long)exp, (u_long)src));
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return (atomic_cmpset_32((volatile u_int32_t *)dst, (u_int32_t)exp,
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(u_int32_t)src));
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}
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static __inline u_int32_t
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atomic_cmpset_acq_32(volatile u_int32_t *p, u_int32_t cmpval, u_int32_t newval)
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{
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powerpc_mb();
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return (atomic_cmpset_32(p, cmpval, newval));
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}
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static __inline u_int32_t
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atomic_cmpset_rel_32(volatile u_int32_t *p, u_int32_t cmpval, u_int32_t newval)
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{
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int retval;
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retval = atomic_cmpset_32(p, cmpval, newval);
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powerpc_mb();
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return (retval);
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}
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#define atomic_cmpset_acq_int atomic_cmpset_acq_32
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#define atomic_cmpset_rel_int atomic_cmpset_rel_32
|
||||
#define atomic_cmpset_acq_long atomic_cmpset_acq_32
|
||||
#define atomic_cmpset_rel_long atomic_cmpset_rel_32
|
||||
|
||||
static __inline int
|
||||
atomic_cmpset_acq_ptr(volatile void *dst, void *exp, void *src)
|
||||
{
|
||||
|
||||
return (atomic_cmpset_acq_long((volatile u_int32_t *)dst,
|
||||
(u_int32_t)exp, (u_int32_t)src));
|
||||
}
|
||||
|
||||
static __inline int
|
||||
atomic_cmpset_rel_ptr(volatile void *dst, void *exp, void *src)
|
||||
{
|
||||
|
||||
return (atomic_cmpset_rel_long((volatile u_int32_t *)dst,
|
||||
(u_int32_t)exp, (u_int32_t)src));
|
||||
}
|
||||
|
||||
static __inline void *
|
||||
atomic_load_acq_ptr(volatile void *p)
|
||||
{
|
||||
|
||||
return (void *)atomic_load_acq_long((volatile u_int32_t *)p);
|
||||
}
|
||||
|
||||
static __inline void
|
||||
atomic_store_rel_ptr(volatile void *p, void *v)
|
||||
{
|
||||
|
||||
atomic_store_rel_long((volatile u_int32_t *)p, (u_int32_t)v);
|
||||
}
|
||||
|
||||
#define ATOMIC_PTR(NAME) \
|
||||
static __inline void \
|
||||
atomic_##NAME##_ptr(volatile void *p, uintptr_t v) \
|
||||
{ \
|
||||
atomic_##NAME##_long((volatile u_int32_t *)p, v); \
|
||||
} \
|
||||
\
|
||||
static __inline void \
|
||||
atomic_##NAME##_acq_ptr(volatile void *p, uintptr_t v) \
|
||||
{ \
|
||||
atomic_##NAME##_acq_long((volatile u_int32_t *)p, v); \
|
||||
} \
|
||||
\
|
||||
static __inline void \
|
||||
atomic_##NAME##_rel_ptr(volatile void *p, uintptr_t v) \
|
||||
{ \
|
||||
atomic_##NAME##_rel_long((volatile u_int32_t *)p, v); \
|
||||
}
|
||||
|
||||
ATOMIC_PTR(set)
|
||||
ATOMIC_PTR(clear)
|
||||
ATOMIC_PTR(add)
|
||||
ATOMIC_PTR(subtract)
|
||||
|
||||
#undef ATOMIC_PTR
|
||||
#endif /* ! _MACHINE_ATOMIC_H_ */
|
||||
|
||||
123
sys/powerpc/powerpc/atomic.S
Normal file
123
sys/powerpc/powerpc/atomic.S
Normal file
@ -0,0 +1,123 @@
|
||||
/*
|
||||
* Copyright (c) 2000, 2001 Benno Rice
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
|
||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
|
||||
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
* SUCH DAMAGE.
|
||||
*
|
||||
* $FreeBSD$
|
||||
*/
|
||||
|
||||
#include <machine/asm.h>
|
||||
|
||||
.text
|
||||
|
||||
ASENTRY(atomic_set_8)
|
||||
0: lwarx 0, 0, 3 /* load old value */
|
||||
slwi 4, 4, 24 /* shift the byte so it's in the right place */
|
||||
or 0, 0, 4 /* generate new value */
|
||||
stwcx. 0, 0, 3 /* attempt to store */
|
||||
bne- 0 /* loop if failed */
|
||||
eieio /* synchronise */
|
||||
sync
|
||||
blr /* return */
|
||||
|
||||
ASENTRY(atomic_clear_8)
|
||||
0: lwarx 0, 0, 3 /* load old value */
|
||||
slwi 4, 4, 24 /* shift the byte so it's in the right place */
|
||||
andc 0, 0, 4 /* generate new value */
|
||||
stwcx. 0, 0, 3 /* attempt to store */
|
||||
bne- 0 /* loop if failed */
|
||||
eieio /* synchronise */
|
||||
sync
|
||||
blr /* return */
|
||||
|
||||
ASENTRY(atomic_add_8)
|
||||
0: lwarx 9, 0, 3 /* load old value */
|
||||
srwi 0, 9, 24 /* byte alignment */
|
||||
add 0, 4, 0 /* calculate new value */
|
||||
slwi 0, 9, 24 /* byte alignment */
|
||||
clrlwi 9, 9, 8 /* clear the byte in the original word */
|
||||
or 9, 9, 0 /* copy back in to the original word */
|
||||
stwcx. 9, 0, 3 /* attempt to store */
|
||||
bne- 0 /* loop if failed */
|
||||
eieio /* synchronise */
|
||||
sync
|
||||
blr /* return */
|
||||
|
||||
ASENTRY(atomic_subtract_8)
|
||||
0: lwarx 9, 0, 3 /* load old value */
|
||||
srwi 0, 9, 24 /* byte alignment */
|
||||
subf 0, 4, 0 /* calculate new value */
|
||||
slwi 0, 9, 24 /* byte alignment */
|
||||
clrlwi 9, 9, 8 /* clear the byte in the original word */
|
||||
or 9, 9, 0 /* copy back in to the original word */
|
||||
stwcx. 9, 0, 3 /* attempt to store */
|
||||
bne- 0 /* loop if failed */
|
||||
eieio /* synchronise */
|
||||
sync
|
||||
blr /* return */
|
||||
|
||||
ASENTRY(atomic_set_16)
|
||||
0: lwarx 0, 0, 3 /* load old value */
|
||||
slwi 4, 4, 16 /* realign operand */
|
||||
or 0, 0, 4 /* calculate new value */
|
||||
stwcx. 0, 0, 3 /* attempt to store */
|
||||
bne- 0 /* loop if failed */
|
||||
eieio /* synchronise */
|
||||
sync
|
||||
blr /* return */
|
||||
|
||||
ASENTRY(atomic_clear_16)
|
||||
0: lwarx 0, 0, 3 /* load old value */
|
||||
slwi 4, 4, 16 /* realign operand */
|
||||
andc 0, 0, 4 /* calculate new value */
|
||||
stwcx. 0, 0, 3 /* attempt to store */
|
||||
bne- 0 /* loop if failed */
|
||||
eieio /* synchronise */
|
||||
sync
|
||||
blr /* return */
|
||||
|
||||
ASENTRY(atomic_add_16)
|
||||
0: lwarx 0, 0, 3 /* load old value */
|
||||
srwi 0, 9, 16 /* realign */
|
||||
add 0, 4, 0 /* calculate new value */
|
||||
slwi 0, 0, 16 /* realign */
|
||||
clrlwi 9, 9, 16 /* clear old value */
|
||||
or 9, 9, 0 /* copy in new value */
|
||||
stwcx. 0, 0, 3 /* attempt to store */
|
||||
bne- 0 /* loop if failed */
|
||||
eieio /* synchronise */
|
||||
sync
|
||||
blr /* return */
|
||||
|
||||
ASENTRY(atomic_subtract_16)
|
||||
0: lwarx 0, 0, 3 /* load old value */
|
||||
srwi 0, 9, 16 /* realign */
|
||||
subf 0, 4, 0 /* calculate new value */
|
||||
slwi 0, 0, 16 /* realign */
|
||||
clrlwi 9, 9, 16 /* clear old value */
|
||||
or 9, 9, 0 /* copy in new value */
|
||||
stwcx. 0, 0, 3 /* attempt to store */
|
||||
bne- 0 /* loop if failed */
|
||||
eieio /* synchronise */
|
||||
sync
|
||||
blr /* return */
|
||||
123
sys/powerpc/powerpc/atomic.s
Normal file
123
sys/powerpc/powerpc/atomic.s
Normal file
@ -0,0 +1,123 @@
|
||||
/*
|
||||
* Copyright (c) 2000, 2001 Benno Rice
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
|
||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
|
||||
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
* SUCH DAMAGE.
|
||||
*
|
||||
* $FreeBSD$
|
||||
*/
|
||||
|
||||
#include <machine/asm.h>
|
||||
|
||||
.text
|
||||
|
||||
ASENTRY(atomic_set_8)
|
||||
0: lwarx 0, 0, 3 /* load old value */
|
||||
slwi 4, 4, 24 /* shift the byte so it's in the right place */
|
||||
or 0, 0, 4 /* generate new value */
|
||||
stwcx. 0, 0, 3 /* attempt to store */
|
||||
bne- 0 /* loop if failed */
|
||||
eieio /* synchronise */
|
||||
sync
|
||||
blr /* return */
|
||||
|
||||
ASENTRY(atomic_clear_8)
|
||||
0: lwarx 0, 0, 3 /* load old value */
|
||||
slwi 4, 4, 24 /* shift the byte so it's in the right place */
|
||||
andc 0, 0, 4 /* generate new value */
|
||||
stwcx. 0, 0, 3 /* attempt to store */
|
||||
bne- 0 /* loop if failed */
|
||||
eieio /* synchronise */
|
||||
sync
|
||||
blr /* return */
|
||||
|
||||
ASENTRY(atomic_add_8)
|
||||
0: lwarx 9, 0, 3 /* load old value */
|
||||
srwi 0, 9, 24 /* byte alignment */
|
||||
add 0, 4, 0 /* calculate new value */
|
||||
slwi 0, 9, 24 /* byte alignment */
|
||||
clrlwi 9, 9, 8 /* clear the byte in the original word */
|
||||
or 9, 9, 0 /* copy back in to the original word */
|
||||
stwcx. 9, 0, 3 /* attempt to store */
|
||||
bne- 0 /* loop if failed */
|
||||
eieio /* synchronise */
|
||||
sync
|
||||
blr /* return */
|
||||
|
||||
ASENTRY(atomic_subtract_8)
|
||||
0: lwarx 9, 0, 3 /* load old value */
|
||||
srwi 0, 9, 24 /* byte alignment */
|
||||
subf 0, 4, 0 /* calculate new value */
|
||||
slwi 0, 9, 24 /* byte alignment */
|
||||
clrlwi 9, 9, 8 /* clear the byte in the original word */
|
||||
or 9, 9, 0 /* copy back in to the original word */
|
||||
stwcx. 9, 0, 3 /* attempt to store */
|
||||
bne- 0 /* loop if failed */
|
||||
eieio /* synchronise */
|
||||
sync
|
||||
blr /* return */
|
||||
|
||||
ASENTRY(atomic_set_16)
|
||||
0: lwarx 0, 0, 3 /* load old value */
|
||||
slwi 4, 4, 16 /* realign operand */
|
||||
or 0, 0, 4 /* calculate new value */
|
||||
stwcx. 0, 0, 3 /* attempt to store */
|
||||
bne- 0 /* loop if failed */
|
||||
eieio /* synchronise */
|
||||
sync
|
||||
blr /* return */
|
||||
|
||||
ASENTRY(atomic_clear_16)
|
||||
0: lwarx 0, 0, 3 /* load old value */
|
||||
slwi 4, 4, 16 /* realign operand */
|
||||
andc 0, 0, 4 /* calculate new value */
|
||||
stwcx. 0, 0, 3 /* attempt to store */
|
||||
bne- 0 /* loop if failed */
|
||||
eieio /* synchronise */
|
||||
sync
|
||||
blr /* return */
|
||||
|
||||
ASENTRY(atomic_add_16)
|
||||
0: lwarx 0, 0, 3 /* load old value */
|
||||
srwi 0, 9, 16 /* realign */
|
||||
add 0, 4, 0 /* calculate new value */
|
||||
slwi 0, 0, 16 /* realign */
|
||||
clrlwi 9, 9, 16 /* clear old value */
|
||||
or 9, 9, 0 /* copy in new value */
|
||||
stwcx. 0, 0, 3 /* attempt to store */
|
||||
bne- 0 /* loop if failed */
|
||||
eieio /* synchronise */
|
||||
sync
|
||||
blr /* return */
|
||||
|
||||
ASENTRY(atomic_subtract_16)
|
||||
0: lwarx 0, 0, 3 /* load old value */
|
||||
srwi 0, 9, 16 /* realign */
|
||||
subf 0, 4, 0 /* calculate new value */
|
||||
slwi 0, 0, 16 /* realign */
|
||||
clrlwi 9, 9, 16 /* clear old value */
|
||||
or 9, 9, 0 /* copy in new value */
|
||||
stwcx. 0, 0, 3 /* attempt to store */
|
||||
bne- 0 /* loop if failed */
|
||||
eieio /* synchronise */
|
||||
sync
|
||||
blr /* return */
|
||||
Loading…
Reference in New Issue
Block a user