add HAL_DIAG_SETREGS to write registers via the diag api
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86b3d17f30
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@ -539,6 +539,15 @@ ath_hal_getregdump(struct ath_hal *ah, const HAL_REGRANGE *regs,
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}
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return (char *) dp - (char *) dstbuf;
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}
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static void
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ath_hal_setregs(struct ath_hal *ah, const HAL_REGWRITE *regs, int space)
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{
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while (space >= sizeof(HAL_REGWRITE)) {
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OS_REG_WRITE(ah, regs->addr, regs->value);
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regs++, space -= sizeof(HAL_REGWRITE);
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}
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}
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HAL_BOOL
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ath_hal_getdiagstate(struct ath_hal *ah, int request,
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@ -553,6 +562,10 @@ ath_hal_getdiagstate(struct ath_hal *ah, int request,
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case HAL_DIAG_REGS:
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*resultsize = ath_hal_getregdump(ah, args, *result,*resultsize);
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return AH_TRUE;
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case HAL_DIAG_SETREGS:
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ath_hal_setregs(ah, args, argsize);
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*resultsize = 0;
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return AH_TRUE;
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case HAL_DIAG_FATALERR:
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*result = &AH_PRIVATE(ah)->ah_fatalState[0];
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*resultsize = sizeof(AH_PRIVATE(ah)->ah_fatalState);
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@ -49,6 +49,11 @@ typedef struct {
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uint16_t end; /* ending register or zero */
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} HAL_REGRANGE;
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typedef struct {
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uint32_t addr; /* regiser address/offset */
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uint32_t value; /* value to write */
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} HAL_REGWRITE;
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/*
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* Transmit power scale factor.
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*
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@ -609,16 +614,14 @@ enum {
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HAL_DIAG_RESETKEY = 16, /* Reset keycache backdoor */
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HAL_DIAG_EEREAD = 17, /* Read EEPROM word */
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HAL_DIAG_EEWRITE = 18, /* Write EEPROM word */
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/* 19 was HAL_DIAG_TXCONT, 20-23 were for radar */
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HAL_DIAG_REGREAD = 24, /* Reg reads */
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HAL_DIAG_REGWRITE = 25, /* Reg writes */
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HAL_DIAG_GET_REGBASE = 26, /* Get register base */
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/* 19-26 removed, do not reuse */
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HAL_DIAG_RDWRITE = 27, /* Write regulatory domain */
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HAL_DIAG_RDREAD = 28, /* Get regulatory domain */
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HAL_DIAG_FATALERR = 29, /* Read cached interrupt state */
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HAL_DIAG_11NCOMPAT = 30, /* 11n compatibility tweaks */
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HAL_DIAG_ANI_PARAMS = 31, /* ANI noise immunity parameters */
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HAL_DIAG_CHECK_HANGS = 32, /* check h/w hangs */
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HAL_DIAG_SETREGS = 33, /* write registers */
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};
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enum {
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