Newbusify the sr device and move it to its new location.
This commit is contained in:
parent
59b7f2afcd
commit
1a3d993a0b
File diff suppressed because it is too large
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File diff suppressed because it is too large
Load Diff
@ -1,5 +1,5 @@
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/*
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* Copyright (c) 1996 John Hay.
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* Copyright (c) 1996 - 2001 John Hay.
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* Copyright (c) 1996 SDL Communications, Inc.
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* All rights reserved.
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*
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@ -30,109 +30,219 @@
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* $FreeBSD$
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*/
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#ifdef COMPILING_LINT
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#warning "The sr pci driver is broken and is not compiled with LINT"
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#else
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#include "sr.h"
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/kernel.h>
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#include <sys/malloc.h>
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#include <sys/bus.h>
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#include <machine/bus.h>
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#include <machine/resource.h>
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#include <machine/bus_pio.h>
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#include <machine/bus_memio.h>
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#include <sys/rman.h>
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#include <pci/pcivar.h>
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#include <machine/md_var.h>
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#ifndef COMPAT_OLDPCI
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#error "The sr device requires the old pci compatibility shims"
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#endif
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#include <dev/ic/hd64570.h>
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#include <dev/sr/if_srregs.h>
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#ifndef BUGGY
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#define BUGGY 0
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#endif
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/*
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* The must match with the real functions in if_sr.c
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*/
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extern void *srattach_pci(int unit,
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vm_offset_t plx_vaddr,
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vm_offset_t sca_vaddr);
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extern void srintr_hc(void *hc);
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static int sr_pci_probe(device_t);
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static int sr_pci_attach(device_t);
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static const char *sr_pci_probe(pcici_t tag, pcidi_t type);
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static void sr_pci_attach(pcici_t config_id, int unit);
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static u_long src_count = NSR;
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static struct pci_device sr_pci_driver =
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{
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"src",
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sr_pci_probe,
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sr_pci_attach,
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&src_count,
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NULL
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static device_method_t sr_pci_methods[] = {
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/* Device interface */
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DEVMETHOD(device_probe, sr_pci_probe),
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DEVMETHOD(device_attach, sr_pci_attach),
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DEVMETHOD(device_detach, sr_detach),
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{ 0, 0 }
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};
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COMPAT_PCI_DRIVER (sr_pci, sr_pci_driver);
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static driver_t sr_pci_driver = {
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"sr",
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sr_pci_methods,
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sizeof(struct sr_hardc),
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};
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static const char *
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sr_pci_probe(pcici_t tag, pcidi_t type)
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DRIVER_MODULE(if_sr, pci, sr_pci_driver, sr_devclass, 0, 0);
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static u_int src_get8_mem(u_int base, u_int off);
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static u_int src_get16_mem(u_int base, u_int off);
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static void src_put8_mem(u_int base, u_int off, u_int val);
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static void src_put16_mem(u_int base, u_int off, u_int val);
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static int
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sr_pci_probe(device_t device)
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{
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u_int32_t type = pci_get_devid(device);
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switch(type) {
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case 0x556812aa:
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return ("RISCom/N2pci");
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device_set_desc(device, "RISCom/N2pci");
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return (0);
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break;
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case 0x55684778:
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case 0x55684877:
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/*
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* XXX This can probably be removed sometime.
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*/
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return ("RISCom/N2pci (old id)");
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device_set_desc(device, "RISCom/N2pci (old id)");
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return (0);
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break;
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default:
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break;
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}
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return (ENXIO);
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}
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static int
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sr_pci_attach(device_t device)
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{
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int numports;
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u_int fecr, *fecrp;
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struct sr_hardc *hc;
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hc = (struct sr_hardc *)device_get_softc(device);
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bzero(hc, sizeof(struct sr_hardc));
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if (sr_allocate_plx_memory(device, 0x10, 1))
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goto errexit;
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if (sr_allocate_memory(device, 0x18, 1))
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goto errexit;
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if (sr_allocate_irq(device, 0, 1))
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goto errexit;
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hc->plx_base = rman_get_virtual(hc->res_plx_memory);
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hc->sca_base = (vm_offset_t)rman_get_virtual(hc->res_memory);
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hc->cunit = device_get_unit(device);
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/*
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* Configure the PLX. This is magic. I'm doing it just like I'm told
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* to. :-)
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*
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* offset
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* 0x00 - Map Range - Mem-mapped to locate anywhere
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* 0x04 - Re-Map - PCI address decode enable
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* 0x18 - Bus Region - 32-bit bus, ready enable
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* 0x1c - Master Range - include all 16 MB
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* 0x20 - Master RAM - Map SCA Base at 0
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* 0x28 - Master Remap - direct master memory enable
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* 0x68 - Interrupt - Enable interrupt (0 to disable)
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*
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* Note: This is "cargo cult" stuff. - jrc
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*/
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*((u_int *)(hc->plx_base + 0x00)) = 0xfffff000;
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*((u_int *)(hc->plx_base + 0x04)) = 1;
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*((u_int *)(hc->plx_base + 0x18)) = 0x40030043;
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*((u_int *)(hc->plx_base + 0x1c)) = 0xff000000;
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*((u_int *)(hc->plx_base + 0x20)) = 0;
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*((u_int *)(hc->plx_base + 0x28)) = 0xe9;
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*((u_int *)(hc->plx_base + 0x68)) = 0x10900;
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/*
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* Get info from card.
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*
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* Only look for the second port if the first exists. Too many things
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* will break if we have only a second port.
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*/
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fecrp = (u_int *)(hc->sca_base + SR_FECR);
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fecr = *fecrp;
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numports = 0;
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if (((fecr & SR_FECR_ID0) >> SR_FE_ID0_SHFT) != SR_FE_ID_NONE) {
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numports++;
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if (((fecr & SR_FECR_ID1) >> SR_FE_ID1_SHFT) != SR_FE_ID_NONE)
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numports++;
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}
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if (numports == 0)
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goto errexit;
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hc->numports = numports;
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hc->cardtype = SR_CRD_N2PCI;
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hc->src_put8 = src_put8_mem;
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hc->src_put16 = src_put16_mem;
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hc->src_get8 = src_get8_mem;
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hc->src_get16 = src_get16_mem;
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/*
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* Malloc area for tx and rx buffers. For now allocate SRC_WIN_SIZ
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* (16k) for each buffer.
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*
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* Allocate the block below 16M because the N2pci card can only access
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* 16M memory at a time.
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*
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* (We could actually allocate a contiguous block above the 16MB limit,
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* but this would complicate card programming more than we want to
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* right now -jrc)
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*/
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hc->memsize = 2 * hc->numports * SRC_WIN_SIZ;
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hc->mem_start = contigmalloc(hc->memsize,
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M_DEVBUF,
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M_NOWAIT,
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0ul,
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0xfffffful,
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0x10000,
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0x1000000);
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if (hc->mem_start == NULL) {
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printf("src%d: pci: failed to allocate buffer space.\n",
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hc->cunit);
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goto errexit;
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}
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hc->winmsk = 0xffffffff;
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hc->mem_end = (caddr_t)((u_int)hc->mem_start + hc->memsize);
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hc->mem_pstart = kvtop(hc->mem_start);
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bzero(hc->mem_start, hc->memsize);
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*fecrp = SR_FECR_DTR0
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| SR_FECR_DTR1
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| SR_FECR_TE0
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| SR_FECR_TE1;
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if (sr_attach(device))
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goto errexit;
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return (0);
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errexit:
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sr_deallocate_resources(device);
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return (ENXIO);
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}
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/*
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* I/O for PCI N2 card(s)
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*/
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#define SRC_PCI_SCA_REG(y) ((y & 2) ? ((y & 0xfd) + 0x100) : y)
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static u_int
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src_get8_mem(u_int base, u_int off)
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{
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return *((u_char *)(base + SRC_PCI_SCA_REG(off)));
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}
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static u_int
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src_get16_mem(u_int base, u_int off)
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{
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return *((u_short *)(base + SRC_PCI_SCA_REG(off)));
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}
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static void
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sr_pci_attach(pcici_t config_id, int unit)
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src_put8_mem(u_int base, u_int off, u_int val)
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{
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void *hc;
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#if BUGGY > 0
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u_int *fecr;
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#endif
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vm_offset_t plx_vaddr, plx_paddr, sca_vaddr, sca_paddr;
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#if BUGGY > 0
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printf("srp: ID %x\n", pci_conf_read(config_id, 0));
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printf("srp: BADR0 %x\n", pci_conf_read(config_id, 0x10));
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printf("srp: BADR1 %x\n", pci_conf_read(config_id, 0x18));
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#endif
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if(!pci_map_mem(config_id, 0x10, &plx_vaddr, &plx_paddr)) {
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printf("srp: map failed.\n");
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return;
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}
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#if BUGGY > 0
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printf("srp: vaddr %x, paddr %x\n", plx_vaddr, plx_paddr);
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#endif
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if(!pci_map_mem(config_id, 0x18, &sca_vaddr, &sca_paddr)) {
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printf("srp: map failed.\n");
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return;
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}
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#if BUGGY > 0
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printf("srp: vaddr %x, paddr %x\n", sca_vaddr, sca_paddr);
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fecr = (u_int *)(sca_vaddr + 0x200);
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printf("srp: FECR %x\n", *fecr);
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#endif
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hc = srattach_pci(unit, plx_vaddr, sca_vaddr);
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if(!hc)
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return;
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if(!pci_map_int(config_id, srintr_hc, (void *)hc, &net_imask)) {
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free(hc, M_DEVBUF);
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return;
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}
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*((u_char *)(base + SRC_PCI_SCA_REG(off))) = (u_char)val;
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}
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static void
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src_put16_mem(u_int base, u_int off, u_int val)
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{
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*((u_short *)(base + SRC_PCI_SCA_REG(off))) = (u_short)val;
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}
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#endif
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/*
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* Copyright (c) 1995 John Hay.
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* Copyright (c) 1995 - 2001 John Hay.
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* Copyright (c) 1996 SDL Communications, Inc.
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* All rights reserved.
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*
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@ -120,4 +120,80 @@
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#define SR_FE_ID0_SHFT 9
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#define SR_FE_ID1_SHFT 13
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/*
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* These macros are used to hide the difference between the way the
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* ISA N2 cards and the PCI N2 cards access the Hitachi 64570 SCA.
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*/
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#define SRC_GET8(base,off) (*hc->src_get8)(base,(u_int)&off)
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#define SRC_GET16(base,off) (*hc->src_get16)(base,(u_int)&off)
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#define SRC_PUT8(base,off,d) (*hc->src_put8)(base,(u_int)&off,d)
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#define SRC_PUT16(base,off,d) (*hc->src_put16)(base,(u_int)&off,d)
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/*
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* These macros enable/disable the DPRAM and select the correct
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* DPRAM page.
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*/
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#define SRC_GET_WIN(addr) ((addr >> SRC_WIN_SHFT) & SR_PG_MSK)
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#define SRC_SET_ON(iobase) outb(iobase+SR_PCR, \
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SR_PCR_MEM_WIN | inb(iobase+SR_PCR))
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#define SRC_SET_MEM(iobase,win) outb(iobase+SR_PSR, SRC_GET_WIN(win) | \
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(inb(iobase+SR_PSR) & ~SR_PG_MSK))
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#define SRC_SET_OFF(iobase) outb(iobase+SR_PCR, \
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~SR_PCR_MEM_WIN & inb(iobase+SR_PCR))
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/*
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* Define the hardware (card information) structure needed to keep
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* track of the device itself... There is only one per card.
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*/
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struct sr_hardc {
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struct sr_softc *sc; /* software channels */
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int cunit; /* card w/in system */
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u_short iobase; /* I/O Base Address */
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int cardtype;
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int numports; /* # of ports on cd */
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int mempages;
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u_int memsize; /* DPRAM size: bytes */
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u_int winmsk;
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vm_offset_t sca_base;
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vm_offset_t mem_pstart; /* start of buffer */
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caddr_t mem_start; /* start of DP RAM */
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caddr_t mem_end; /* end of DP RAM */
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caddr_t plx_base;
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sca_regs *sca; /* register array */
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bus_space_tag_t bt;
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bus_space_handle_t bh;
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int rid_ioport;
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int rid_memory;
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int rid_plx_memory;
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int rid_irq;
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struct resource* res_ioport; /* resource for port range */
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struct resource* res_memory; /* resource for mem range */
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struct resource* res_plx_memory;
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struct resource* res_irq; /* resource for irq range */
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void *intr_cookie;
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/*
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* We vectorize the following functions to allow re-use between the
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* ISA card's needs and those of the PCI card.
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*/
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void (*src_put8)(u_int base, u_int off, u_int val);
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void (*src_put16)(u_int base, u_int off, u_int val);
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u_int (*src_get8)(u_int base, u_int off);
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u_int (*src_get16)(u_int base, u_int off);
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};
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extern devclass_t sr_devclass;
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int sr_allocate_ioport(device_t device, int rid, u_long size);
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int sr_allocate_irq(device_t device, int rid, u_long size);
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int sr_allocate_memory(device_t device, int rid, u_long size);
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int sr_allocate_plx_memory(device_t device, int rid, u_long size);
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int sr_deallocate_resources(device_t device);
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int sr_attach(device_t device);
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int sr_detach(device_t device);
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#endif /* _IF_SRREGS_H_ */
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