d/freebsd-nq
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

Fix overly long lines, whitespace and other bugs according to style(9).

Browse Source
This commit is contained in:
Marius Strobl 2017-01-29 00:05:49 +00:00
parent 2f6a7e426e
commit 1bacf3be8c
6 changed files with 169 additions and 127 deletions

48
sys/dev/mmc/mmc.c

@ -259,7 +259,7 @@ mmc_suspend(device_t dev)
err = bus_generic_suspend(dev);
if (err)
return (err);
return (err);
mmc_power_down(sc);
return (0);
}
@ -980,10 +980,14 @@ mmc_decode_csd_sd(uint32_t *raw_csd, struct mmc_csd *csd)
csd->write_blk_misalign = mmc_get_bits(raw_csd, 128, 78, 1);
csd->read_blk_misalign = mmc_get_bits(raw_csd, 128, 77, 1);
csd->dsr_imp = mmc_get_bits(raw_csd, 128, 76, 1);
csd->vdd_r_curr_min = cur_min[mmc_get_bits(raw_csd, 128, 59, 3)];
csd->vdd_r_curr_max = cur_max[mmc_get_bits(raw_csd, 128, 56, 3)];
csd->vdd_w_curr_min = cur_min[mmc_get_bits(raw_csd, 128, 53, 3)];
csd->vdd_w_curr_max = cur_max[mmc_get_bits(raw_csd, 128, 50, 3)];
csd->vdd_r_curr_min =
cur_min[mmc_get_bits(raw_csd, 128, 59, 3)];
csd->vdd_r_curr_max =
cur_max[mmc_get_bits(raw_csd, 128, 56, 3)];
csd->vdd_w_curr_min =
cur_min[mmc_get_bits(raw_csd, 128, 53, 3)];
csd->vdd_w_curr_max =
cur_max[mmc_get_bits(raw_csd, 128, 50, 3)];
m = mmc_get_bits(raw_csd, 128, 62, 12);
e = mmc_get_bits(raw_csd, 128, 47, 3);
csd->capacity = ((1 + m) << (e + 2)) * csd->read_bl_len;
@ -1008,8 +1012,8 @@ mmc_decode_csd_sd(uint32_t *raw_csd, struct mmc_csd *csd)
csd->write_blk_misalign = mmc_get_bits(raw_csd, 128, 78, 1);
csd->read_blk_misalign = mmc_get_bits(raw_csd, 128, 77, 1);
csd->dsr_imp = mmc_get_bits(raw_csd, 128, 76, 1);
csd->capacity = ((uint64_t)mmc_get_bits(raw_csd, 128, 48, 22) + 1) *
512 * 1024;
csd->capacity = ((uint64_t)mmc_get_bits(raw_csd, 128, 48, 22) +
1) * 512 * 1024;
csd->erase_blk_en = mmc_get_bits(raw_csd, 128, 46, 1);
csd->erase_sector = mmc_get_bits(raw_csd, 128, 39, 7) + 1;
csd->wp_grp_size = mmc_get_bits(raw_csd, 128, 32, 7);
@ -1307,18 +1311,21 @@ mmc_discover_cards(struct mmc_softc *sc)
break;
}
newcard = 1;
if ((err = device_get_children(sc->dev, &devlist, &devcount)) != 0)
if ((err = device_get_children(sc->dev, &devlist,
&devcount)) != 0)
return;
for (i = 0; i < devcount; i++) {
ivar = device_get_ivars(devlist[i]);
if (memcmp(ivar->raw_cid, raw_cid, sizeof(raw_cid)) == 0) {
if (memcmp(ivar->raw_cid, raw_cid, sizeof(raw_cid)) ==
0) {
newcard = 0;
break;
}
}
free(devlist, M_TEMP);
if (bootverbose || mmc_debug) {
device_printf(sc->dev, "%sard detected (CID %08x%08x%08x%08x)\n",
device_printf(sc->dev,
"%sard detected (CID %08x%08x%08x%08x)\n",
newcard ? "New c" : "C",
raw_cid[0], raw_cid[1], raw_cid[2], raw_cid[3]);
}
@ -1370,7 +1377,7 @@ mmc_discover_cards(struct mmc_softc *sc)
mmc_app_decode_scr(ivar->raw_scr, &ivar->scr);
/* Get card switch capabilities (command class 10). */
if ((ivar->scr.sda_vsn >= 1) &&
(ivar->csd.ccc & (1<<10))) {
(ivar->csd.ccc & (1 << 10))) {
mmc_sd_switch(sc, SD_SWITCH_MODE_CHECK,
SD_SWITCH_GROUP1, SD_SWITCH_NOCHANGE,
switch_res);
@ -1537,7 +1544,8 @@ mmc_rescan_cards(struct mmc_softc *sc)
ivar = device_get_ivars(devlist[i]);
if (mmc_select_card(sc, ivar->rca)) {
if (bootverbose || mmc_debug)
device_printf(sc->dev, "Card at relative address %d lost.\n",
device_printf(sc->dev,
"Card at relative address %d lost.\n",
ivar->rca);
device_delete_child(sc->dev, devlist[i]);
free(ivar, M_DEVBUF);
@ -1559,7 +1567,8 @@ mmc_delete_cards(struct mmc_softc *sc)
for (i = 0; i < devcount; i++) {
ivar = device_get_ivars(devlist[i]);
if (bootverbose || mmc_debug)
device_printf(sc->dev, "Card at relative address %d deleted.\n",
device_printf(sc->dev,
"Card at relative address %d deleted.\n",
ivar->rca);
device_delete_child(sc->dev, devlist[i]);
free(ivar, M_DEVBUF);
@ -1589,7 +1598,8 @@ mmc_go_discovery(struct mmc_softc *sc)
mmc_idle_cards(sc);
err = mmc_send_if_cond(sc, 1);
if ((bootverbose || mmc_debug) && err == 0)
device_printf(sc->dev, "SD 2.0 interface conditions: OK\n");
device_printf(sc->dev,
"SD 2.0 interface conditions: OK\n");
if (mmc_send_app_op_cond(sc, 0, &ocr) != MMC_ERR_NONE) {
if (bootverbose || mmc_debug)
device_printf(sc->dev, "SD probe: failed\n");
@ -1599,13 +1609,15 @@ mmc_go_discovery(struct mmc_softc *sc)
mmcbr_set_mode(dev, mode_mmc);
if (mmc_send_op_cond(sc, 0, &ocr) != MMC_ERR_NONE) {
if (bootverbose || mmc_debug)
device_printf(sc->dev, "MMC probe: failed\n");
device_printf(sc->dev,
"MMC probe: failed\n");
ocr = 0; /* Failed both, powerdown. */
} else if (bootverbose || mmc_debug)
device_printf(sc->dev,
"MMC probe: OK (OCR: 0x%08x)\n", ocr);
} else if (bootverbose || mmc_debug)
device_printf(sc->dev, "SD probe: OK (OCR: 0x%08x)\n", ocr);
device_printf(sc->dev, "SD probe: OK (OCR: 0x%08x)\n",
ocr);
sc->squelched--;
mmcbr_set_ocr(dev, mmc_select_vdd(sc, ocr));
@ -1622,7 +1634,8 @@ mmc_go_discovery(struct mmc_softc *sc)
* one card on the bus.
*/
if (bootverbose || mmc_debug)
device_printf(sc->dev, "Current OCR: 0x%08x\n", mmcbr_get_ocr(dev));
device_printf(sc->dev, "Current OCR: 0x%08x\n",
mmcbr_get_ocr(dev));
if (mmcbr_get_ocr(dev) == 0) {
device_printf(sc->dev, "No compatible cards found on bus\n");
mmc_delete_cards(sc);
@ -1760,6 +1773,7 @@ mmc_read_ivar(device_t bus, device_t child, int which, uintptr_t *result)
static int
mmc_write_ivar(device_t bus, device_t child, int which, uintptr_t value)
{
/*
* None are writable ATM
*/

39
sys/dev/mmc/mmcsd.c

@ -113,7 +113,7 @@ static int mmcsd_probe(device_t dev);
/* disk routines */
static int mmcsd_close(struct disk *dp);
static int mmcsd_dump(void *arg, void *virtual, vm_offset_t physical,
off_t offset, size_t length);
off_t offset, size_t length);
static int mmcsd_open(struct disk *dp);
static void mmcsd_strategy(struct bio *bp);
static void mmcsd_task(void *arg);
@ -122,14 +122,14 @@ static int mmcsd_bus_bit_width(device_t dev);
static daddr_t mmcsd_delete(struct mmcsd_softc *sc, struct bio *bp);
static daddr_t mmcsd_rw(struct mmcsd_softc *sc, struct bio *bp);
#define MMCSD_LOCK(_sc) mtx_lock(&(_sc)->sc_mtx)
#define MMCSD_LOCK(_sc) mtx_lock(&(_sc)->sc_mtx)
#define MMCSD_UNLOCK(_sc) mtx_unlock(&(_sc)->sc_mtx)
#define MMCSD_LOCK_INIT(_sc) \
#define MMCSD_LOCK_INIT(_sc) \
mtx_init(&_sc->sc_mtx, device_get_nameunit(_sc->dev), \
"mmcsd", MTX_DEF)
#define MMCSD_LOCK_DESTROY(_sc) mtx_destroy(&_sc->sc_mtx);
#define MMCSD_ASSERT_LOCKED(_sc) mtx_assert(&_sc->sc_mtx, MA_OWNED);
#define MMCSD_ASSERT_UNLOCKED(_sc) mtx_assert(&_sc->sc_mtx, MA_NOTOWNED);
#define MMCSD_LOCK_DESTROY(_sc) mtx_destroy(&_sc->sc_mtx);
#define MMCSD_ASSERT_LOCKED(_sc) mtx_assert(&_sc->sc_mtx, MA_OWNED);
#define MMCSD_ASSERT_UNLOCKED(_sc) mtx_assert(&_sc->sc_mtx, MA_NOTOWNED);
static int
mmcsd_probe(device_t dev)
@ -208,7 +208,7 @@ mmcsd_attach(device_t dev)
sc->running = 1;
sc->suspend = 0;
sc->eblock = sc->eend = 0;
kproc_create(&mmcsd_task, sc, &sc->p, 0, 0, "%s: mmc/sd card",
kproc_create(&mmcsd_task, sc, &sc->p, 0, 0, "%s: mmc/sd card",
device_get_nameunit(dev));
return (0);
@ -311,6 +311,7 @@ mmcsd_strategy(struct bio *bp)
static const char *
mmcsd_errmsg(int e)
{
if (e < 0 || e > MMC_ERR_MAX)
return "Bad error code";
return errmsg[e];
@ -325,17 +326,18 @@ mmcsd_rw(struct mmcsd_softc *sc, struct bio *bp)
struct mmc_request req;
struct mmc_data data;
device_t dev = sc->dev;
int sz = sc->disk->d_sectorsize;
int numblocks, sz;
device_t mmcbr = device_get_parent(dev);
char *vaddr;
block = bp->bio_pblkno;
sz = sc->disk->d_sectorsize;
end = bp->bio_pblkno + (bp->bio_bcount / sz);
while (block < end) {
char *vaddr = bp->bio_data +
(block - bp->bio_pblkno) * sz;
int numblocks = min(end - block, mmc_get_max_data(dev));
vaddr = bp->bio_data + (block - bp->bio_pblkno) * sz;
numblocks = min(end - block, mmc_get_max_data(dev));
memset(&req, 0, sizeof(req));
memset(&cmd, 0, sizeof(cmd));
memset(&cmd, 0, sizeof(cmd));
memset(&stop, 0, sizeof(stop));
memset(&data, 0, sizeof(data));
cmd.mrq = &req;
@ -373,10 +375,11 @@ mmcsd_rw(struct mmcsd_softc *sc, struct bio *bp)
}
MMCBUS_WAIT_FOR_REQUEST(mmcbr, dev, &req);
if (req.cmd->error != MMC_ERR_NONE) {
if (ppsratecheck(&sc->log_time, &sc->log_count, LOG_PPS)) {
if (ppsratecheck(&sc->log_time, &sc->log_count,
LOG_PPS))
device_printf(dev, "Error indicated: %d %s\n",
req.cmd->error, mmcsd_errmsg(req.cmd->error));
}
req.cmd->error,
mmcsd_errmsg(req.cmd->error));
break;
}
block += numblocks;
@ -407,7 +410,7 @@ mmcsd_delete(struct mmcsd_softc *sc, struct bio *bp)
start = block + erase_sector - 1; /* Round up. */
start -= start % erase_sector;
stop = end; /* Round down. */
stop -= end % erase_sector;
stop -= end % erase_sector;
/* We can't erase area smaller then sector, store it for later. */
if (start >= stop) {
sc->eblock = block;
@ -475,8 +478,8 @@ mmcsd_delete(struct mmcsd_softc *sc, struct bio *bp)
}
static int
mmcsd_dump(void *arg, void *virtual, vm_offset_t physical,
off_t offset, size_t length)
mmcsd_dump(void *arg, void *virtual, vm_offset_t physical, off_t offset,
size_t length)
{
struct disk *disk = arg;
struct mmcsd_softc *sc = (struct mmcsd_softc *)disk->d_drv1;

127
sys/dev/sdhci/sdhci.c

@ -96,8 +96,10 @@ static void sdhci_card_task(void *, int);
/*
* Broadcom BCM577xx Controller Constants
*/
#define BCM577XX_DEFAULT_MAX_DIVIDER 256 /* Maximum divider supported by the default clock source. */
#define BCM577XX_ALT_CLOCK_BASE 63000000 /* Alternative clock's base frequency. */
/* Maximum divider supported by the default clock source. */
#define BCM577XX_DEFAULT_MAX_DIVIDER 256
/* Alternative clock's base frequency. */
#define BCM577XX_ALT_CLOCK_BASE 63000000
#define BCM577XX_HOST_CONTROL 0x198
#define BCM577XX_CTRL_CLKSEL_MASK 0xFFFFCFFF
@ -122,7 +124,7 @@ slot_printf(struct sdhci_slot *slot, const char * fmt, ...)
va_list ap;
int retval;
retval = printf("%s-slot%d: ",
retval = printf("%s-slot%d: ",
device_get_nameunit(slot->bus), slot->num);
va_start(ap, fmt);
@ -266,20 +268,25 @@ sdhci_set_clock(struct sdhci_slot *slot, uint32_t clock)
/* If no clock requested - left it so. */
if (clock == 0)
return;
/* Determine the clock base frequency */
clk_base = slot->max_clk;
if (slot->quirks & SDHCI_QUIRK_BCM577XX_400KHZ_CLKSRC) {
clk_sel = RD2(slot, BCM577XX_HOST_CONTROL) & BCM577XX_CTRL_CLKSEL_MASK;
clk_sel = RD2(slot, BCM577XX_HOST_CONTROL) &
BCM577XX_CTRL_CLKSEL_MASK;
/* Select clock source appropriate for the requested frequency. */
/*
* Select clock source appropriate for the requested frequency.
*/
if ((clk_base / BCM577XX_DEFAULT_MAX_DIVIDER) > clock) {
clk_base = BCM577XX_ALT_CLOCK_BASE;
clk_sel |= (BCM577XX_CTRL_CLKSEL_64MHZ << BCM577XX_CTRL_CLKSEL_SHIFT);
clk_sel |= (BCM577XX_CTRL_CLKSEL_64MHZ <<
BCM577XX_CTRL_CLKSEL_SHIFT);
} else {
clk_sel |= (BCM577XX_CTRL_CLKSEL_DEFAULT << BCM577XX_CTRL_CLKSEL_SHIFT);
clk_sel |= (BCM577XX_CTRL_CLKSEL_DEFAULT <<
BCM577XX_CTRL_CLKSEL_SHIFT);
}
WR2(slot, BCM577XX_HOST_CONTROL, clk_sel);
}
@ -303,8 +310,8 @@ sdhci_set_clock(struct sdhci_slot *slot, uint32_t clock)
if (clock >= clk_base)
div = 0;
else {
for (div = 2; div < SDHCI_300_MAX_DIVIDER; div += 2) {
if ((clk_base / div) <= clock)
for (div = 2; div < SDHCI_300_MAX_DIVIDER; div += 2) {
if ((clk_base / div) <= clock)
break;
}
}
@ -312,7 +319,7 @@ sdhci_set_clock(struct sdhci_slot *slot, uint32_t clock)
}
if (bootverbose || sdhci_debug)
slot_printf(slot, "Divider %d for freq %d (base %d)\n",
slot_printf(slot, "Divider %d for freq %d (base %d)\n",
div, clock, clk_base);
/* Now we have got divider, set it. */
@ -329,7 +336,7 @@ sdhci_set_clock(struct sdhci_slot *slot, uint32_t clock)
while (!((clk = RD2(slot, SDHCI_CLOCK_CONTROL))
& SDHCI_CLOCK_INT_STABLE)) {
if (timeout == 0) {
slot_printf(slot,
slot_printf(slot,
"Internal clock never stabilised.\n");
sdhci_dumpregs(slot);
return;
@ -555,7 +562,7 @@ sdhci_handle_card_present(struct sdhci_slot *slot, bool is_present)
SDHCI_UNLOCK(slot);
}
static void
static void
sdhci_card_poll(void *arg)
{
struct sdhci_slot *slot = arg;
@ -565,7 +572,7 @@ sdhci_card_poll(void *arg)
callout_reset(&slot->card_poll_callout, SDHCI_CARD_PRESENT_TICKS,
sdhci_card_poll, slot);
}
int
sdhci_init_slot(device_t dev, struct sdhci_slot *slot, int num)
{
@ -611,7 +618,7 @@ sdhci_init_slot(device_t dev, struct sdhci_slot *slot, int num)
/* Initialize slot. */
sdhci_init(slot);
slot->version = (RD2(slot, SDHCI_HOST_VERSION)
slot->version = (RD2(slot, SDHCI_HOST_VERSION)
>> SDHCI_SPEC_VER_SHIFT) & SDHCI_SPEC_VER_MASK;
if (slot->quirks & SDHCI_QUIRK_MISSING_CAPS)
caps = slot->caps;
@ -621,7 +628,7 @@ sdhci_init_slot(device_t dev, struct sdhci_slot *slot, int num)
if (slot->version >= SDHCI_SPEC_300)
freq = (caps & SDHCI_CLOCK_V3_BASE_MASK) >>
SDHCI_CLOCK_BASE_SHIFT;
else
else
freq = (caps & SDHCI_CLOCK_BASE_MASK) >>
SDHCI_CLOCK_BASE_SHIFT;
if (freq != 0)
@ -634,7 +641,8 @@ sdhci_init_slot(device_t dev, struct sdhci_slot *slot, int num)
if (slot->max_clk == 0) {
slot->max_clk = SDHCI_DEFAULT_MAX_FREQ * 1000000;
device_printf(dev, "Hardware doesn't specify base clock "
"frequency, using %dMHz as default.\n", SDHCI_DEFAULT_MAX_FREQ);
"frequency, using %dMHz as default.\n",
SDHCI_DEFAULT_MAX_FREQ);
}
/* Calculate/set timeout clock frequency. */
if (slot->quirks & SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK) {
@ -642,8 +650,8 @@ sdhci_init_slot(device_t dev, struct sdhci_slot *slot, int num)
} else if (slot->quirks & SDHCI_QUIRK_DATA_TIMEOUT_1MHZ) {
slot->timeout_clk = 1000;
} else {
slot->timeout_clk =
(caps & SDHCI_TIMEOUT_CLK_MASK) >> SDHCI_TIMEOUT_CLK_SHIFT;
slot->timeout_clk = (caps & SDHCI_TIMEOUT_CLK_MASK) >>
SDHCI_TIMEOUT_CLK_SHIFT;
if (caps & SDHCI_TIMEOUT_CLK_UNIT)
slot->timeout_clk *= 1000;
}
@ -687,7 +695,7 @@ sdhci_init_slot(device_t dev, struct sdhci_slot *slot, int num)
if (slot->quirks & SDHCI_QUIRK_ALL_SLOTS_NON_REMOVABLE)
slot->opt |= SDHCI_NON_REMOVABLE;
/*
/*
* Use platform-provided transfer backend
* with PIO as a fallback mechanism
*/
@ -825,7 +833,7 @@ sdhci_generic_update_ios(device_t brdev, device_t reqdev)
} else {
panic("Invalid bus width: %d", ios->bus_width);
}
if (ios->timing == bus_timing_hs &&
if (ios->timing == bus_timing_hs &&
!(slot->quirks & SDHCI_QUIRK_DONT_SET_HISPD_BIT))
slot->hostctrl |= SDHCI_CTRL_HISPD;
else
@ -839,7 +847,7 @@ sdhci_generic_update_ios(device_t brdev, device_t reqdev)
return (0);
}
static void
static void
sdhci_req_done(struct sdhci_slot *slot)
{
struct mmc_request *req;
@ -852,8 +860,8 @@ sdhci_req_done(struct sdhci_slot *slot)
req->done(req);
}
}
static void
static void
sdhci_timeout(void *arg)
{
struct sdhci_slot *slot = arg;
@ -868,7 +876,7 @@ sdhci_timeout(void *arg)
slot_printf(slot, " Spurious timeout - no active command\n");
}
}
static void
sdhci_set_transfer_mode(struct sdhci_slot *slot,
struct mmc_data *data)
@ -970,7 +978,7 @@ sdhci_start_command(struct sdhci_slot *slot, struct mmc_command *cmd)
flags |= SDHCI_CMD_TYPE_ABORT;
/* Prepare data. */
sdhci_start_data(slot, cmd->data);
/*
/*
* Interrupt aggregation: To reduce total number of interrupts
* group response interrupt with data interrupt when possible.
* If there going to be data interrupt, mask response one.
@ -994,6 +1002,8 @@ static void
sdhci_finish_command(struct sdhci_slot *slot)
{
int i;
uint32_t val;
uint8_t extra;
slot->cmd_done = 1;
/* Interrupt aggregation: Restore command interrupt.
@ -1011,13 +1021,14 @@ sdhci_finish_command(struct sdhci_slot *slot)
if (slot->curcmd->flags & MMC_RSP_PRESENT) {
if (slot->curcmd->flags & MMC_RSP_136) {
/* CRC is stripped so we need one byte shift. */
uint8_t extra = 0;
extra = 0;
for (i = 0; i < 4; i++) {
uint32_t val = RD4(slot, SDHCI_RESPONSE + i * 4);
if (slot->quirks & SDHCI_QUIRK_DONT_SHIFT_RESPONSE)
val = RD4(slot, SDHCI_RESPONSE + i * 4);
if (slot->quirks &
SDHCI_QUIRK_DONT_SHIFT_RESPONSE)
slot->curcmd->resp[3 - i] = val;
else {
slot->curcmd->resp[3 - i] =
slot->curcmd->resp[3 - i] =
(val << 8) | extra;
extra = val >> 24;
}
@ -1056,7 +1067,7 @@ sdhci_start_data(struct sdhci_slot *slot, struct mmc_data *data)
current_timeout <<= 1;
}
/* Compensate for an off-by-one error in the CaFe chip.*/
if (div < 0xE &&
if (div < 0xE &&
(slot->quirks & SDHCI_QUIRK_INCR_TIMEOUT_CONTROL)) {
++div;
}
@ -1080,13 +1091,13 @@ sdhci_start_data(struct sdhci_slot *slot, struct mmc_data *data)
/* Load DMA buffer. */
if (slot->flags & SDHCI_USE_DMA) {
if (data->flags & MMC_DATA_READ)
bus_dmamap_sync(slot->dmatag, slot->dmamap,
bus_dmamap_sync(slot->dmatag, slot->dmamap,
BUS_DMASYNC_PREREAD);
else {
memcpy(slot->dmamem, data->data,
(data->len < DMA_BLOCK_SIZE) ?
(data->len < DMA_BLOCK_SIZE) ?
data->len : DMA_BLOCK_SIZE);
bus_dmamap_sync(slot->dmatag, slot->dmamap,
bus_dmamap_sync(slot->dmatag, slot->dmamap,
BUS_DMASYNC_PREWRITE);
}
WR4(slot, SDHCI_DMA_ADDRESS, slot->paddr);
@ -1101,8 +1112,8 @@ sdhci_start_data(struct sdhci_slot *slot, struct mmc_data *data)
/* Current data offset for both PIO and DMA. */
slot->offset = 0;
/* Set block size and request IRQ on 4K border. */
WR2(slot, SDHCI_BLOCK_SIZE,
SDHCI_MAKE_BLKSZ(DMA_BOUNDARY, (data->len < 512)?data->len:512));
WR2(slot, SDHCI_BLOCK_SIZE, SDHCI_MAKE_BLKSZ(DMA_BOUNDARY,
(data->len < 512) ? data->len : 512));
/* Set block count. */
WR2(slot, SDHCI_BLOCK_COUNT, (data->len + 511) / 512);
}
@ -1123,12 +1134,12 @@ sdhci_finish_data(struct sdhci_slot *slot)
if (!slot->data_done && (slot->flags & SDHCI_USE_DMA)) {
if (data->flags & MMC_DATA_READ) {
size_t left = data->len - slot->offset;
bus_dmamap_sync(slot->dmatag, slot->dmamap,
bus_dmamap_sync(slot->dmatag, slot->dmamap,
BUS_DMASYNC_POSTREAD);
memcpy((u_char*)data->data + slot->offset, slot->dmamem,
(left < DMA_BLOCK_SIZE)?left:DMA_BLOCK_SIZE);
(left < DMA_BLOCK_SIZE) ? left : DMA_BLOCK_SIZE);
} else
bus_dmamap_sync(slot->dmatag, slot->dmamap,
bus_dmamap_sync(slot->dmatag, slot->dmamap,
BUS_DMASYNC_POSTWRITE);
}
slot->data_done = 1;
@ -1187,9 +1198,10 @@ sdhci_generic_request(device_t brdev, device_t reqdev, struct mmc_request *req)
return (EBUSY);
}
if (sdhci_debug > 1) {
slot_printf(slot, "CMD%u arg %#x flags %#x dlen %u dflags %#x\n",
req->cmd->opcode, req->cmd->arg, req->cmd->flags,
(req->cmd->data)?(u_int)req->cmd->data->len:0,
slot_printf(slot,
"CMD%u arg %#x flags %#x dlen %u dflags %#x\n",
req->cmd->opcode, req->cmd->arg, req->cmd->flags,
(req->cmd->data)?(u_int)req->cmd->data->len:0,
(req->cmd->data)?req->cmd->data->flags:0);
}
slot->req = req;
@ -1270,6 +1282,8 @@ sdhci_cmd_irq(struct sdhci_slot *slot, uint32_t intmask)
static void
sdhci_data_irq(struct sdhci_slot *slot, uint32_t intmask)
{
struct mmc_data *data;
size_t left;
if (!slot->curcmd) {
slot_printf(slot, "Got data interrupt 0x%08x, but "
@ -1304,17 +1318,17 @@ sdhci_data_irq(struct sdhci_slot *slot, uint32_t intmask)
/* Handle PIO interrupt. */
if (intmask & (SDHCI_INT_DATA_AVAIL | SDHCI_INT_SPACE_AVAIL)) {
if ((slot->opt & SDHCI_PLATFORM_TRANSFER) &&
if ((slot->opt & SDHCI_PLATFORM_TRANSFER) &&
SDHCI_PLATFORM_WILL_HANDLE(slot->bus, slot)) {
SDHCI_PLATFORM_START_TRANSFER(slot->bus, slot, &intmask);
SDHCI_PLATFORM_START_TRANSFER(slot->bus, slot,
&intmask);
slot->flags |= PLATFORM_DATA_STARTED;
} else
sdhci_transfer_pio(slot);
}
/* Handle DMA border. */
if (intmask & SDHCI_INT_DMA_END) {
struct mmc_data *data = slot->curcmd->data;
size_t left;
data = slot->curcmd->data;
/* Unload DMA buffer... */
left = data->len - slot->offset;
@ -1322,7 +1336,7 @@ sdhci_data_irq(struct sdhci_slot *slot, uint32_t intmask)
bus_dmamap_sync(slot->dmatag, slot->dmamap,
BUS_DMASYNC_POSTREAD);
memcpy((u_char*)data->data + slot->offset, slot->dmamem,
(left < DMA_BLOCK_SIZE)?left:DMA_BLOCK_SIZE);
(left < DMA_BLOCK_SIZE) ? left : DMA_BLOCK_SIZE);
} else {
bus_dmamap_sync(slot->dmatag, slot->dmamap,
BUS_DMASYNC_POSTWRITE);
@ -1335,7 +1349,7 @@ sdhci_data_irq(struct sdhci_slot *slot, uint32_t intmask)
BUS_DMASYNC_PREREAD);
} else {
memcpy(slot->dmamem, (u_char*)data->data + slot->offset,
(left < DMA_BLOCK_SIZE)?left:DMA_BLOCK_SIZE);
(left < DMA_BLOCK_SIZE)? left : DMA_BLOCK_SIZE);
bus_dmamap_sync(slot->dmatag, slot->dmamap,
BUS_DMASYNC_PREWRITE);
}
@ -1363,7 +1377,6 @@ done:
SDHCI_PLATFORM_FINISH_TRANSFER(slot->bus, slot);
} else
sdhci_finish_data(slot);
return;
}
}
@ -1371,7 +1384,7 @@ static void
sdhci_acmd_irq(struct sdhci_slot *slot)
{
uint16_t err;
err = RD4(slot, SDHCI_ACMD12_ERR);
if (!slot->curcmd) {
slot_printf(slot, "Got AutoCMD12 error 0x%04x, but "
@ -1387,7 +1400,7 @@ void
sdhci_generic_intr(struct sdhci_slot *slot)
{
uint32_t intmask, present;
SDHCI_LOCK(slot);
/* Read slot interrupt status. */
intmask = RD4(slot, SDHCI_INT_STATUS);
@ -1407,7 +1420,7 @@ sdhci_generic_intr(struct sdhci_slot *slot)
SDHCI_INT_CARD_INSERT;
WR4(slot, SDHCI_INT_ENABLE, slot->intmask);
WR4(slot, SDHCI_SIGNAL_ENABLE, slot->intmask);
WR4(slot, SDHCI_INT_STATUS, intmask &
WR4(slot, SDHCI_INT_STATUS, intmask &
(SDHCI_INT_CARD_INSERT | SDHCI_INT_CARD_REMOVE));
sdhci_handle_card_present_locked(slot, present);
intmask &= ~(SDHCI_INT_CARD_INSERT | SDHCI_INT_CARD_REMOVE);
@ -1446,12 +1459,13 @@ sdhci_generic_intr(struct sdhci_slot *slot)
intmask);
sdhci_dumpregs(slot);
}
SDHCI_UNLOCK(slot);
}
int
sdhci_generic_read_ivar(device_t bus, device_t child, int which, uintptr_t *result)
sdhci_generic_read_ivar(device_t bus, device_t child, int which,
uintptr_t *result)
{
struct sdhci_slot *slot = device_get_ivars(child);
@ -1505,7 +1519,8 @@ sdhci_generic_read_ivar(device_t bus, device_t child, int which, uintptr_t *resu
}
int
sdhci_generic_write_ivar(device_t bus, device_t child, int which, uintptr_t value)
sdhci_generic_write_ivar(device_t bus, device_t child, int which,
uintptr_t value)
{
struct sdhci_slot *slot = device_get_ivars(child);

23
sys/dev/sdhci/sdhci.h

@ -130,7 +130,7 @@
#define SDHCI_STATE_DAT_MASK 0x00f00000
#define SDHCI_STATE_CMD 0x01000000
#define SDHCI_HOST_CONTROL 0x28
#define SDHCI_HOST_CONTROL 0x28
#define SDHCI_CTRL_LED 0x01
#define SDHCI_CTRL_4BITBUS 0x02
#define SDHCI_CTRL_HISPD 0x04
@ -204,7 +204,7 @@
#define SDHCI_INT_NORMAL_MASK 0x00007FFF
#define SDHCI_INT_ERROR_MASK 0xFFFF8000
#define SDHCI_INT_CMD_ERROR_MASK (SDHCI_INT_TIMEOUT | \
#define SDHCI_INT_CMD_ERROR_MASK (SDHCI_INT_TIMEOUT | \
SDHCI_INT_CRC | SDHCI_INT_END_BIT | SDHCI_INT_INDEX)
#define SDHCI_INT_CMD_MASK (SDHCI_INT_RESPONSE | SDHCI_INT_CMD_ERROR_MASK)
@ -288,19 +288,19 @@ struct sdhci_slot {
int timeout; /* Transfer timeout */
uint32_t max_clk; /* Max possible freq */
uint32_t timeout_clk; /* Timeout freq */
bus_dma_tag_t dmatag;
bus_dmamap_t dmamap;
bus_dma_tag_t dmatag;
bus_dmamap_t dmamap;
u_char *dmamem;
bus_addr_t paddr; /* DMA buffer address */
struct task card_task; /* Card presence check task */
struct timeout_task
struct timeout_task
card_delayed_task;/* Card insert delayed task */
struct callout card_poll_callout;/* Card present polling callout */
struct callout timeout_callout;/* Card command/data response timeout */
struct mmc_host host; /* Host parameters */
struct mmc_request *req; /* Current request */
struct mmc_command *curcmd; /* Current command of current request */
uint32_t intmask; /* Current interrupt mask */
uint32_t clock; /* Current clock freq. */
size_t offset; /* Data buffer offset */
@ -313,12 +313,14 @@ struct sdhci_slot {
#define CMD_STARTED 1
#define STOP_STARTED 2
#define SDHCI_USE_DMA 4 /* Use DMA for this req. */
#define PLATFORM_DATA_STARTED 8 /* Data transfer is handled by platform */
#define PLATFORM_DATA_STARTED 8 /* Data xfer is handled by platform */
struct mtx mtx; /* Slot mutex */
};
int sdhci_generic_read_ivar(device_t bus, device_t child, int which, uintptr_t *result);
int sdhci_generic_write_ivar(device_t bus, device_t child, int which, uintptr_t value);
int sdhci_generic_read_ivar(device_t bus, device_t child, int which,
uintptr_t *result);
int sdhci_generic_write_ivar(device_t bus, device_t child, int which,
uintptr_t value);
int sdhci_init_slot(device_t dev, struct sdhci_slot *slot, int num);
void sdhci_start_slot(struct sdhci_slot *slot);
/* performs generic clean-up for platform transfers */
@ -327,7 +329,8 @@ int sdhci_cleanup_slot(struct sdhci_slot *slot);
int sdhci_generic_suspend(struct sdhci_slot *slot);
int sdhci_generic_resume(struct sdhci_slot *slot);
int sdhci_generic_update_ios(device_t brdev, device_t reqdev);
int sdhci_generic_request(device_t brdev, device_t reqdev, struct mmc_request *req);
int sdhci_generic_request(device_t brdev, device_t reqdev,
struct mmc_request *req);
int sdhci_generic_get_ro(device_t brdev, device_t reqdev);
int sdhci_generic_acquire_host(device_t brdev, device_t reqdev);
int sdhci_generic_release_host(device_t brdev, device_t reqdev);

19
sys/dev/sdhci/sdhci_acpi.c

@ -77,7 +77,7 @@ static char *sdhci_ids[] = {
struct sdhci_acpi_softc {
u_int quirks; /* Chip specific quirks */
struct resource *irq_res; /* IRQ resource */
void *intrhand; /* Interrupt handle */
void *intrhand; /* Interrupt handle */
struct sdhci_slot slot;
struct resource *mem_res; /* Memory resource */
@ -97,7 +97,8 @@ sdhci_acpi_read_1(device_t dev, struct sdhci_slot *slot, bus_size_t off)
}
static void
sdhci_acpi_write_1(device_t dev, struct sdhci_slot *slot, bus_size_t off, uint8_t val)
sdhci_acpi_write_1(device_t dev, struct sdhci_slot *slot, bus_size_t off,
uint8_t val)
{
struct sdhci_acpi_softc *sc = device_get_softc(dev);
@ -117,7 +118,8 @@ sdhci_acpi_read_2(device_t dev, struct sdhci_slot *slot, bus_size_t off)
}
static void
sdhci_acpi_write_2(device_t dev, struct sdhci_slot *slot, bus_size_t off, uint16_t val)
sdhci_acpi_write_2(device_t dev, struct sdhci_slot *slot, bus_size_t off,
uint16_t val)
{
struct sdhci_acpi_softc *sc = device_get_softc(dev);
@ -137,7 +139,8 @@ sdhci_acpi_read_4(device_t dev, struct sdhci_slot *slot, bus_size_t off)
}
static void
sdhci_acpi_write_4(device_t dev, struct sdhci_slot *slot, bus_size_t off, uint32_t val)
sdhci_acpi_write_4(device_t dev, struct sdhci_slot *slot, bus_size_t off,
uint32_t val)
{
struct sdhci_acpi_softc *sc = device_get_softc(dev);
@ -237,7 +240,7 @@ sdhci_acpi_attach(device_t dev)
sdhci_acpi_detach(dev);
return (ENOMEM);
}
sc->slot.quirks = sc->quirks;
err = sdhci_init_slot(dev, &sc->slot, 0);
@ -337,9 +340,9 @@ static device_method_t sdhci_methods[] = {
DEVMETHOD(bus_write_ivar, sdhci_generic_write_ivar),
/* mmcbr_if */
DEVMETHOD(mmcbr_update_ios, sdhci_generic_update_ios),
DEVMETHOD(mmcbr_request, sdhci_generic_request),
DEVMETHOD(mmcbr_get_ro, sdhci_generic_get_ro),
DEVMETHOD(mmcbr_update_ios, sdhci_generic_update_ios),
DEVMETHOD(mmcbr_request, sdhci_generic_request),
DEVMETHOD(mmcbr_get_ro, sdhci_generic_get_ro),
DEVMETHOD(mmcbr_acquire_host, sdhci_generic_acquire_host),
DEVMETHOD(mmcbr_release_host, sdhci_generic_release_host),

40
sys/dev/sdhci/sdhci_pci.c

@ -81,28 +81,28 @@ static const struct sdhci_device {
const char *desc;
u_int quirks;
} sdhci_devices[] = {
{ 0x08221180, 0xffff, "RICOH R5C822 SD",
{ 0x08221180, 0xffff, "RICOH R5C822 SD",
SDHCI_QUIRK_FORCE_DMA },
{ 0xe8221180, 0xffff, "RICOH R5CE822 SD",
{ 0xe8221180, 0xffff, "RICOH R5CE822 SD",
SDHCI_QUIRK_FORCE_DMA |
SDHCI_QUIRK_LOWER_FREQUENCY },
{ 0xe8231180, 0xffff, "RICOH R5CE823 SD",
{ 0xe8231180, 0xffff, "RICOH R5CE823 SD",
SDHCI_QUIRK_LOWER_FREQUENCY },
{ 0x8034104c, 0xffff, "TI XX21/XX11 SD",
{ 0x8034104c, 0xffff, "TI XX21/XX11 SD",
SDHCI_QUIRK_FORCE_DMA },
{ 0x05501524, 0xffff, "ENE CB712 SD",
{ 0x05501524, 0xffff, "ENE CB712 SD",
SDHCI_QUIRK_BROKEN_TIMINGS },
{ 0x05511524, 0xffff, "ENE CB712 SD 2",
{ 0x05511524, 0xffff, "ENE CB712 SD 2",
SDHCI_QUIRK_BROKEN_TIMINGS },
{ 0x07501524, 0xffff, "ENE CB714 SD",
{ 0x07501524, 0xffff, "ENE CB714 SD",
SDHCI_QUIRK_RESET_ON_IOS |
SDHCI_QUIRK_BROKEN_TIMINGS },
{ 0x07511524, 0xffff, "ENE CB714 SD 2",
{ 0x07511524, 0xffff, "ENE CB714 SD 2",
SDHCI_QUIRK_RESET_ON_IOS |
SDHCI_QUIRK_BROKEN_TIMINGS },
{ 0x410111ab, 0xffff, "Marvell CaFe SD",
{ 0x410111ab, 0xffff, "Marvell CaFe SD",
SDHCI_QUIRK_INCR_TIMEOUT_CONTROL },
{ 0x2381197B, 0xffff, "JMicron JMB38X SD",
{ 0x2381197B, 0xffff, "JMicron JMB38X SD",
SDHCI_QUIRK_32BIT_DMA_SIZE |
SDHCI_QUIRK_RESET_AFTER_REQUEST },
{ 0x16bc14e4, 0xffff, "Broadcom BCM577xx SDXC/MMC Card Reader",
@ -127,7 +127,7 @@ static const struct sdhci_device {
struct sdhci_pci_softc {
u_int quirks; /* Chip specific quirks */
struct resource *irq_res; /* IRQ resource */
void *intrhand; /* Interrupt handle */
void *intrhand; /* Interrupt handle */
int num_slots; /* Number of slots on this controller */
struct sdhci_slot slots[6];
@ -151,7 +151,8 @@ sdhci_pci_read_1(device_t dev, struct sdhci_slot *slot, bus_size_t off)
}
static void
sdhci_pci_write_1(device_t dev, struct sdhci_slot *slot, bus_size_t off, uint8_t val)
sdhci_pci_write_1(device_t dev, struct sdhci_slot *slot, bus_size_t off,
uint8_t val)
{
struct sdhci_pci_softc *sc = device_get_softc(dev);
@ -171,7 +172,8 @@ sdhci_pci_read_2(device_t dev, struct sdhci_slot *slot, bus_size_t off)
}
static void
sdhci_pci_write_2(device_t dev, struct sdhci_slot *slot, bus_size_t off, uint16_t val)
sdhci_pci_write_2(device_t dev, struct sdhci_slot *slot, bus_size_t off,
uint16_t val)
{
struct sdhci_pci_softc *sc = device_get_softc(dev);
@ -191,7 +193,8 @@ sdhci_pci_read_4(device_t dev, struct sdhci_slot *slot, bus_size_t off)
}
static void
sdhci_pci_write_4(device_t dev, struct sdhci_slot *slot, bus_size_t off, uint32_t val)
sdhci_pci_write_4(device_t dev, struct sdhci_slot *slot, bus_size_t off,
uint32_t val)
{
struct sdhci_pci_softc *sc = device_get_softc(dev);
@ -346,7 +349,8 @@ sdhci_pci_attach(device_t dev)
sc->mem_res[i] = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
&rid, RF_ACTIVE);
if (sc->mem_res[i] == NULL) {
device_printf(dev, "Can't allocate memory for slot %d\n", i);
device_printf(dev,
"Can't allocate memory for slot %d\n", i);
continue;
}
@ -463,9 +467,9 @@ static device_method_t sdhci_methods[] = {
DEVMETHOD(bus_write_ivar, sdhci_generic_write_ivar),
/* mmcbr_if */
DEVMETHOD(mmcbr_update_ios, sdhci_generic_update_ios),
DEVMETHOD(mmcbr_request, sdhci_generic_request),
DEVMETHOD(mmcbr_get_ro, sdhci_generic_get_ro),
DEVMETHOD(mmcbr_update_ios, sdhci_generic_update_ios),
DEVMETHOD(mmcbr_request, sdhci_generic_request),
DEVMETHOD(mmcbr_get_ro, sdhci_generic_get_ro),
DEVMETHOD(mmcbr_acquire_host, sdhci_generic_acquire_host),
DEVMETHOD(mmcbr_release_host, sdhci_generic_release_host),