Port x86 busdma to ARM64
The x86 busdma subsystem allows using multiple implementations. By default the classic bounce buffer approach is used, however on systems with IOMMU it could be in runtime switched to more efficient hardware accelerated implementation. This commit adds ARM64 port of the x86 busdma framework and bounce buffer backend. It is ready to use on IO coherent systems. If the IO coherency cannot be guaranteed, the cache management operations have to be added to this code in places marked by /* XXX ARM64TODO (...) */ comments. Also IOMMU support might be added by registering another busdma implementation like it is already done on the x86. Reviewed by: andrew, emaste Obtained from: Semihalf Sponsored by: The FreeBSD Foundation
This commit is contained in:
Zbigniew Bodek
parent
8c20de927a
commit
1ca4eb3acc
1080
sys/arm64/arm64/busdma_bounce.c
Normal file
1080
sys/arm64/arm64/busdma_bounce.c
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File diff suppressed because it is too large
Load Diff
@ -1,22 +1,292 @@
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/* $FreeBSD$ */
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/*-
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* Copyright (c) 1997, 1998 Justin T. Gibbs.
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* Copyright (c) 2013, 2015 The FreeBSD Foundation
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* All rights reserved.
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*
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* This software was developed by Konstantin Belousov <kib@FreeBSD.org>
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* under sponsorship from the FreeBSD Foundation.
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*
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* Portions of this software were developed by Semihalf
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* under sponsorship of the FreeBSD Foundation.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions, and the following disclaimer,
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* without modification, immediately at the beginning of the file.
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* 2. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
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* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/malloc.h>
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#include <sys/bus.h>
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#include <sys/kernel.h>
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#include <sys/ktr.h>
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#include <sys/lock.h>
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#include <sys/memdesc.h>
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#include <sys/mutex.h>
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#include <sys/uio.h>
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#include <vm/vm.h>
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#include <vm/vm_extern.h>
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#include <vm/pmap.h>
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#include <machine/bus.h>
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#include <arm64/include/bus_dma_impl.h>
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/*
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* Convenience function for manipulating driver locks from busdma (during
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* busdma_swi, for example). Drivers that don't provide their own locks
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* should specify &Giant to dmat->lockfuncarg. Drivers that use their own
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* non-mutex locking scheme don't have to use this at all.
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*/
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void
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busdma_lock_mutex(void *arg, bus_dma_lock_op_t op)
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{
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struct mtx *dmtx;
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dmtx = (struct mtx *)arg;
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switch (op) {
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case BUS_DMA_LOCK:
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mtx_lock(dmtx);
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break;
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case BUS_DMA_UNLOCK:
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mtx_unlock(dmtx);
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break;
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default:
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panic("Unknown operation 0x%x for busdma_lock_mutex!", op);
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}
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}
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/*
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* dflt_lock should never get called. It gets put into the dma tag when
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* lockfunc == NULL, which is only valid if the maps that are associated
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* with the tag are meant to never be defered.
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* XXX Should have a way to identify which driver is responsible here.
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*/
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void
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bus_dma_dflt_lock(void *arg, bus_dma_lock_op_t op)
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{
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panic("driver error: busdma dflt_lock called");
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}
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/*
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* Return true if a match is made.
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*
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* To find a match walk the chain of bus_dma_tag_t's looking for 'paddr'.
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*
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* If paddr is within the bounds of the dma tag then call the filter callback
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* to check for a match, if there is no filter callback then assume a match.
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*/
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int
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bus_dma_run_filter(struct bus_dma_tag_common *tc, bus_addr_t paddr)
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{
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int retval;
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retval = 0;
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do {
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if (((paddr > tc->lowaddr && paddr <= tc->highaddr) ||
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((paddr & (tc->alignment - 1)) != 0)) &&
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(tc->filter == NULL ||
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(*tc->filter)(tc->filterarg, paddr) != 0))
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retval = 1;
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tc = tc->parent;
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} while (retval == 0 && tc != NULL);
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return (retval);
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}
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int
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common_bus_dma_tag_create(struct bus_dma_tag_common *parent,
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bus_size_t alignment, bus_addr_t boundary, bus_addr_t lowaddr,
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bus_addr_t highaddr, bus_dma_filter_t *filter, void *filterarg,
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bus_size_t maxsize, int nsegments, bus_size_t maxsegsz, int flags,
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bus_dma_lock_t *lockfunc, void *lockfuncarg, size_t sz, void **dmat)
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{
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void *newtag;
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struct bus_dma_tag_common *common;
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KASSERT(sz >= sizeof(struct bus_dma_tag_common), ("sz"));
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/* Return a NULL tag on failure */
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*dmat = NULL;
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/* Basic sanity checking */
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if (boundary != 0 && boundary < maxsegsz)
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maxsegsz = boundary;
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if (maxsegsz == 0)
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return (EINVAL);
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newtag = malloc(sz, M_DEVBUF, M_ZERO | M_NOWAIT);
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if (newtag == NULL) {
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CTR4(KTR_BUSDMA, "%s returned tag %p tag flags 0x%x error %d",
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__func__, newtag, 0, ENOMEM);
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return (ENOMEM);
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}
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common = newtag;
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common->impl = &bus_dma_bounce_impl;
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common->parent = parent;
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common->alignment = alignment;
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common->boundary = boundary;
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common->lowaddr = trunc_page((vm_paddr_t)lowaddr) + (PAGE_SIZE - 1);
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common->highaddr = trunc_page((vm_paddr_t)highaddr) + (PAGE_SIZE - 1);
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common->filter = filter;
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common->filterarg = filterarg;
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common->maxsize = maxsize;
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common->nsegments = nsegments;
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common->maxsegsz = maxsegsz;
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common->flags = flags;
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common->ref_count = 1; /* Count ourself */
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if (lockfunc != NULL) {
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common->lockfunc = lockfunc;
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common->lockfuncarg = lockfuncarg;
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} else {
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common->lockfunc = bus_dma_dflt_lock;
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common->lockfuncarg = NULL;
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}
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/* Take into account any restrictions imposed by our parent tag */
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if (parent != NULL) {
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common->impl = parent->impl;
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common->lowaddr = MIN(parent->lowaddr, common->lowaddr);
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common->highaddr = MAX(parent->highaddr, common->highaddr);
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if (common->boundary == 0)
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common->boundary = parent->boundary;
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else if (parent->boundary != 0) {
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common->boundary = MIN(parent->boundary,
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common->boundary);
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}
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if (common->filter == NULL) {
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/*
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* Short circuit looking at our parent directly
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* since we have encapsulated all of its information
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*/
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common->filter = parent->filter;
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common->filterarg = parent->filterarg;
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common->parent = parent->parent;
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}
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atomic_add_int(&parent->ref_count, 1);
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}
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*dmat = common;
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return (0);
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}
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/*
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* Allocate a device specific dma_tag.
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*/
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int
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bus_dma_tag_create(bus_dma_tag_t parent, bus_size_t alignment,
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bus_addr_t boundary, bus_addr_t lowaddr, bus_addr_t highaddr,
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bus_dma_filter_t *filter, void *filterarg, bus_size_t maxsize,
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int nsegments, bus_size_t maxsegsz, int flags, bus_dma_lock_t *lockfunc,
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void *lockfuncarg, bus_dma_tag_t *dmat)
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{
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struct bus_dma_tag_common *tc;
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int error;
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if (parent == NULL) {
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error = bus_dma_bounce_impl.tag_create(parent, alignment,
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boundary, lowaddr, highaddr, filter, filterarg, maxsize,
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nsegments, maxsegsz, flags, lockfunc, lockfuncarg, dmat);
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} else {
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tc = (struct bus_dma_tag_common *)parent;
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error = tc->impl->tag_create(parent, alignment,
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boundary, lowaddr, highaddr, filter, filterarg, maxsize,
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nsegments, maxsegsz, flags, lockfunc, lockfuncarg, dmat);
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}
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return (error);
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}
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int
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bus_dma_tag_destroy(bus_dma_tag_t dmat)
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{
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struct bus_dma_tag_common *tc;
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tc = (struct bus_dma_tag_common *)dmat;
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return (tc->impl->tag_destroy(dmat));
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}
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/*
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* Allocate a handle for mapping from kva/uva/physical
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* address space into bus device space.
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*/
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int
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bus_dmamap_create(bus_dma_tag_t dmat, int flags, bus_dmamap_t *mapp)
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{
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struct bus_dma_tag_common *tc;
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tc = (struct bus_dma_tag_common *)dmat;
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return (tc->impl->map_create(dmat, flags, mapp));
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}
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/*
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* Destroy a handle for mapping from kva/uva/physical
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* address space into bus device space.
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*/
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int
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bus_dmamap_destroy(bus_dma_tag_t dmat, bus_dmamap_t map)
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{
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struct bus_dma_tag_common *tc;
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tc = (struct bus_dma_tag_common *)dmat;
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return (tc->impl->map_destroy(dmat, map));
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}
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/*
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* Allocate a piece of memory that can be efficiently mapped into
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* bus device space based on the constraints listed in the dma tag.
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* A dmamap to for use with dmamap_load is also allocated.
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*/
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int
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bus_dmamem_alloc(bus_dma_tag_t dmat, void** vaddr, int flags,
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bus_dmamap_t *mapp)
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{
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struct bus_dma_tag_common *tc;
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tc = (struct bus_dma_tag_common *)dmat;
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return (tc->impl->mem_alloc(dmat, vaddr, flags, mapp));
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}
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/*
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* Free a piece of memory and it's allociated dmamap, that was allocated
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* via bus_dmamem_alloc. Make the same choice for free/contigfree.
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*/
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void
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bus_dmamem_free(bus_dma_tag_t dmat, void *vaddr, bus_dmamap_t map)
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{
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struct bus_dma_tag_common *tc;
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tc = (struct bus_dma_tag_common *)dmat;
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tc->impl->mem_free(dmat, vaddr, map);
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}
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int
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_bus_dmamap_load_phys(bus_dma_tag_t dmat, bus_dmamap_t map, vm_paddr_t buf,
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bus_size_t buflen, int flags, bus_dma_segment_t *segs, int *segp)
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{
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struct bus_dma_tag_common *tc;
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panic("_bus_dmamap_load_phys");
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tc = (struct bus_dma_tag_common *)dmat;
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return (tc->impl->load_phys(dmat, map, buf, buflen, flags, segs,
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segp));
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}
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int
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@ -24,8 +294,11 @@ _bus_dmamap_load_ma(bus_dma_tag_t dmat, bus_dmamap_t map, struct vm_page **ma,
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bus_size_t tlen, int ma_offs, int flags, bus_dma_segment_t *segs,
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int *segp)
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{
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struct bus_dma_tag_common *tc;
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panic("_bus_dmamap_load_ma");
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tc = (struct bus_dma_tag_common *)dmat;
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return (tc->impl->load_ma(dmat, map, ma, tlen, ma_offs, flags,
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segs, segp));
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}
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int
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@ -33,36 +306,50 @@ _bus_dmamap_load_buffer(bus_dma_tag_t dmat, bus_dmamap_t map, void *buf,
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bus_size_t buflen, pmap_t pmap, int flags, bus_dma_segment_t *segs,
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int *segp)
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{
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struct bus_dma_tag_common *tc;
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panic("_bus_dmamap_load_buffer");
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tc = (struct bus_dma_tag_common *)dmat;
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return (tc->impl->load_buffer(dmat, map, buf, buflen, pmap, flags, segs,
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segp));
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}
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void
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__bus_dmamap_waitok(bus_dma_tag_t dmat, bus_dmamap_t map,
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struct memdesc *mem, bus_dmamap_callback_t *callback, void *callback_arg)
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{
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struct bus_dma_tag_common *tc;
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panic("__bus_dmamap_waitok");
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tc = (struct bus_dma_tag_common *)dmat;
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tc->impl->map_waitok(dmat, map, mem, callback, callback_arg);
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}
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bus_dma_segment_t *
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_bus_dmamap_complete(bus_dma_tag_t dmat, bus_dmamap_t map,
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bus_dma_segment_t *segs, int nsegs, int error)
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{
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struct bus_dma_tag_common *tc;
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panic("_bus_dmamap_complete");
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tc = (struct bus_dma_tag_common *)dmat;
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return (tc->impl->map_complete(dmat, map, segs, nsegs, error));
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}
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/*
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* Release the mapping held by map.
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*/
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void
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_bus_dmamap_unload(bus_dma_tag_t dmat, bus_dmamap_t map)
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{
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struct bus_dma_tag_common *tc;
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panic("_bus_dmamap_unload");
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tc = (struct bus_dma_tag_common *)dmat;
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tc->impl->map_unload(dmat, map);
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}
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void
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_bus_dmamap_sync(bus_dma_tag_t dmat, bus_dmamap_t map, bus_dmasync_op_t op)
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{
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struct bus_dma_tag_common *tc;
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panic("_bus_dmamap_sync");
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tc = (struct bus_dma_tag_common *)dmat;
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tc->impl->map_sync(dmat, map, op);
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}
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96
sys/arm64/include/bus_dma_impl.h
Normal file
96
sys/arm64/include/bus_dma_impl.h
Normal file
@ -0,0 +1,96 @@
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/*-
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* Copyright (c) 2013 The FreeBSD Foundation
|
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* All rights reserved.
|
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*
|
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* This software was developed by Konstantin Belousov <kib@FreeBSD.org>
|
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* under sponsorship from the FreeBSD Foundation.
|
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*
|
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* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
|
||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
|
||||
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
* SUCH DAMAGE.
|
||||
*
|
||||
* $FreeBSD$
|
||||
*/
|
||||
|
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#ifndef _MACHINE_BUS_DMA_IMPL_H_
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#define _MACHINE_BUS_DMA_IMPL_H_
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struct bus_dma_tag_common {
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struct bus_dma_impl *impl;
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struct bus_dma_tag_common *parent;
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bus_size_t alignment;
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bus_addr_t boundary;
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bus_addr_t lowaddr;
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bus_addr_t highaddr;
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bus_dma_filter_t *filter;
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void *filterarg;
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bus_size_t maxsize;
|
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u_int nsegments;
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bus_size_t maxsegsz;
|
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int flags;
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bus_dma_lock_t *lockfunc;
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void *lockfuncarg;
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int ref_count;
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};
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|
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struct bus_dma_impl {
|
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int (*tag_create)(bus_dma_tag_t parent,
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bus_size_t alignment, bus_addr_t boundary, bus_addr_t lowaddr,
|
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bus_addr_t highaddr, bus_dma_filter_t *filter,
|
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void *filterarg, bus_size_t maxsize, int nsegments,
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bus_size_t maxsegsz, int flags, bus_dma_lock_t *lockfunc,
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void *lockfuncarg, bus_dma_tag_t *dmat);
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int (*tag_destroy)(bus_dma_tag_t dmat);
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int (*map_create)(bus_dma_tag_t dmat, int flags, bus_dmamap_t *mapp);
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int (*map_destroy)(bus_dma_tag_t dmat, bus_dmamap_t map);
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int (*mem_alloc)(bus_dma_tag_t dmat, void** vaddr, int flags,
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bus_dmamap_t *mapp);
|
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void (*mem_free)(bus_dma_tag_t dmat, void *vaddr, bus_dmamap_t map);
|
||||
int (*load_ma)(bus_dma_tag_t dmat, bus_dmamap_t map,
|
||||
struct vm_page **ma, bus_size_t tlen, int ma_offs, int flags,
|
||||
bus_dma_segment_t *segs, int *segp);
|
||||
int (*load_phys)(bus_dma_tag_t dmat, bus_dmamap_t map,
|
||||
vm_paddr_t buf, bus_size_t buflen, int flags,
|
||||
bus_dma_segment_t *segs, int *segp);
|
||||
int (*load_buffer)(bus_dma_tag_t dmat, bus_dmamap_t map,
|
||||
void *buf, bus_size_t buflen, pmap_t pmap, int flags,
|
||||
bus_dma_segment_t *segs, int *segp);
|
||||
void (*map_waitok)(bus_dma_tag_t dmat, bus_dmamap_t map,
|
||||
struct memdesc *mem, bus_dmamap_callback_t *callback,
|
||||
void *callback_arg);
|
||||
bus_dma_segment_t *(*map_complete)(bus_dma_tag_t dmat, bus_dmamap_t map,
|
||||
bus_dma_segment_t *segs, int nsegs, int error);
|
||||
void (*map_unload)(bus_dma_tag_t dmat, bus_dmamap_t map);
|
||||
void (*map_sync)(bus_dma_tag_t dmat, bus_dmamap_t map,
|
||||
bus_dmasync_op_t op);
|
||||
};
|
||||
|
||||
void bus_dma_dflt_lock(void *arg, bus_dma_lock_op_t op);
|
||||
int bus_dma_run_filter(struct bus_dma_tag_common *dmat, bus_addr_t paddr);
|
||||
int common_bus_dma_tag_create(struct bus_dma_tag_common *parent,
|
||||
bus_size_t alignment,
|
||||
bus_addr_t boundary, bus_addr_t lowaddr, bus_addr_t highaddr,
|
||||
bus_dma_filter_t *filter, void *filterarg, bus_size_t maxsize,
|
||||
int nsegments, bus_size_t maxsegsz, int flags, bus_dma_lock_t *lockfunc,
|
||||
void *lockfuncarg, size_t sz, void **dmat);
|
||||
|
||||
extern struct bus_dma_impl bus_dma_bounce_impl;
|
||||
|
||||
#endif
|
||||
@ -5,6 +5,7 @@ arm64/arm64/autoconf.c standard
|
||||
arm64/arm64/bcopy.c standard
|
||||
arm64/arm64/bus_machdep.c standard
|
||||
arm64/arm64/bus_space_asm.S standard
|
||||
arm64/arm64/busdma_bounce.c standard
|
||||
arm64/arm64/busdma_machdep.c standard
|
||||
arm64/arm64/clock.c standard
|
||||
arm64/arm64/copyinout.S standard
|
||||
|
||||
Loading…
Reference in New Issue
Block a user