Added code to enable BusMaster operations.
Kurt D. Starsinic <kstar@chapin.edu> had reported this patch fixing strange behaviour (like timeouts and RX/TX DMAs stopping errors).
This commit is contained in:
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91a8167829
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1d45e38736
@ -36,8 +36,6 @@
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* Thanks are going to Steve Bauer and Jason Wright.
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*
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* todo:
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* Deal with bus mastering, i.e. i realy don't know what to do with
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* it and how it can improve performance.
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* Implement FULL IFF_MULTICAST support.
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* Test, test and test again:-(
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*
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@ -425,6 +423,7 @@ epic_freebsd_attach(
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#else
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caddr_t pmembase;
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#endif
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u_int32_t command;
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int i,s,tmp;
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printf("tx%d",unit);
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@ -453,12 +452,34 @@ epic_freebsd_attach(
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/* Get iobase or membase */
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#if defined(EPIC_USEIOSPACE)
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command = PCI_CONF_READ(PCI_CFCS);
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command |= PCI_CFCS_IOEN;
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PCI_CONF_WRITE(PCI_CFCS, command);
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command = PCI_CONF_READ(PCI_CFCS);
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if (!(command & PCI_CFCS_IOEN)) {
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printf(": failed to enable memory mapping!\n");
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free(sc, M_DEVBUF);
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return;
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}
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if (!pci_map_port(config_id, PCI_CBIO,(u_short *) &(sc->iobase))) {
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printf(": cannot map port\n");
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free(sc, M_DEVBUF);
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return;
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}
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#else
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command = PCI_CONF_READ(PCI_CFCS);
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command |= PCI_CFCS_MAEN;
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PCI_CONF_WRITE(PCI_CFCS, command);
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command = PCI_CONF_READ(PCI_CFCS);
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if (!(command & PCI_CFCS_MAEN)) {
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printf(": failed to enable memory mapping!\n");
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free(sc, M_DEVBUF);
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return;
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}
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if (!pci_map_mem(config_id, PCI_CBMA,(vm_offset_t *) &(sc->csr),(vm_offset_t *) &pmembase)) {
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printf(": cannot map memory\n");
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free(sc, M_DEVBUF);
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@ -466,8 +487,14 @@ epic_freebsd_attach(
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}
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#endif
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/* Do OS independent part, including chip wakeup and reset */
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if( epic_common_attach(sc) ) return;
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/* Enable BusMaster'ing */
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command = PCI_CONF_READ(PCI_CFCS);
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command |= PCI_CFCS_BMEN;
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PCI_CONF_WRITE(PCI_CFCS, command);
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/* Display ethernet address ,... */
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printf(": address %02x:%02x:%02x:%02x:%02x:%02x,",
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sc->sc_macaddr[0],sc->sc_macaddr[1],sc->sc_macaddr[2],
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@ -734,8 +761,8 @@ epic_common_attach(
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pool += sizeof(struct epic_rx_desc)*RX_RING_SIZE;
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sc->tx_desc = (void *)pool;
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/* Bring the chip out of low-power mode. */
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CSR_WRITE_4( sc, GENCTL, 0x0000 );
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/* Bring the chip out of low-power mode and reset it. */
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CSR_WRITE_4( sc, GENCTL, GENCTL_SOFT_RESET );
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/* Workaround for Application Note 7-15 */
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for (i=0; i<16; i++) CSR_WRITE_4(sc, TEST1, TEST1_CLOCK_TEST);
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@ -67,6 +67,10 @@
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#define PCI_CFIT 0x3c /* Configuration Interrupt */
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#define PCI_CFDA 0x40 /* Configuration Driver Area */
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#define PCI_CFCS_IOEN 0x0001 /* IO Sapce Enable */
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#define PCI_CFCS_MAEN 0x0002 /* Memory Space Enable */
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#define PCI_CFCS_BMEN 0x0004 /* Bus Master Enable */
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#define PCI_CONF_WRITE(r, v) pci_conf_write(config_id, (r), (v))
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#define PCI_CONF_READ(r) pci_conf_read(config_id, (r))
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@ -67,6 +67,10 @@
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#define PCI_CFIT 0x3c /* Configuration Interrupt */
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#define PCI_CFDA 0x40 /* Configuration Driver Area */
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#define PCI_CFCS_IOEN 0x0001 /* IO Sapce Enable */
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#define PCI_CFCS_MAEN 0x0002 /* Memory Space Enable */
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#define PCI_CFCS_BMEN 0x0004 /* Bus Master Enable */
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#define PCI_CONF_WRITE(r, v) pci_conf_write(config_id, (r), (v))
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#define PCI_CONF_READ(r) pci_conf_read(config_id, (r))
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@ -36,8 +36,6 @@
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* Thanks are going to Steve Bauer and Jason Wright.
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*
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* todo:
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* Deal with bus mastering, i.e. i realy don't know what to do with
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* it and how it can improve performance.
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* Implement FULL IFF_MULTICAST support.
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* Test, test and test again:-(
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*
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@ -425,6 +423,7 @@ epic_freebsd_attach(
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#else
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caddr_t pmembase;
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#endif
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u_int32_t command;
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int i,s,tmp;
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printf("tx%d",unit);
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@ -453,12 +452,34 @@ epic_freebsd_attach(
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/* Get iobase or membase */
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#if defined(EPIC_USEIOSPACE)
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command = PCI_CONF_READ(PCI_CFCS);
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command |= PCI_CFCS_IOEN;
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PCI_CONF_WRITE(PCI_CFCS, command);
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command = PCI_CONF_READ(PCI_CFCS);
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if (!(command & PCI_CFCS_IOEN)) {
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printf(": failed to enable memory mapping!\n");
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free(sc, M_DEVBUF);
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return;
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}
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if (!pci_map_port(config_id, PCI_CBIO,(u_short *) &(sc->iobase))) {
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printf(": cannot map port\n");
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free(sc, M_DEVBUF);
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return;
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}
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#else
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command = PCI_CONF_READ(PCI_CFCS);
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command |= PCI_CFCS_MAEN;
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PCI_CONF_WRITE(PCI_CFCS, command);
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command = PCI_CONF_READ(PCI_CFCS);
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if (!(command & PCI_CFCS_MAEN)) {
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printf(": failed to enable memory mapping!\n");
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free(sc, M_DEVBUF);
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return;
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}
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if (!pci_map_mem(config_id, PCI_CBMA,(vm_offset_t *) &(sc->csr),(vm_offset_t *) &pmembase)) {
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printf(": cannot map memory\n");
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free(sc, M_DEVBUF);
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@ -466,8 +487,14 @@ epic_freebsd_attach(
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}
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#endif
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/* Do OS independent part, including chip wakeup and reset */
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if( epic_common_attach(sc) ) return;
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/* Enable BusMaster'ing */
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command = PCI_CONF_READ(PCI_CFCS);
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command |= PCI_CFCS_BMEN;
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PCI_CONF_WRITE(PCI_CFCS, command);
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/* Display ethernet address ,... */
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printf(": address %02x:%02x:%02x:%02x:%02x:%02x,",
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sc->sc_macaddr[0],sc->sc_macaddr[1],sc->sc_macaddr[2],
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@ -734,8 +761,8 @@ epic_common_attach(
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pool += sizeof(struct epic_rx_desc)*RX_RING_SIZE;
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sc->tx_desc = (void *)pool;
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/* Bring the chip out of low-power mode. */
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CSR_WRITE_4( sc, GENCTL, 0x0000 );
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/* Bring the chip out of low-power mode and reset it. */
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CSR_WRITE_4( sc, GENCTL, GENCTL_SOFT_RESET );
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/* Workaround for Application Note 7-15 */
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for (i=0; i<16; i++) CSR_WRITE_4(sc, TEST1, TEST1_CLOCK_TEST);
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@ -67,6 +67,10 @@
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#define PCI_CFIT 0x3c /* Configuration Interrupt */
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#define PCI_CFDA 0x40 /* Configuration Driver Area */
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#define PCI_CFCS_IOEN 0x0001 /* IO Sapce Enable */
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#define PCI_CFCS_MAEN 0x0002 /* Memory Space Enable */
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#define PCI_CFCS_BMEN 0x0004 /* Bus Master Enable */
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#define PCI_CONF_WRITE(r, v) pci_conf_write(config_id, (r), (v))
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#define PCI_CONF_READ(r) pci_conf_read(config_id, (r))
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