Added code to enable BusMaster operations.

Kurt D. Starsinic <kstar@chapin.edu> had reported
this patch fixing strange behaviour (like timeouts
and RX/TX DMAs stopping errors).
This commit is contained in:
Semen Ustimenko 1999-10-29 09:56:52 +00:00
parent 91a8167829
commit 1d45e38736
5 changed files with 74 additions and 8 deletions

View File

@ -36,8 +36,6 @@
* Thanks are going to Steve Bauer and Jason Wright.
*
* todo:
* Deal with bus mastering, i.e. i realy don't know what to do with
* it and how it can improve performance.
* Implement FULL IFF_MULTICAST support.
* Test, test and test again:-(
*
@ -425,6 +423,7 @@ epic_freebsd_attach(
#else
caddr_t pmembase;
#endif
u_int32_t command;
int i,s,tmp;
printf("tx%d",unit);
@ -453,12 +452,34 @@ epic_freebsd_attach(
/* Get iobase or membase */
#if defined(EPIC_USEIOSPACE)
command = PCI_CONF_READ(PCI_CFCS);
command |= PCI_CFCS_IOEN;
PCI_CONF_WRITE(PCI_CFCS, command);
command = PCI_CONF_READ(PCI_CFCS);
if (!(command & PCI_CFCS_IOEN)) {
printf(": failed to enable memory mapping!\n");
free(sc, M_DEVBUF);
return;
}
if (!pci_map_port(config_id, PCI_CBIO,(u_short *) &(sc->iobase))) {
printf(": cannot map port\n");
free(sc, M_DEVBUF);
return;
}
#else
command = PCI_CONF_READ(PCI_CFCS);
command |= PCI_CFCS_MAEN;
PCI_CONF_WRITE(PCI_CFCS, command);
command = PCI_CONF_READ(PCI_CFCS);
if (!(command & PCI_CFCS_MAEN)) {
printf(": failed to enable memory mapping!\n");
free(sc, M_DEVBUF);
return;
}
if (!pci_map_mem(config_id, PCI_CBMA,(vm_offset_t *) &(sc->csr),(vm_offset_t *) &pmembase)) {
printf(": cannot map memory\n");
free(sc, M_DEVBUF);
@ -466,8 +487,14 @@ epic_freebsd_attach(
}
#endif
/* Do OS independent part, including chip wakeup and reset */
if( epic_common_attach(sc) ) return;
/* Enable BusMaster'ing */
command = PCI_CONF_READ(PCI_CFCS);
command |= PCI_CFCS_BMEN;
PCI_CONF_WRITE(PCI_CFCS, command);
/* Display ethernet address ,... */
printf(": address %02x:%02x:%02x:%02x:%02x:%02x,",
sc->sc_macaddr[0],sc->sc_macaddr[1],sc->sc_macaddr[2],
@ -734,8 +761,8 @@ epic_common_attach(
pool += sizeof(struct epic_rx_desc)*RX_RING_SIZE;
sc->tx_desc = (void *)pool;
/* Bring the chip out of low-power mode. */
CSR_WRITE_4( sc, GENCTL, 0x0000 );
/* Bring the chip out of low-power mode and reset it. */
CSR_WRITE_4( sc, GENCTL, GENCTL_SOFT_RESET );
/* Workaround for Application Note 7-15 */
for (i=0; i<16; i++) CSR_WRITE_4(sc, TEST1, TEST1_CLOCK_TEST);

View File

@ -67,6 +67,10 @@
#define PCI_CFIT 0x3c /* Configuration Interrupt */
#define PCI_CFDA 0x40 /* Configuration Driver Area */
#define PCI_CFCS_IOEN 0x0001 /* IO Sapce Enable */
#define PCI_CFCS_MAEN 0x0002 /* Memory Space Enable */
#define PCI_CFCS_BMEN 0x0004 /* Bus Master Enable */
#define PCI_CONF_WRITE(r, v) pci_conf_write(config_id, (r), (v))
#define PCI_CONF_READ(r) pci_conf_read(config_id, (r))

View File

@ -67,6 +67,10 @@
#define PCI_CFIT 0x3c /* Configuration Interrupt */
#define PCI_CFDA 0x40 /* Configuration Driver Area */
#define PCI_CFCS_IOEN 0x0001 /* IO Sapce Enable */
#define PCI_CFCS_MAEN 0x0002 /* Memory Space Enable */
#define PCI_CFCS_BMEN 0x0004 /* Bus Master Enable */
#define PCI_CONF_WRITE(r, v) pci_conf_write(config_id, (r), (v))
#define PCI_CONF_READ(r) pci_conf_read(config_id, (r))

View File

@ -36,8 +36,6 @@
* Thanks are going to Steve Bauer and Jason Wright.
*
* todo:
* Deal with bus mastering, i.e. i realy don't know what to do with
* it and how it can improve performance.
* Implement FULL IFF_MULTICAST support.
* Test, test and test again:-(
*
@ -425,6 +423,7 @@ epic_freebsd_attach(
#else
caddr_t pmembase;
#endif
u_int32_t command;
int i,s,tmp;
printf("tx%d",unit);
@ -453,12 +452,34 @@ epic_freebsd_attach(
/* Get iobase or membase */
#if defined(EPIC_USEIOSPACE)
command = PCI_CONF_READ(PCI_CFCS);
command |= PCI_CFCS_IOEN;
PCI_CONF_WRITE(PCI_CFCS, command);
command = PCI_CONF_READ(PCI_CFCS);
if (!(command & PCI_CFCS_IOEN)) {
printf(": failed to enable memory mapping!\n");
free(sc, M_DEVBUF);
return;
}
if (!pci_map_port(config_id, PCI_CBIO,(u_short *) &(sc->iobase))) {
printf(": cannot map port\n");
free(sc, M_DEVBUF);
return;
}
#else
command = PCI_CONF_READ(PCI_CFCS);
command |= PCI_CFCS_MAEN;
PCI_CONF_WRITE(PCI_CFCS, command);
command = PCI_CONF_READ(PCI_CFCS);
if (!(command & PCI_CFCS_MAEN)) {
printf(": failed to enable memory mapping!\n");
free(sc, M_DEVBUF);
return;
}
if (!pci_map_mem(config_id, PCI_CBMA,(vm_offset_t *) &(sc->csr),(vm_offset_t *) &pmembase)) {
printf(": cannot map memory\n");
free(sc, M_DEVBUF);
@ -466,8 +487,14 @@ epic_freebsd_attach(
}
#endif
/* Do OS independent part, including chip wakeup and reset */
if( epic_common_attach(sc) ) return;
/* Enable BusMaster'ing */
command = PCI_CONF_READ(PCI_CFCS);
command |= PCI_CFCS_BMEN;
PCI_CONF_WRITE(PCI_CFCS, command);
/* Display ethernet address ,... */
printf(": address %02x:%02x:%02x:%02x:%02x:%02x,",
sc->sc_macaddr[0],sc->sc_macaddr[1],sc->sc_macaddr[2],
@ -734,8 +761,8 @@ epic_common_attach(
pool += sizeof(struct epic_rx_desc)*RX_RING_SIZE;
sc->tx_desc = (void *)pool;
/* Bring the chip out of low-power mode. */
CSR_WRITE_4( sc, GENCTL, 0x0000 );
/* Bring the chip out of low-power mode and reset it. */
CSR_WRITE_4( sc, GENCTL, GENCTL_SOFT_RESET );
/* Workaround for Application Note 7-15 */
for (i=0; i<16; i++) CSR_WRITE_4(sc, TEST1, TEST1_CLOCK_TEST);

View File

@ -67,6 +67,10 @@
#define PCI_CFIT 0x3c /* Configuration Interrupt */
#define PCI_CFDA 0x40 /* Configuration Driver Area */
#define PCI_CFCS_IOEN 0x0001 /* IO Sapce Enable */
#define PCI_CFCS_MAEN 0x0002 /* Memory Space Enable */
#define PCI_CFCS_BMEN 0x0004 /* Bus Master Enable */
#define PCI_CONF_WRITE(r, v) pci_conf_write(config_id, (r), (v))
#define PCI_CONF_READ(r) pci_conf_read(config_id, (r))