Start support for the RISC-V 64-bit architecture developed by UC Berkeley.
RISC-V is a new ISA designed to support computer research and education, and is now become a standard open architecture for industry implementations. This is a minimal set of changes required to run 'make kernel-toolchain' using external (GNU) toolchain. The FreeBSD/RISC-V project home: https://wiki.freebsd.org/riscv. Reviewed by: andrew, bdrewery, emaste, imp Sponsored by: DARPA, AFRL Sponsored by: HEIF5 Differential Revision: https://reviews.freebsd.org/D4445
This commit is contained in:
parent
03b1fa9de4
commit
1fdcc5e5c0
2
Makefile
2
Makefile
@ -180,7 +180,7 @@ _MAKE= PATH=${PATH} ${SUB_MAKE} -f Makefile.inc1 TARGET=${_TARGET} TARGET_ARCH=$
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_TARGET_ARCH= ${TARGET:S/pc98/i386/:S/arm64/aarch64/}
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.elif !defined(TARGET) && defined(TARGET_ARCH) && \
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${TARGET_ARCH} != ${MACHINE_ARCH}
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_TARGET= ${TARGET_ARCH:C/mips(n32|64)?(el)?/mips/:C/arm(v6)?(eb|hf)?/arm/:C/aarch64/arm64/:C/powerpc64/powerpc/}
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_TARGET= ${TARGET_ARCH:C/mips(n32|64)?(el)?/mips/:C/arm(v6)?(eb|hf)?/arm/:C/aarch64/arm64/:C/powerpc64/powerpc/:C/riscv64/riscv/}
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.endif
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.if defined(TARGET) && !defined(_TARGET)
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_TARGET=${TARGET}
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@ -172,7 +172,11 @@ VERSION= FreeBSD ${REVISION}-${BRANCH:C/-p[0-9]+$//} ${TARGET_ARCH} ${SRCRELDATE
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.export VERSION
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.endif
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KNOWN_ARCHES?= aarch64/arm64 amd64 arm armeb/arm armv6/arm armv6hf/arm i386 i386/pc98 mips mipsel/mips mips64el/mips mips64/mips mipsn32el/mips mipsn32/mips powerpc powerpc64/powerpc sparc64
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KNOWN_ARCHES?= aarch64/arm64 amd64 arm armeb/arm armv6/arm armv6hf/arm \
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i386 i386/pc98 mips mipsel/mips mips64el/mips mips64/mips \
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mipsn32el/mips mipsn32/mips powerpc powerpc64/powerpc \
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riscv64/riscv sparc64
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.if ${TARGET} == ${TARGET_ARCH}
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_t= ${TARGET}
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.else
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51
etc/etc.riscv/ttys
Normal file
51
etc/etc.riscv/ttys
Normal file
@ -0,0 +1,51 @@
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#
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# $FreeBSD$
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# @(#)ttys 5.1 (Berkeley) 4/17/89
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#
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# This file specifies various information about terminals on the system.
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# It is used by several different programs. Common entries for the
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# various columns include:
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#
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# name The name of the terminal device.
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#
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# getty The program to start running on the terminal. Typically a
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# getty program, as the name implies. Other common entries
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# include none, when no getty is needed, and xdm, to start the
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# X Window System.
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#
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# type The initial terminal type for this port. For hardwired
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# terminal lines, this will contain the type of terminal used.
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# For virtual consoles, the correct type is typically xterm.
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# Other common values include dialup for incoming modem ports, and
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# unknown when the terminal type cannot be predetermined.
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#
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# status Must be on or off. If on, init will run the getty program on
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# the specified port. If the word "secure" appears, this tty
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# allows root login.
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#
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# name getty type status comments
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#
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# If console is marked "insecure", then init will ask for the root password
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# when going to single-user mode.
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console none unknown off secure
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#
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ttyv0 "/usr/libexec/getty Pc" xterm onifconsole secure
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# Virtual terminals
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ttyv1 "/usr/libexec/getty Pc" xterm off secure
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ttyv2 "/usr/libexec/getty Pc" xterm off secure
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ttyv3 "/usr/libexec/getty Pc" xterm off secure
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ttyv4 "/usr/libexec/getty Pc" xterm off secure
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ttyv5 "/usr/libexec/getty Pc" xterm off secure
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ttyv6 "/usr/libexec/getty Pc" xterm off secure
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ttyv7 "/usr/libexec/getty Pc" xterm off secure
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#ttyv8 "/usr/local/bin/xdm -nodaemon" xterm off secure
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# Serial terminals
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# The 'dialup' keyword identifies dialin lines to login, fingerd etc.
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ttyu0 "/usr/libexec/getty 3wire" vt100 onifconsole secure
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ttyu1 "/usr/libexec/getty 3wire" vt100 onifconsole secure
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ttyu2 "/usr/libexec/getty 3wire" vt100 onifconsole secure
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ttyu3 "/usr/libexec/getty 3wire" vt100 onifconsole secure
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# Dumb console
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dcons "/usr/libexec/getty std.9600" vt100 off secure
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# RISC-V HTIF console
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rcons "/usr/libexec/getty std.9600" vt100 onifconsole secure
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46
lib/csu/riscv/Makefile
Normal file
46
lib/csu/riscv/Makefile
Normal file
@ -0,0 +1,46 @@
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# $FreeBSD$
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.PATH: ${.CURDIR}/../common
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SRCS= crt1.c crti.S crtn.S
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OBJS= ${SRCS:N*.h:R:S/$/.o/g}
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OBJS+= Scrt1.o gcrt1.o
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CFLAGS+= -I${.CURDIR}/../common \
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-I${.CURDIR}/../../libc/include
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FILES= ${OBJS}
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FILESMODE= ${LIBMODE}
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FILESOWN= ${LIBOWN}
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FILESGRP= ${LIBGRP}
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FILESDIR= ${LIBDIR}
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# These FILES qualify as libraries for the purpose of LIBRARIES_ONLY.
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.undef LIBRARIES_ONLY
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CLEANFILES= ${OBJS}
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CLEANFILES+= crt1.s gcrt1.s Scrt1.s
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# See the comment in lib/csu/common/crtbrand.c for the reason crt1.c is not
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# directly compiled to .o files.
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crt1.s: crt1.c
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${CC} ${CFLAGS} -S -o ${.TARGET} ${.CURDIR}/crt1.c
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sed ${SED_FIX_NOTE} ${.TARGET}
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crt1.o: crt1.s
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${CC} ${ACFLAGS} -c -o ${.TARGET} crt1.s
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gcrt1.s: crt1.c
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${CC} ${CFLAGS} -DGCRT -S -o ${.TARGET} ${.CURDIR}/crt1.c
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sed ${SED_FIX_NOTE} ${.TARGET}
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gcrt1.o: gcrt1.s
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${CC} ${ACFLAGS} -c -o ${.TARGET} gcrt1.s
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Scrt1.s: crt1.c
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${CC} ${CFLAGS} -fPIC -DPIC -S -o ${.TARGET} ${.CURDIR}/crt1.c
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sed ${SED_FIX_NOTE} ${.TARGET}
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Scrt1.o: Scrt1.s
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${CC} ${ACFLAGS} -c -o ${.TARGET} Scrt1.s
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.include <bsd.lib.mk>
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89
lib/csu/riscv/crt1.c
Normal file
89
lib/csu/riscv/crt1.c
Normal file
@ -0,0 +1,89 @@
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/* LINTLIBRARY */
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/*-
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* Copyright 1996-1998 John D. Polstra.
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* Copyright (c) 2015 Ruslan Bukin <br@bsdpad.com>
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* All rights reserved.
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*
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* Portions of this software were developed by SRI International and the
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* University of Cambridge Computer Laboratory under DARPA/AFRL contract
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* FA8750-10-C-0237 ("CTSRD"), as part of the DARPA CRASH research programme.
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*
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* Portions of this software were developed by the University of Cambridge
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* Computer Laboratory as part of the CTSRD Project, with support from the
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* UK Higher Education Innovation Fund (HEIF).
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
|
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <stdlib.h>
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#include "libc_private.h"
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#include "crtbrand.c"
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#include "ignore_init.c"
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typedef void (*fptr)(void);
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#ifdef GCRT
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extern void _mcleanup(void);
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extern void monstartup(void *, void *);
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extern int eprol;
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extern int etext;
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#endif
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void __start(int argc, char **argv, char **env, void (*cleanup)(void));
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/* The entry function. */
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__asm(" .text \n"
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" .align 0 \n"
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" .globl _start \n"
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" _start: \n"
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" mv a3, a2 \n" /* cleanup */
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" addi a1, a0, 8 \n" /* get argv */
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" ld a0, 0(a0) \n" /* load argc */
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" slli t0, a0, 3 \n" /* mult by arg size */
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" add a2, a1, t0 \n" /* env is after argv */
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" addi a2, a2, 8 \n" /* argv is null terminated */
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" lla gp, _gp \n" /* load global pointer */
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" call __start");
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void
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__start(int argc, char **argv, char **env, void (*cleanup)(void))
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{
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handle_argv(argc, argv, env);
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if (&_DYNAMIC != NULL)
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atexit(cleanup);
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else
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_init_tls();
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#ifdef GCRT
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atexit(_mcleanup);
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monstartup(&eprol, &etext);
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__asm__("eprol:");
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#endif
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handle_static_init(argc, argv, env);
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exit(main(argc, argv, env));
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}
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58
lib/csu/riscv/crti.S
Normal file
58
lib/csu/riscv/crti.S
Normal file
@ -0,0 +1,58 @@
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/*-
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* Copyright (c) 2015 Ruslan Bukin <br@bsdpad.com>
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* All rights reserved.
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*
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||||
* Portions of this software were developed by SRI International and the
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* University of Cambridge Computer Laboratory under DARPA/AFRL contract
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* FA8750-10-C-0237 ("CTSRD"), as part of the DARPA CRASH research programme.
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*
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* Portions of this software were developed by the University of Cambridge
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* Computer Laboratory as part of the CTSRD Project, with support from the
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* UK Higher Education Innovation Fund (HEIF).
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*
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||||
* Redistribution and use in source and binary forms, with or without
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||||
* modification, are permitted provided that the following conditions
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||||
* are met:
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||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
|
||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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||||
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
* SUCH DAMAGE.
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||||
*/
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#include <machine/asm.h>
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__FBSDID("$FreeBSD$");
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# this puts _gp into .dynsym, so symlook_obj can now find that (see reloc.c)
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.weak _gp
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_gp:
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.section .init,"ax",@progbits
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.align 2
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.globl _init
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.type _init,@function
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_init:
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addi sp, sp, -16
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sd ra, 0(sp)
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.section .fini,"ax",@progbits
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.align 2
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.globl _fini
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.type _fini,@function
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_fini:
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addi sp, sp, -16
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sd ra, 0(sp)
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.section .note.GNU-stack,"",%progbits
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48
lib/csu/riscv/crtn.S
Normal file
48
lib/csu/riscv/crtn.S
Normal file
@ -0,0 +1,48 @@
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/*-
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||||
* Copyright (c) 2015 Ruslan Bukin <br@bsdpad.com>
|
||||
* All rights reserved.
|
||||
*
|
||||
* Portions of this software were developed by SRI International and the
|
||||
* University of Cambridge Computer Laboratory under DARPA/AFRL contract
|
||||
* FA8750-10-C-0237 ("CTSRD"), as part of the DARPA CRASH research programme.
|
||||
*
|
||||
* Portions of this software were developed by the University of Cambridge
|
||||
* Computer Laboratory as part of the CTSRD Project, with support from the
|
||||
* UK Higher Education Innovation Fund (HEIF).
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
|
||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
|
||||
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
* SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#include <machine/asm.h>
|
||||
__FBSDID("$FreeBSD$");
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||||
|
||||
.section .init,"ax",@progbits
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||||
ld ra, 0(sp)
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||||
addi sp, sp, 16
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||||
ret
|
||||
|
||||
.section .fini,"ax",@progbits
|
||||
ld ra, 0(sp)
|
||||
addi sp, sp, 16
|
||||
ret
|
||||
|
||||
.section .note.GNU-stack,"",%progbits
|
1
lib/libc/riscv/Makefile.inc
Normal file
1
lib/libc/riscv/Makefile.inc
Normal file
@ -0,0 +1 @@
|
||||
# $FreeBSD$
|
1
lib/libthr/arch/riscv/Makefile.inc
Normal file
1
lib/libthr/arch/riscv/Makefile.inc
Normal file
@ -0,0 +1 @@
|
||||
# $FreeBSD$
|
6
lib/msun/riscv/Makefile.inc
Normal file
6
lib/msun/riscv/Makefile.inc
Normal file
@ -0,0 +1,6 @@
|
||||
# $FreeBSD$
|
||||
|
||||
# RISCVTODO: should be 113
|
||||
# compilation problems: gcc generates bltuz instruction, which is not exists
|
||||
|
||||
LDBL_PREC = 53
|
228
lib/msun/riscv/fenv.h
Normal file
228
lib/msun/riscv/fenv.h
Normal file
@ -0,0 +1,228 @@
|
||||
/*-
|
||||
* Copyright (c) 2004-2005 David Schultz <das@FreeBSD.ORG>
|
||||
* Copyright (c) 2015 Ruslan Bukin <br@bsdpad.com>
|
||||
* All rights reserved.
|
||||
*
|
||||
* Portions of this software were developed by SRI International and the
|
||||
* University of Cambridge Computer Laboratory under DARPA/AFRL contract
|
||||
* FA8750-10-C-0237 ("CTSRD"), as part of the DARPA CRASH research programme.
|
||||
*
|
||||
* Portions of this software were developed by the University of Cambridge
|
||||
* Computer Laboratory as part of the CTSRD Project, with support from the
|
||||
* UK Higher Education Innovation Fund (HEIF).
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
|
||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
|
||||
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
* SUCH DAMAGE.
|
||||
*
|
||||
* $FreeBSD$
|
||||
*/
|
||||
|
||||
#ifndef _FENV_H_
|
||||
#define _FENV_H_
|
||||
|
||||
#include <sys/_types.h>
|
||||
|
||||
#ifndef __fenv_static
|
||||
#define __fenv_static static
|
||||
#endif
|
||||
|
||||
typedef __uint64_t fenv_t;
|
||||
typedef __uint64_t fexcept_t;
|
||||
|
||||
/* Exception flags */
|
||||
#define FE_INVALID 0x0010
|
||||
#define FE_DIVBYZERO 0x0008
|
||||
#define FE_OVERFLOW 0x0004
|
||||
#define FE_UNDERFLOW 0x0002
|
||||
#define FE_INEXACT 0x0001
|
||||
#define FE_ALL_EXCEPT (FE_DIVBYZERO | FE_INEXACT | \
|
||||
FE_INVALID | FE_OVERFLOW | FE_UNDERFLOW)
|
||||
|
||||
/*
|
||||
* RISC-V Rounding modes
|
||||
*/
|
||||
#define FE_TONEAREST (0x00 << 5)
|
||||
#define FE_TOWARDZERO (0x01 << 5)
|
||||
#define FE_DOWNWARD (0x02 << 5)
|
||||
#define FE_UPWARD (0x03 << 5)
|
||||
#define _ROUND_SHIFT 5
|
||||
#define _ROUND_MASK (FE_TONEAREST | FE_DOWNWARD | \
|
||||
FE_UPWARD | FE_TOWARDZERO)
|
||||
|
||||
__BEGIN_DECLS
|
||||
|
||||
/* Default floating-point environment */
|
||||
extern const fenv_t __fe_dfl_env;
|
||||
#define FE_DFL_ENV (&__fe_dfl_env)
|
||||
|
||||
/* We need to be able to map status flag positions to mask flag positions */
|
||||
#define _FPUSW_SHIFT 0
|
||||
#define _ENABLE_MASK (FE_ALL_EXCEPT << _FPUSW_SHIFT)
|
||||
|
||||
#define __rfs(__fpsr) __asm __volatile("csrr %0, fcsr" : "=r" (*(__fpsr)))
|
||||
#define __wfs(__fpsr) __asm __volatile("csrw fcsr, %0" :: "r" (__fpsr))
|
||||
|
||||
__fenv_static inline int
|
||||
feclearexcept(int __excepts)
|
||||
{
|
||||
fexcept_t __fpsr;
|
||||
|
||||
__rfs(&__fpsr);
|
||||
__fpsr &= ~__excepts;
|
||||
__wfs(__fpsr);
|
||||
return (0);
|
||||
}
|
||||
|
||||
__fenv_static inline int
|
||||
fegetexceptflag(fexcept_t *__flagp, int __excepts)
|
||||
{
|
||||
fexcept_t __fpsr;
|
||||
|
||||
__rfs(&__fpsr);
|
||||
*__flagp = __fpsr & __excepts;
|
||||
return (0);
|
||||
}
|
||||
|
||||
__fenv_static inline int
|
||||
fesetexceptflag(const fexcept_t *__flagp, int __excepts)
|
||||
{
|
||||
fexcept_t __fpsr;
|
||||
|
||||
__rfs(&__fpsr);
|
||||
__fpsr &= ~__excepts;
|
||||
__fpsr |= *__flagp & __excepts;
|
||||
__wfs(__fpsr);
|
||||
return (0);
|
||||
}
|
||||
|
||||
__fenv_static inline int
|
||||
feraiseexcept(int __excepts)
|
||||
{
|
||||
fexcept_t __ex = __excepts;
|
||||
|
||||
fesetexceptflag(&__ex, __excepts); /* XXX */
|
||||
return (0);
|
||||
}
|
||||
|
||||
__fenv_static inline int
|
||||
fetestexcept(int __excepts)
|
||||
{
|
||||
fexcept_t __fpsr;
|
||||
|
||||
__rfs(&__fpsr);
|
||||
return (__fpsr & __excepts);
|
||||
}
|
||||
|
||||
__fenv_static inline int
|
||||
fegetround(void)
|
||||
{
|
||||
|
||||
return (-1);
|
||||
}
|
||||
|
||||
__fenv_static inline int
|
||||
fesetround(int __round)
|
||||
{
|
||||
|
||||
return (-1);
|
||||
}
|
||||
|
||||
__fenv_static inline int
|
||||
fegetenv(fenv_t *__envp)
|
||||
{
|
||||
|
||||
__rfs(__envp);
|
||||
return (0);
|
||||
}
|
||||
|
||||
__fenv_static inline int
|
||||
feholdexcept(fenv_t *__envp)
|
||||
{
|
||||
fenv_t __env;
|
||||
|
||||
__rfs(&__env);
|
||||
*__envp = __env;
|
||||
__env &= ~(FE_ALL_EXCEPT | _ENABLE_MASK);
|
||||
__wfs(__env);
|
||||
return (0);
|
||||
}
|
||||
|
||||
__fenv_static inline int
|
||||
fesetenv(const fenv_t *__envp)
|
||||
{
|
||||
|
||||
__wfs(*__envp);
|
||||
return (0);
|
||||
}
|
||||
|
||||
__fenv_static inline int
|
||||
feupdateenv(const fenv_t *__envp)
|
||||
{
|
||||
fexcept_t __fpsr;
|
||||
|
||||
__rfs(&__fpsr);
|
||||
__wfs(*__envp);
|
||||
feraiseexcept(__fpsr & FE_ALL_EXCEPT);
|
||||
return (0);
|
||||
}
|
||||
|
||||
#if __BSD_VISIBLE
|
||||
|
||||
/* We currently provide no external definitions of the functions below. */
|
||||
|
||||
static inline int
|
||||
feenableexcept(int __mask)
|
||||
{
|
||||
fenv_t __old_fpsr;
|
||||
fenv_t __new_fpsr;
|
||||
|
||||
__rfs(&__old_fpsr);
|
||||
__new_fpsr = __old_fpsr | (__mask & FE_ALL_EXCEPT) << _FPUSW_SHIFT;
|
||||
__wfs(__new_fpsr);
|
||||
return ((__old_fpsr >> _FPUSW_SHIFT) & FE_ALL_EXCEPT);
|
||||
}
|
||||
|
||||
static inline int
|
||||
fedisableexcept(int __mask)
|
||||
{
|
||||
fenv_t __old_fpsr;
|
||||
fenv_t __new_fpsr;
|
||||
|
||||
__rfs(&__old_fpsr);
|
||||
__new_fpsr = __old_fpsr & ~((__mask & FE_ALL_EXCEPT) << _FPUSW_SHIFT);
|
||||
__wfs(__new_fpsr);
|
||||
return ((__old_fpsr >> _FPUSW_SHIFT) & FE_ALL_EXCEPT);
|
||||
}
|
||||
|
||||
static inline int
|
||||
fegetexcept(void)
|
||||
{
|
||||
fenv_t __fpsr;
|
||||
|
||||
__rfs(&__fpsr);
|
||||
return ((__fpsr & _ENABLE_MASK) >> _FPUSW_SHIFT);
|
||||
}
|
||||
|
||||
#endif /* __BSD_VISIBLE */
|
||||
|
||||
__END_DECLS
|
||||
|
||||
#endif /* !_FENV_H_ */
|
@ -18,6 +18,8 @@ MACHINE_CPU = i486
|
||||
MACHINE_CPU = mips
|
||||
. elif ${MACHINE_CPUARCH} == "powerpc"
|
||||
MACHINE_CPU = aim
|
||||
. elif ${MACHINE_CPUARCH} == "riscv"
|
||||
MACHINE_CPU = riscv
|
||||
. elif ${MACHINE_CPUARCH} == "sparc64"
|
||||
MACHINE_CPU = ultrasparc
|
||||
. endif
|
||||
@ -148,6 +150,8 @@ _CPUCFLAGS = -march=${CPUTYPE}
|
||||
# sb1, xlp, xlr
|
||||
_CPUCFLAGS = -march=${CPUTYPE:S/^mips//}
|
||||
. endif
|
||||
. elif ${MACHINE_CPUARCH} == "riscv"
|
||||
_CPUCFLAGS = -msoft-float # -march="RV64I" # RISCVTODO
|
||||
. elif ${MACHINE_ARCH} == "sparc64"
|
||||
. if ${CPUTYPE} == "v9"
|
||||
_CPUCFLAGS = -mcpu=v9
|
||||
@ -277,6 +281,9 @@ MACHINE_CPU = mips
|
||||
. if ${CPUTYPE} == "e500"
|
||||
MACHINE_CPU = booke softfp
|
||||
. endif
|
||||
########## riscv
|
||||
. elif ${MACHINE_CPUARCH} == "riscv"
|
||||
MACHINE_CPU = riscv
|
||||
########## sparc64
|
||||
. elif ${MACHINE_ARCH} == "sparc64"
|
||||
. if ${CPUTYPE} == "v9"
|
||||
@ -313,6 +320,10 @@ CFLAGS += -mfloat-abi=softfp
|
||||
.endif
|
||||
.endif
|
||||
|
||||
.if ${MACHINE_CPUARCH} == "riscv"
|
||||
CFLAGS += -msoft-float
|
||||
.endif
|
||||
|
||||
# NB: COPTFLAGS is handled in /usr/src/sys/conf/kern.pre.mk
|
||||
|
||||
.if !defined(NO_CPU_CFLAGS)
|
||||
|
@ -4,6 +4,7 @@
|
||||
${MACHINE_ARCH} == "amd64" || \
|
||||
${MACHINE_ARCH} == "i386" || \
|
||||
(${MACHINE} == "arm" && ${MACHINE_ARCH:Marm*eb*} == "") || \
|
||||
${MACHINE_CPUARCH} == "riscv" || \
|
||||
${MACHINE_ARCH:Mmips*el} != ""
|
||||
TARGET_ENDIANNESS= 1234
|
||||
.elif ${MACHINE_ARCH} == "powerpc" || \
|
||||
|
@ -109,6 +109,11 @@ CWARNFLAGS+= -Werror
|
||||
CWARNFLAGS+= -Wno-format
|
||||
.endif # NO_WFORMAT || NO_WFORMAT.${COMPILER_TYPE}
|
||||
|
||||
# GCC 5.2.0
|
||||
.if ${COMPILER_TYPE} == "gcc" && ${COMPILER_VERSION} >= 50200
|
||||
CWARNFLAGS+= -Wno-error=unused-function -Wno-error=enum-compare -Wno-error=logical-not-parentheses -Wno-error=bool-compare -Wno-error=uninitialized -Wno-error=array-bounds -Wno-error=clobbered -Wno-error=cast-align -Wno-error=extra -Wno-error=attributes -Wno-error=inline -Wno-error=unused-but-set-variable -Wno-error=unused-value -Wno-error=strict-aliasing -Wno-error=address
|
||||
.endif
|
||||
|
||||
# How to handle FreeBSD custom printf format specifiers.
|
||||
.if ${COMPILER_TYPE} == "clang" && ${COMPILER_VERSION} >= 30600
|
||||
FORMAT_EXTENSIONS= -D__printf__=__freebsd_kprintf__
|
||||
|
@ -48,13 +48,14 @@ TARGET_ARCHES_arm64?= aarch64
|
||||
TARGET_ARCHES_mips?= mipsel mips mips64el mips64 mipsn32 mipsn32el
|
||||
TARGET_ARCHES_powerpc?= powerpc powerpc64
|
||||
TARGET_ARCHES_pc98?= i386
|
||||
TARGET_ARCHES_riscv?= riscv64
|
||||
|
||||
# some corner cases
|
||||
BOOT_MACHINE_DIR.amd64 = boot/i386
|
||||
MACHINE_ARCH.host = ${_HOST_ARCH}
|
||||
|
||||
# the list of machines we support
|
||||
ALL_MACHINE_LIST?= amd64 arm arm64 i386 mips pc98 powerpc sparc64
|
||||
ALL_MACHINE_LIST?= amd64 arm arm64 i386 mips pc98 powerpc riscv sparc64
|
||||
.for m in ${ALL_MACHINE_LIST:O:u}
|
||||
MACHINE_ARCH_LIST.$m?= ${TARGET_ARCHES_${m}:U$m}
|
||||
MACHINE_ARCH.$m?= ${MACHINE_ARCH_LIST.$m:[1]}
|
||||
|
@ -229,12 +229,17 @@ __DEFAULT_YES_OPTIONS+=GCC GCC_BOOTSTRAP GNUCXX
|
||||
__DEFAULT_NO_OPTIONS+=CLANG CLANG_BOOTSTRAP CLANG_FULL CLANG_IS_CC
|
||||
.endif
|
||||
# In-tree binutils/gcc are older versions without modern architecture support.
|
||||
.if ${__T} == "aarch64"
|
||||
.if ${__T} == "aarch64" || ${__T} == "riscv64"
|
||||
BROKEN_OPTIONS+=BINUTILS BINUTILS_BOOTSTRAP GCC GCC_BOOTSTRAP GDB
|
||||
__DEFAULT_YES_OPTIONS+=ELFCOPY_AS_OBJCOPY
|
||||
.else
|
||||
__DEFAULT_NO_OPTIONS+=ELFCOPY_AS_OBJCOPY
|
||||
.endif
|
||||
.if ${__T} == "riscv64"
|
||||
BROKEN_OPTIONS+=PROFILE # "sorry, unimplemented: profiler support for RISC-V"
|
||||
BROKEN_OPTIONS+=TESTS # "undefined reference to `_Unwind_Resume'"
|
||||
BROKEN_OPTIONS+=CXX # "libcxxrt.so: undefined reference to `_Unwind_Resume_or_Rethrow'"
|
||||
.endif
|
||||
# LLVM lacks support for FreeBSD 64-bit atomic operations for ARMv4/ARMv5
|
||||
.if ${__T} == "arm" || ${__T} == "armeb"
|
||||
BROKEN_OPTIONS+=LLDB
|
||||
|
@ -13,7 +13,7 @@ unix ?= We run FreeBSD, not UNIX.
|
||||
# and/or endian. This is called MACHINE_CPU in NetBSD, but that's used
|
||||
# for something different in FreeBSD.
|
||||
#
|
||||
MACHINE_CPUARCH=${MACHINE_ARCH:C/mips(n32|64)?(el)?/mips/:C/arm(v6)?(eb|hf)?/arm/:C/powerpc64/powerpc/}
|
||||
MACHINE_CPUARCH=${MACHINE_ARCH:C/mips(n32|64)?(el)?/mips/:C/arm(v6)?(eb|hf)?/arm/:C/powerpc64/powerpc/:C/riscv64/riscv/}
|
||||
.endif
|
||||
|
||||
|
||||
|
Loading…
Reference in New Issue
Block a user