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cxgbe/iw_cxgbe: Support for 512 SGL entries in one memory registration.

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Use the correct SGL limit within iw_cxgbe, firmwares >= 1.25.6.0 support
upto 512 entries per MR.

Obtained from:	Chelsio Communications
MFC after:	1 week
Sponsored by:	Chelsio Communications
This commit is contained in:
Navdeep Parhar 2021-06-01 12:57:53 -07:00
parent db15dbf880
commit 211972cfb8
5 changed files with 13 additions and 10 deletions
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8
sys/dev/cxgbe/iw_cxgbe/iw_cxgbe.h
View File

@ -178,6 +178,14 @@ static inline int c4iw_num_stags(struct c4iw_rdev *rdev)
return (int)(rdev->adap->vres.stag.size >> 5);
}
static inline int t4_max_fr_depth(struct c4iw_rdev *rdev, bool use_dsgl)
{
if (rdev->adap->params.ulptx_memwrite_dsgl && use_dsgl)
return rdev->adap->params.dev_512sgl_mr ? T4_MAX_FR_FW_DSGL_DEPTH : T4_MAX_FR_DSGL_DEPTH;
else
return T4_MAX_FR_IMMD_DEPTH;
}
#define C4IW_WR_TO (60*HZ)
struct c4iw_wr_wait {

3
sys/dev/cxgbe/iw_cxgbe/mem.c
View File

@ -624,8 +624,7 @@ struct ib_mr *c4iw_alloc_mr(struct ib_pd *pd,
rhp = php->rhp;
if (mr_type != IB_MR_TYPE_MEM_REG ||
max_num_sg > t4_max_fr_depth(
rhp->rdev.adap->params.ulptx_memwrite_dsgl && use_dsgl))
max_num_sg > t4_max_fr_depth(&rhp->rdev, use_dsgl))
return ERR_PTR(-EINVAL);
mhp = kzalloc(sizeof(*mhp), GFP_KERNEL);

3
sys/dev/cxgbe/iw_cxgbe/provider.c
View File

@ -348,8 +348,7 @@ c4iw_query_device(struct ib_device *ibdev, struct ib_device_attr *props,
props->max_mr = c4iw_num_stags(&dev->rdev);
props->max_pd = T4_MAX_NUM_PD;
props->local_ca_ack_delay = 0;
props->max_fast_reg_page_list_len =
t4_max_fr_depth(sc->params.ulptx_memwrite_dsgl && use_dsgl);
props->max_fast_reg_page_list_len = t4_max_fr_depth(&dev->rdev, use_dsgl);
return (0);
}

2
sys/dev/cxgbe/iw_cxgbe/qp.c
View File

@ -714,7 +714,7 @@ static int build_memreg(struct t4_sq *sq, union t4_wr *wqe,
int pbllen = roundup(mhp->mpl_len * sizeof(u64), 32);
int rem;
if (mhp->mpl_len > t4_max_fr_depth(use_dsgl && dsgl_supported))
if (mhp->mpl_len > t4_max_fr_depth(&mhp->rhp->rdev, use_dsgl))
return -EINVAL;
if (wr->mr->page_size > C4IW_MAX_PAGE_SIZE)
return -EINVAL;

7
sys/dev/cxgbe/iw_cxgbe/t4.h
View File

@ -103,11 +103,8 @@ struct t4_status_page {
#define T4_MAX_FR_IMMD_DEPTH (T4_MAX_FR_IMMD / sizeof(u64))
#define T4_MAX_FR_DSGL 1024
#define T4_MAX_FR_DSGL_DEPTH (T4_MAX_FR_DSGL / sizeof(u64))
static inline int t4_max_fr_depth(int use_dsgl)
{
return use_dsgl ? T4_MAX_FR_DSGL_DEPTH : T4_MAX_FR_IMMD_DEPTH;
}
#define T4_MAX_FR_FW_DSGL 4096
#define T4_MAX_FR_FW_DSGL_DEPTH (T4_MAX_FR_FW_DSGL / sizeof(u64))
#define T4_RQ_NUM_SLOTS 2
#define T4_RQ_NUM_BYTES (T4_EQ_ENTRY_SIZE * T4_RQ_NUM_SLOTS)